scif.c revision 1.64
1 /* $NetBSD: scif.c,v 1.64 2014/07/25 08:10:34 dholland Exp $ */ 2 3 /*- 4 * Copyright (C) 1999 T.Horiuchi and SAITOH Masanobu. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 /*- 30 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 31 * All rights reserved. 32 * 33 * This code is derived from software contributed to The NetBSD Foundation 34 * by Charles M. Hannum. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 45 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 46 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 47 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 48 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 49 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 50 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 51 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 52 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 53 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 54 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 55 * POSSIBILITY OF SUCH DAMAGE. 56 */ 57 58 /* 59 * Copyright (c) 1991 The Regents of the University of California. 60 * All rights reserved. 61 * 62 * Redistribution and use in source and binary forms, with or without 63 * modification, are permitted provided that the following conditions 64 * are met: 65 * 1. Redistributions of source code must retain the above copyright 66 * notice, this list of conditions and the following disclaimer. 67 * 2. Redistributions in binary form must reproduce the above copyright 68 * notice, this list of conditions and the following disclaimer in the 69 * documentation and/or other materials provided with the distribution. 70 * 3. Neither the name of the University nor the names of its contributors 71 * may be used to endorse or promote products derived from this software 72 * without specific prior written permission. 73 * 74 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 75 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 76 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 77 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 78 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 79 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 80 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 81 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 82 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 83 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 84 * SUCH DAMAGE. 85 * 86 * @(#)com.c 7.5 (Berkeley) 5/16/91 87 */ 88 89 /* 90 * SH internal serial driver 91 * 92 * This code is derived from both z8530tty.c and com.c 93 */ 94 95 #include <sys/cdefs.h> 96 __KERNEL_RCSID(0, "$NetBSD: scif.c,v 1.64 2014/07/25 08:10:34 dholland Exp $"); 97 98 #include "opt_kgdb.h" 99 #include "opt_scif.h" 100 101 #include <sys/param.h> 102 #include <sys/systm.h> 103 #include <sys/tty.h> 104 #include <sys/proc.h> 105 #include <sys/conf.h> 106 #include <sys/file.h> 107 #include <sys/syslog.h> 108 #include <sys/kernel.h> 109 #include <sys/device.h> 110 #include <sys/malloc.h> 111 #include <sys/kgdb.h> 112 #include <sys/kauth.h> 113 #include <sys/intr.h> 114 115 #include <dev/cons.h> 116 117 #include <sh3/clock.h> 118 #include <sh3/exception.h> 119 #include <sh3/scifreg.h> 120 121 #include <sh3/dev/scifvar.h> 122 123 #include "locators.h" 124 125 126 struct scif_softc { 127 device_t sc_dev; 128 129 struct tty *sc_tty; 130 void *sc_si; 131 132 callout_t sc_diag_ch; 133 134 #if 0 135 bus_space_tag_t sc_iot; /* ISA i/o space identifier */ 136 bus_space_handle_t sc_ioh; /* ISA io handle */ 137 138 int sc_drq; 139 140 int sc_frequency; 141 #endif 142 143 u_int sc_overflows, 144 sc_floods, 145 sc_errors; /* number of retries so far */ 146 u_char sc_status[7]; /* copy of registers */ 147 148 int sc_hwflags; 149 int sc_swflags; 150 u_int sc_fifolen; 151 152 u_int sc_r_hiwat, 153 sc_r_lowat; 154 u_char *volatile sc_rbget, 155 *volatile sc_rbput; 156 volatile u_int sc_rbavail; 157 u_char *sc_rbuf, 158 *sc_ebuf; 159 160 u_char *sc_tba; /* transmit buffer address */ 161 u_int sc_tbc, /* transmit byte count */ 162 sc_heldtbc; 163 164 volatile u_char sc_rx_flags, 165 #define RX_TTY_BLOCKED 0x01 166 #define RX_TTY_OVERFLOWED 0x02 167 #define RX_IBUF_BLOCKED 0x04 168 #define RX_IBUF_OVERFLOWED 0x08 169 #define RX_ANY_BLOCK 0x0f 170 sc_tx_busy, /* working on an output chunk */ 171 sc_tx_done, /* done with one output chunk */ 172 sc_tx_stopped, /* H/W level stop (lost CTS) */ 173 sc_st_check, /* got a status interrupt */ 174 sc_rx_ready; 175 176 volatile u_char sc_heldchange; 177 }; 178 179 180 static int scif_match(device_t, cfdata_t, void *); 181 static void scif_attach(device_t, device_t, void *); 182 183 CFATTACH_DECL_NEW(scif, sizeof(struct scif_softc), 184 scif_match, scif_attach, NULL, NULL); 185 186 static int scif_attached = 0; /* XXX: FIXME: don't limit to just one! */ 187 188 extern struct cfdriver scif_cd; 189 190 #define SCIFUNIT_MASK 0x7ffff 191 #define SCIFDIALOUT_MASK 0x80000 192 193 #define SCIFUNIT(x) (minor(x) & SCIFUNIT_MASK) 194 #define SCIFDIALOUT(x) (minor(x) & SCIFDIALOUT_MASK) 195 196 197 /* console */ 198 dev_type_cnprobe(scifcnprobe); 199 dev_type_cninit(scifcninit); 200 dev_type_cngetc(scifcngetc); 201 dev_type_cnputc(scifcnputc); 202 203 204 /* cdevsw */ 205 dev_type_open(scifopen); 206 dev_type_close(scifclose); 207 dev_type_read(scifread); 208 dev_type_write(scifwrite); 209 dev_type_ioctl(scifioctl); 210 dev_type_stop(scifstop); 211 dev_type_tty(sciftty); 212 dev_type_poll(scifpoll); 213 214 const struct cdevsw scif_cdevsw = { 215 .d_open = scifopen, 216 .d_close = scifclose, 217 .d_read = scifread, 218 .d_write = scifwrite, 219 .d_ioctl = scifioctl, 220 .d_stop = scifstop, 221 .d_tty = sciftty, 222 .d_poll = scifpoll, 223 .d_mmap = nommap, 224 .d_kqfilter = ttykqfilter, 225 .d_discard = nodiscard, 226 .d_flag = D_TTY 227 }; 228 229 230 /* struct tty */ 231 static void scifstart(struct tty *); 232 static int scifparam(struct tty *, struct termios *); 233 234 235 void InitializeScif (unsigned int); 236 int ScifErrCheck(void); 237 void scif_putc(unsigned char); 238 unsigned char scif_getc(void); 239 240 static int scifintr(void *); 241 static void scifsoft(void *); 242 static void scif_rxsoft(struct scif_softc *, struct tty *); 243 static void scif_txsoft(struct scif_softc *, struct tty *); 244 #if 0 245 static void scif_stsoft(struct scif_softc *, struct tty *); 246 #endif 247 static void scif_schedrx(struct scif_softc *); 248 static void scifdiag(void *); 249 250 static void scif_break(struct scif_softc *, int); 251 static void scif_iflush(struct scif_softc *); 252 253 254 /* Hardware flag masks (sc_hwflags) */ 255 #define SCIF_HW_NOIEN 0x01 256 #define SCIF_HW_FIFO 0x02 257 #define SCIF_HW_FLOW 0x08 258 #define SCIF_HW_DEV_OK 0x20 259 #define SCIF_HW_CONSOLE 0x40 260 #define SCIF_HW_KGDB 0x80 261 262 263 /* Buffer size for character buffer */ 264 #define SCIF_RING_SIZE 2048 265 static unsigned int scif_rbuf_size = SCIF_RING_SIZE; 266 267 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 268 static unsigned int scif_rbuf_hiwat = (SCIF_RING_SIZE * 1) / 4; 269 static unsigned int scif_rbuf_lowat = (SCIF_RING_SIZE * 3) / 4; 270 271 272 #ifdef SCIFCN_SPEED 273 unsigned int scifcn_speed = SCIFCN_SPEED; 274 #else 275 unsigned int scifcn_speed = 9600; 276 #endif 277 278 #define CONMODE ((TTYDEF_CFLAG & ~(CSIZE | CSTOPB | PARENB)) | CS8) /* 8N1 */ 279 int scifconscflag = CONMODE; 280 281 static int scifisconsole = 0; 282 283 #ifdef KGDB 284 static int kgdb_attached = 0; 285 #endif 286 287 288 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 289 290 291 /* XXX: uwe 292 * Prepare for bus_spacification. The difference in access widths is 293 * still handled by the magic definitions in scifreg.h 294 */ 295 #define scif_smr_read() SHREG_SCSMR2 296 #define scif_smr_write(v) (SHREG_SCSMR2 = (v)) 297 298 #define scif_brr_read() SHREG_SCBRR2 299 #define scif_brr_write(v) (SHREG_SCBRR2 = (v)) 300 301 #define scif_scr_read() SHREG_SCSCR2 302 #define scif_scr_write(v) (SHREG_SCSCR2 = (v)) 303 304 #define scif_ftdr_write(v) (SHREG_SCFTDR2 = (v)) 305 306 #define scif_ssr_read() SHREG_SCSSR2 307 #define scif_ssr_write(v) (SHREG_SCSSR2 = (v)) 308 309 #define scif_frdr_read() SHREG_SCFRDR2 310 311 #define scif_fcr_read() SHREG_SCFCR2 312 #define scif_fcr_write(v) (SHREG_SCFCR2 = (v)) 313 314 #define scif_fdr_read() SHREG_SCFDR2 315 316 #ifdef SH4 /* additional registers in sh4 */ 317 318 #define scif_sptr_read() SHREG_SCSPTR2 319 #define scif_sptr_write(v) (SHREG_SCSPTR2 = (v)) 320 321 #define scif_lsr_read() SHREG_SCLSR2 322 #define scif_lsr_write(v) (SHREG_SCLSR2 = (v)) 323 324 #endif /* SH4 */ 325 326 327 void 328 InitializeScif(unsigned int bps) 329 { 330 331 /* Initialize SCR */ 332 scif_scr_write(0x00); 333 334 #if 0 335 scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST | SCFCR2_MCE); 336 #else 337 scif_fcr_write(SCFCR2_TFRST | SCFCR2_RFRST); 338 #endif 339 /* Serial Mode Register */ 340 scif_smr_write(0x00); /* 8bit,NonParity,Even,1Stop */ 341 342 /* Bit Rate Register */ 343 scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * bps) - 1); 344 345 /* 346 * wait 2m Sec, because Send/Recv must begin 1 bit period after 347 * BRR is set. 348 */ 349 delay(2000); 350 351 #if 0 352 scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1 | SCFCR2_MCE); 353 #else 354 scif_fcr_write(FIFO_RCV_TRIGGER_14 | FIFO_XMT_TRIGGER_1); 355 #endif 356 357 /* Send permission, Receive permission ON */ 358 scif_scr_write(SCSCR2_TE | SCSCR2_RE); 359 360 /* Serial Status Register */ 361 scif_ssr_write(scif_ssr_read() & SCSSR2_TDFE); /* Clear Status */ 362 } 363 364 int 365 ScifErrCheck(void) 366 { 367 368 return (scif_ssr_read() & (SCSSR2_ER | SCSSR2_FER | SCSSR2_PER)); 369 } 370 371 void 372 scif_putc(unsigned char c) 373 { 374 375 /* wait for ready */ 376 while ((scif_fdr_read() & SCFDR2_TXCNT) == SCFDR2_TXF_FULL) 377 continue; 378 379 /* write send data to send register */ 380 scif_ftdr_write(c); 381 382 /* clear ready flag */ 383 scif_ssr_write(scif_ssr_read() & ~(SCSSR2_TDFE | SCSSR2_TEND)); 384 } 385 386 unsigned char 387 scif_getc(void) 388 { 389 unsigned char c, err_c; 390 #ifdef SH4 391 unsigned short err_c2 = 0; /* XXXGCC: -Wuninitialized */ 392 #endif 393 394 for (;;) { 395 /* wait for ready */ 396 while ((scif_fdr_read() & SCFDR2_RECVCNT) == 0) 397 continue; 398 399 c = scif_frdr_read(); 400 err_c = scif_ssr_read(); 401 scif_ssr_write(scif_ssr_read() 402 & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_RDF | SCSSR2_DR)); 403 #ifdef SH4 404 if (CPU_IS_SH4) { 405 err_c2 = scif_lsr_read(); 406 scif_lsr_write(scif_lsr_read() & ~SCLSR2_ORER); 407 } 408 #endif 409 if ((err_c & (SCSSR2_ER | SCSSR2_BRK | SCSSR2_FER 410 | SCSSR2_PER)) == 0) 411 { 412 #ifdef SH4 413 if (CPU_IS_SH4 && ((err_c2 & SCLSR2_ORER) == 0)) 414 #endif 415 return(c); 416 } 417 } 418 419 } 420 421 static int 422 scif_match(device_t parent, cfdata_t cfp, void *aux) 423 { 424 425 if (scif_attached) 426 return 0; 427 428 if (strcmp(cfp->cf_name, "scif") != 0) 429 return 0; 430 431 return 1; 432 } 433 434 static void 435 scif_attach(device_t parent, device_t self, void *aux) 436 { 437 struct scif_softc *sc; 438 struct tty *tp; 439 440 sc = device_private(self); 441 sc->sc_dev = self; 442 443 scif_attached = 1; 444 445 sc->sc_hwflags = 0; /* XXX */ 446 sc->sc_swflags = 0; /* XXX */ 447 sc->sc_fifolen = 16; 448 449 aprint_normal("\n"); 450 if (scifisconsole) { 451 aprint_naive(" (console)\n"); 452 aprint_normal_dev(self, "console\n"); 453 SET(sc->sc_hwflags, SCIF_HW_CONSOLE); 454 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 455 } 456 #ifdef KGDB 457 else if (kgdb_attached) { 458 aprint_naive(" (kgdb)\n"); 459 aprint_normal_dev(self, "kgdb\n"); 460 SET(sc->sc_hwflags, SCIF_HW_KGDB); 461 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 462 } 463 #endif 464 else { 465 aprint_naive("\n"); 466 InitializeScif(9600); /* XXX */ 467 } 468 469 callout_init(&sc->sc_diag_ch, 0); 470 #ifdef SH4 471 intc_intr_establish(SH4_INTEVT_SCIF_ERI, IST_LEVEL, IPL_SERIAL, 472 scifintr, sc); 473 intc_intr_establish(SH4_INTEVT_SCIF_RXI, IST_LEVEL, IPL_SERIAL, 474 scifintr, sc); 475 intc_intr_establish(SH4_INTEVT_SCIF_BRI, IST_LEVEL, IPL_SERIAL, 476 scifintr, sc); 477 intc_intr_establish(SH4_INTEVT_SCIF_TXI, IST_LEVEL, IPL_SERIAL, 478 scifintr, sc); 479 #else 480 intc_intr_establish(SH7709_INTEVT2_SCIF_ERI, IST_LEVEL, IPL_SERIAL, 481 scifintr, sc); 482 intc_intr_establish(SH7709_INTEVT2_SCIF_RXI, IST_LEVEL, IPL_SERIAL, 483 scifintr, sc); 484 intc_intr_establish(SH7709_INTEVT2_SCIF_BRI, IST_LEVEL, IPL_SERIAL, 485 scifintr, sc); 486 intc_intr_establish(SH7709_INTEVT2_SCIF_TXI, IST_LEVEL, IPL_SERIAL, 487 scifintr, sc); 488 #endif 489 490 sc->sc_si = softint_establish(SOFTINT_SERIAL, scifsoft, sc); 491 SET(sc->sc_hwflags, SCIF_HW_DEV_OK); 492 493 tp = tty_alloc(); 494 tp->t_oproc = scifstart; 495 tp->t_param = scifparam; 496 tp->t_hwiflow = NULL; 497 498 sc->sc_tty = tp; 499 sc->sc_rbuf = malloc(scif_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 500 if (sc->sc_rbuf == NULL) { 501 aprint_error_dev(self, "unable to allocate ring buffer\n"); 502 return; 503 } 504 sc->sc_ebuf = sc->sc_rbuf + (scif_rbuf_size << 1); 505 506 tty_attach(tp); 507 508 /* XXX: TODO */ 509 if (!pmf_device_register(self, NULL, NULL)) 510 aprint_error_dev(self, "unable to establish power handler\n"); 511 } 512 513 /* 514 * Start or restart transmission. 515 */ 516 static void 517 scifstart(struct tty *tp) 518 { 519 struct scif_softc *sc; 520 int s; 521 522 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 523 524 s = spltty(); 525 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 526 goto out; 527 if (sc->sc_tx_stopped) 528 goto out; 529 if (!ttypull(tp)) 530 goto out; 531 532 /* Grab the first contiguous region of buffer space. */ 533 { 534 u_char *tba; 535 int tbc; 536 537 tba = tp->t_outq.c_cf; 538 tbc = ndqb(&tp->t_outq, 0); 539 540 (void)splserial(); 541 542 sc->sc_tba = tba; 543 sc->sc_tbc = tbc; 544 } 545 546 SET(tp->t_state, TS_BUSY); 547 sc->sc_tx_busy = 1; 548 549 /* Enable transmit completion interrupts if necessary. */ 550 scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE); 551 552 /* Output the first chunk of the contiguous buffer. */ 553 { 554 int n; 555 int maxchars; 556 int i; 557 558 n = sc->sc_tbc; 559 maxchars = sc->sc_fifolen 560 - ((scif_fdr_read() & SCFDR2_TXCNT) >> 8); 561 if (n > maxchars) 562 n = maxchars; 563 564 for (i = 0; i < n; i++) { 565 scif_putc(*(sc->sc_tba)); 566 sc->sc_tba++; 567 } 568 sc->sc_tbc -= n; 569 } 570 out: 571 splx(s); 572 return; 573 } 574 575 /* 576 * Set SCIF tty parameters from termios. 577 * XXX - Should just copy the whole termios after 578 * making sure all the changes could be done. 579 */ 580 static int 581 scifparam(struct tty *tp, struct termios *t) 582 { 583 struct scif_softc *sc; 584 int ospeed = t->c_ospeed; 585 int s; 586 587 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 588 if (!device_is_active(sc->sc_dev)) 589 return (EIO); 590 591 /* Check requested parameters. */ 592 if (ospeed < 0) 593 return (EINVAL); 594 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 595 return (EINVAL); 596 597 /* 598 * For the console, always force CLOCAL and !HUPCL, so that the port 599 * is always active. 600 */ 601 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 602 ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 603 SET(t->c_cflag, CLOCAL); 604 CLR(t->c_cflag, HUPCL); 605 } 606 607 /* 608 * If there were no changes, don't do anything. This avoids dropping 609 * input and improves performance when all we did was frob things like 610 * VMIN and VTIME. 611 */ 612 if (tp->t_ospeed == t->c_ospeed && 613 tp->t_cflag == t->c_cflag) 614 return (0); 615 616 #if 0 617 /* XXX (msaitoh) */ 618 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 619 #endif 620 621 s = splserial(); 622 623 /* 624 * Set the flow control pins depending on the current flow control 625 * mode. 626 */ 627 if (ISSET(t->c_cflag, CRTSCTS)) { 628 scif_fcr_write(scif_fcr_read() | SCFCR2_MCE); 629 } else { 630 scif_fcr_write(scif_fcr_read() & ~SCFCR2_MCE); 631 } 632 633 scif_brr_write(divrnd(sh_clock_get_pclock(), 32 * ospeed) -1); 634 635 /* 636 * Set the FIFO threshold based on the receive speed. 637 * 638 * * If it's a low speed, it's probably a mouse or some other 639 * interactive device, so set the threshold low. 640 * * If it's a high speed, trim the trigger level down to prevent 641 * overflows. 642 * * Otherwise set it a bit higher. 643 */ 644 #if 0 645 /* XXX (msaitoh) */ 646 if (ISSET(sc->sc_hwflags, SCIF_HW_HAYESP)) 647 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 648 else if (ISSET(sc->sc_hwflags, SCIF_HW_FIFO)) 649 sc->sc_fifo = FIFO_ENABLE | 650 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 651 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 652 else 653 sc->sc_fifo = 0; 654 #endif 655 656 /* And copy to tty. */ 657 tp->t_ispeed = 0; 658 tp->t_ospeed = t->c_ospeed; 659 tp->t_cflag = t->c_cflag; 660 661 if (!sc->sc_heldchange) { 662 if (sc->sc_tx_busy) { 663 sc->sc_heldtbc = sc->sc_tbc; 664 sc->sc_tbc = 0; 665 sc->sc_heldchange = 1; 666 } 667 #if 0 668 /* XXX (msaitoh) */ 669 else 670 scif_loadchannelregs(sc); 671 #endif 672 } 673 674 if (!ISSET(t->c_cflag, CHWFLOW)) { 675 /* Disable the high water mark. */ 676 sc->sc_r_hiwat = 0; 677 sc->sc_r_lowat = 0; 678 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 679 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 680 scif_schedrx(sc); 681 } 682 } else { 683 sc->sc_r_hiwat = scif_rbuf_hiwat; 684 sc->sc_r_lowat = scif_rbuf_lowat; 685 } 686 687 splx(s); 688 689 #ifdef SCIF_DEBUG 690 if (scif_debug) 691 scifstatus(sc, "scifparam "); 692 #endif 693 694 if (!ISSET(t->c_cflag, CHWFLOW)) { 695 if (sc->sc_tx_stopped) { 696 sc->sc_tx_stopped = 0; 697 scifstart(tp); 698 } 699 } 700 701 return (0); 702 } 703 704 static void 705 scif_iflush(struct scif_softc *sc) 706 { 707 int i; 708 709 i = scif_fdr_read() & SCFDR2_RECVCNT; 710 711 while (i > 0) { 712 (void)scif_frdr_read(); 713 scif_ssr_write(scif_ssr_read() & ~(SCSSR2_RDF | SCSSR2_DR)); 714 i--; 715 } 716 } 717 718 int 719 scifopen(dev_t dev, int flag, int mode, struct lwp *l) 720 { 721 struct scif_softc *sc; 722 struct tty *tp; 723 int s, s2; 724 int error; 725 726 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 727 if (sc == 0 || !ISSET(sc->sc_hwflags, SCIF_HW_DEV_OK) || 728 sc->sc_rbuf == NULL) 729 return (ENXIO); 730 731 if (!device_is_active(sc->sc_dev)) 732 return (ENXIO); 733 734 #ifdef KGDB 735 /* 736 * If this is the kgdb port, no other use is permitted. 737 */ 738 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) 739 return (EBUSY); 740 #endif /* KGDB */ 741 742 tp = sc->sc_tty; 743 744 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 745 return (EBUSY); 746 747 s = spltty(); 748 749 /* 750 * Do the following iff this is a first open. 751 */ 752 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 753 struct termios t; 754 755 tp->t_dev = dev; 756 757 s2 = splserial(); 758 759 /* Turn on interrupts. */ 760 scif_scr_write(scif_scr_read() | SCSCR2_TIE | SCSCR2_RIE); 761 762 splx(s2); 763 764 /* 765 * Initialize the termios status to the defaults. Add in the 766 * sticky bits from TIOCSFLAGS. 767 */ 768 t.c_ispeed = 0; 769 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 770 t.c_ospeed = scifcn_speed; /* XXX (msaitoh) */ 771 t.c_cflag = scifconscflag; 772 } else { 773 t.c_ospeed = TTYDEF_SPEED; 774 t.c_cflag = TTYDEF_CFLAG; 775 } 776 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 777 SET(t.c_cflag, CLOCAL); 778 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 779 SET(t.c_cflag, CRTSCTS); 780 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 781 SET(t.c_cflag, MDMBUF); 782 /* Make sure scifparam() will do something. */ 783 tp->t_ospeed = 0; 784 (void) scifparam(tp, &t); 785 tp->t_iflag = TTYDEF_IFLAG; 786 tp->t_oflag = TTYDEF_OFLAG; 787 tp->t_lflag = TTYDEF_LFLAG; 788 ttychars(tp); 789 ttsetwater(tp); 790 791 s2 = splserial(); 792 793 /* Clear the input ring, and unblock. */ 794 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 795 sc->sc_rbavail = scif_rbuf_size; 796 scif_iflush(sc); 797 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 798 #if 0 799 /* XXX (msaitoh) */ 800 scif_hwiflow(sc); 801 #endif 802 803 #ifdef SCIF_DEBUG 804 if (scif_debug) 805 scifstatus(sc, "scifopen "); 806 #endif 807 808 splx(s2); 809 } 810 811 splx(s); 812 813 error = ttyopen(tp, SCIFDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 814 if (error) 815 goto bad; 816 817 error = (*tp->t_linesw->l_open)(dev, tp); 818 if (error) 819 goto bad; 820 821 return (0); 822 823 bad: 824 825 return (error); 826 } 827 828 int 829 scifclose(dev_t dev, int flag, int mode, struct lwp *l) 830 { 831 struct scif_softc *sc; 832 struct tty *tp; 833 834 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 835 tp = sc->sc_tty; 836 837 /* XXX This is for cons.c. */ 838 if (!ISSET(tp->t_state, TS_ISOPEN)) 839 return (0); 840 841 (*tp->t_linesw->l_close)(tp, flag); 842 ttyclose(tp); 843 844 if (!device_is_active(sc->sc_dev)) 845 return (0); 846 847 return (0); 848 } 849 850 int 851 scifread(dev_t dev, struct uio *uio, int flag) 852 { 853 struct scif_softc *sc; 854 struct tty *tp; 855 856 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 857 tp = sc->sc_tty; 858 859 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 860 } 861 862 int 863 scifwrite(dev_t dev, struct uio *uio, int flag) 864 { 865 struct scif_softc *sc; 866 struct tty *tp; 867 868 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 869 tp = sc->sc_tty; 870 871 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 872 } 873 874 int 875 scifpoll(dev_t dev, int events, struct lwp *l) 876 { 877 struct scif_softc *sc; 878 struct tty *tp; 879 880 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 881 tp = sc->sc_tty; 882 883 return ((*tp->t_linesw->l_poll)(tp, events, l)); 884 } 885 886 struct tty * 887 sciftty(dev_t dev) 888 { 889 struct scif_softc *sc; 890 struct tty *tp; 891 892 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 893 tp = sc->sc_tty; 894 895 return (tp); 896 } 897 898 int 899 scifioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 900 { 901 struct scif_softc *sc; 902 struct tty *tp; 903 int error; 904 int s; 905 906 sc = device_lookup_private(&scif_cd, SCIFUNIT(dev)); 907 if (!device_is_active(sc->sc_dev)) 908 return (EIO); 909 910 tp = sc->sc_tty; 911 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 912 if (error != EPASSTHROUGH) 913 return (error); 914 915 error = ttioctl(tp, cmd, data, flag, l); 916 if (error != EPASSTHROUGH) 917 return (error); 918 919 error = 0; 920 921 s = splserial(); 922 923 switch (cmd) { 924 case TIOCSBRK: 925 scif_break(sc, 1); 926 break; 927 928 case TIOCCBRK: 929 scif_break(sc, 0); 930 break; 931 932 case TIOCGFLAGS: 933 *(int *)data = sc->sc_swflags; 934 break; 935 936 case TIOCSFLAGS: 937 error = kauth_authorize_device_tty(l->l_cred, 938 KAUTH_DEVICE_TTY_PRIVSET, tp); 939 if (error) 940 break; 941 sc->sc_swflags = *(int *)data; 942 break; 943 944 default: 945 error = EPASSTHROUGH; 946 break; 947 } 948 949 splx(s); 950 951 return (error); 952 } 953 954 static void 955 scif_schedrx(struct scif_softc *sc) 956 { 957 958 sc->sc_rx_ready = 1; 959 960 /* Wake up the poller. */ 961 softint_schedule(sc->sc_si); 962 } 963 964 static void 965 scif_break(struct scif_softc *sc, int onoff) 966 { 967 968 if (onoff) 969 scif_ssr_write(scif_ssr_read() & ~SCSSR2_TDFE); 970 else 971 scif_ssr_write(scif_ssr_read() | SCSSR2_TDFE); 972 973 #if 0 /* XXX */ 974 if (!sc->sc_heldchange) { 975 if (sc->sc_tx_busy) { 976 sc->sc_heldtbc = sc->sc_tbc; 977 sc->sc_tbc = 0; 978 sc->sc_heldchange = 1; 979 } else 980 scif_loadchannelregs(sc); 981 } 982 #endif 983 } 984 985 /* 986 * Stop output, e.g., for ^S or output flush. 987 */ 988 void 989 scifstop(struct tty *tp, int flag) 990 { 991 struct scif_softc *sc; 992 int s; 993 994 sc = device_lookup_private(&scif_cd, SCIFUNIT(tp->t_dev)); 995 996 s = splserial(); 997 if (ISSET(tp->t_state, TS_BUSY)) { 998 /* Stop transmitting at the next chunk. */ 999 sc->sc_tbc = 0; 1000 sc->sc_heldtbc = 0; 1001 if (!ISSET(tp->t_state, TS_TTSTOP)) 1002 SET(tp->t_state, TS_FLUSH); 1003 } 1004 splx(s); 1005 } 1006 1007 static void 1008 scifdiag(void *arg) 1009 { 1010 struct scif_softc *sc = arg; 1011 int overflows, floods; 1012 int s; 1013 1014 s = splserial(); 1015 overflows = sc->sc_overflows; 1016 sc->sc_overflows = 0; 1017 floods = sc->sc_floods; 1018 sc->sc_floods = 0; 1019 sc->sc_errors = 0; 1020 splx(s); 1021 1022 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1023 device_xname(sc->sc_dev), 1024 overflows, overflows == 1 ? "" : "s", 1025 floods, floods == 1 ? "" : "s"); 1026 } 1027 1028 static void 1029 scif_rxsoft(struct scif_softc *sc, struct tty *tp) 1030 { 1031 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1032 u_char *get, *end; 1033 u_int cc, scc; 1034 u_char ssr2; 1035 int code; 1036 int s; 1037 1038 end = sc->sc_ebuf; 1039 get = sc->sc_rbget; 1040 scc = cc = scif_rbuf_size - sc->sc_rbavail; 1041 1042 if (cc == scif_rbuf_size) { 1043 sc->sc_floods++; 1044 if (sc->sc_errors++ == 0) 1045 callout_reset(&sc->sc_diag_ch, 60 * hz, scifdiag, sc); 1046 } 1047 1048 while (cc) { 1049 code = get[0]; 1050 ssr2 = get[1]; 1051 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER | SCSSR2_PER)) { 1052 if (ISSET(ssr2, SCSSR2_BRK | SCSSR2_FER)) 1053 SET(code, TTY_FE); 1054 if (ISSET(ssr2, SCSSR2_PER)) 1055 SET(code, TTY_PE); 1056 } 1057 if ((*rint)(code, tp) == -1) { 1058 /* 1059 * The line discipline's buffer is out of space. 1060 */ 1061 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1062 /* 1063 * We're either not using flow control, or the 1064 * line discipline didn't tell us to block for 1065 * some reason. Either way, we have no way to 1066 * know when there's more space available, so 1067 * just drop the rest of the data. 1068 */ 1069 get += cc << 1; 1070 if (get >= end) 1071 get -= scif_rbuf_size << 1; 1072 cc = 0; 1073 } else { 1074 /* 1075 * Don't schedule any more receive processing 1076 * until the line discipline tells us there's 1077 * space available (through scifhwiflow()). 1078 * Leave the rest of the data in the input 1079 * buffer. 1080 */ 1081 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1082 } 1083 break; 1084 } 1085 get += 2; 1086 if (get >= end) 1087 get = sc->sc_rbuf; 1088 cc--; 1089 } 1090 1091 if (cc != scc) { 1092 sc->sc_rbget = get; 1093 s = splserial(); 1094 cc = sc->sc_rbavail += scc - cc; 1095 /* Buffers should be ok again, release possible block. */ 1096 if (cc >= sc->sc_r_lowat) { 1097 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1098 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1099 scif_scr_write(scif_scr_read() | SCSCR2_RIE); 1100 } 1101 #if 0 1102 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1103 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1104 scif_hwiflow(sc); 1105 } 1106 #endif 1107 } 1108 splx(s); 1109 } 1110 } 1111 1112 static void 1113 scif_txsoft(struct scif_softc *sc, struct tty *tp) 1114 { 1115 1116 CLR(tp->t_state, TS_BUSY); 1117 if (ISSET(tp->t_state, TS_FLUSH)) 1118 CLR(tp->t_state, TS_FLUSH); 1119 else 1120 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1121 (*tp->t_linesw->l_start)(tp); 1122 } 1123 1124 #if 0 /* XXX (msaitoh) */ 1125 static void 1126 scif_stsoft(struct scif_softc *sc, struct tty *tp) 1127 { 1128 u_char msr, delta; 1129 int s; 1130 1131 s = splserial(); 1132 msr = sc->sc_msr; 1133 delta = sc->sc_msr_delta; 1134 sc->sc_msr_delta = 0; 1135 splx(s); 1136 1137 if (ISSET(delta, sc->sc_msr_dcd)) { 1138 /* 1139 * Inform the tty layer that carrier detect changed. 1140 */ 1141 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1142 } 1143 1144 if (ISSET(delta, sc->sc_msr_cts)) { 1145 /* Block or unblock output according to flow control. */ 1146 if (ISSET(msr, sc->sc_msr_cts)) { 1147 sc->sc_tx_stopped = 0; 1148 (*tp->t_linesw->l_start)(tp); 1149 } else { 1150 sc->sc_tx_stopped = 1; 1151 } 1152 } 1153 1154 #ifdef SCIF_DEBUG 1155 if (scif_debug) 1156 scifstatus(sc, "scif_stsoft"); 1157 #endif 1158 } 1159 #endif /* 0 */ 1160 1161 static void 1162 scifsoft(void *arg) 1163 { 1164 struct scif_softc *sc = arg; 1165 struct tty *tp; 1166 1167 if (!device_is_active(sc->sc_dev)) 1168 return; 1169 1170 tp = sc->sc_tty; 1171 1172 if (sc->sc_rx_ready) { 1173 sc->sc_rx_ready = 0; 1174 scif_rxsoft(sc, tp); 1175 } 1176 1177 #if 0 1178 if (sc->sc_st_check) { 1179 sc->sc_st_check = 0; 1180 scif_stsoft(sc, tp); 1181 } 1182 #endif 1183 1184 if (sc->sc_tx_done) { 1185 sc->sc_tx_done = 0; 1186 scif_txsoft(sc, tp); 1187 } 1188 } 1189 1190 static int 1191 scifintr(void *arg) 1192 { 1193 struct scif_softc *sc = arg; 1194 u_char *put, *end; 1195 u_int cc; 1196 u_short ssr2; 1197 int count; 1198 1199 if (!device_is_active(sc->sc_dev)) 1200 return (0); 1201 1202 end = sc->sc_ebuf; 1203 put = sc->sc_rbput; 1204 cc = sc->sc_rbavail; 1205 1206 do { 1207 ssr2 = scif_ssr_read(); 1208 if (ISSET(ssr2, SCSSR2_BRK)) { 1209 scif_ssr_write(scif_ssr_read() 1210 & ~(SCSSR2_ER | SCSSR2_BRK | SCSSR2_DR)); 1211 #ifdef DDB 1212 if (ISSET(sc->sc_hwflags, SCIF_HW_CONSOLE)) { 1213 console_debugger(); 1214 } 1215 #endif /* DDB */ 1216 #ifdef KGDB 1217 if (ISSET(sc->sc_hwflags, SCIF_HW_KGDB)) { 1218 kgdb_connect(1); 1219 } 1220 #endif /* KGDB */ 1221 } 1222 count = scif_fdr_read() & SCFDR2_RECVCNT; 1223 if (count != 0) { 1224 for (;;) { 1225 u_char c = scif_frdr_read(); 1226 u_char err = (u_char)(scif_ssr_read() & 0x00ff); 1227 1228 scif_ssr_write(scif_ssr_read() 1229 & ~(SCSSR2_ER | SCSSR2_RDF | SCSSR2_DR)); 1230 #ifdef SH4 1231 if (CPU_IS_SH4) 1232 scif_lsr_write(scif_lsr_read() 1233 & ~SCLSR2_ORER); 1234 #endif 1235 if ((cc > 0) && (count > 0)) { 1236 put[0] = c; 1237 put[1] = err; 1238 put += 2; 1239 if (put >= end) 1240 put = sc->sc_rbuf; 1241 cc--; 1242 count--; 1243 } else 1244 break; 1245 } 1246 1247 /* 1248 * Current string of incoming characters ended because 1249 * no more data was available or we ran out of space. 1250 * Schedule a receive event if any data was received. 1251 * If we're out of space, turn off receive interrupts. 1252 */ 1253 sc->sc_rbput = put; 1254 sc->sc_rbavail = cc; 1255 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1256 sc->sc_rx_ready = 1; 1257 1258 /* 1259 * See if we are in danger of overflowing a buffer. If 1260 * so, use hardware flow control to ease the pressure. 1261 */ 1262 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1263 cc < sc->sc_r_hiwat) { 1264 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1265 #if 0 1266 scif_hwiflow(sc); 1267 #endif 1268 } 1269 1270 /* 1271 * If we're out of space, disable receive interrupts 1272 * until the queue has drained a bit. 1273 */ 1274 if (!cc) { 1275 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1276 scif_scr_write(scif_scr_read() & ~SCSCR2_RIE); 1277 } 1278 } else { 1279 if (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)) { 1280 scif_scr_write(scif_scr_read() 1281 & ~(SCSCR2_TIE | SCSCR2_RIE)); 1282 delay(10); 1283 scif_scr_write(scif_scr_read() 1284 | SCSCR2_TIE | SCSCR2_RIE); 1285 continue; 1286 } 1287 } 1288 } while (scif_ssr_read() & (SCSSR2_RDF | SCSSR2_DR)); 1289 1290 #if 0 1291 msr = bus_space_read_1(iot, ioh, scif_msr); 1292 delta = msr ^ sc->sc_msr; 1293 sc->sc_msr = msr; 1294 if (ISSET(delta, sc->sc_msr_mask)) { 1295 SET(sc->sc_msr_delta, delta); 1296 1297 /* 1298 * Pulse-per-second clock signal on edge of DCD? 1299 */ 1300 if (ISSET(delta, sc->sc_ppsmask)) { 1301 struct timeval tv; 1302 if (ISSET(msr, sc->sc_ppsmask) == 1303 sc->sc_ppsassert) { 1304 /* XXX nanotime() */ 1305 microtime(&tv); 1306 TIMEVAL_TO_TIMESPEC(&tv, 1307 &sc->ppsinfo.assert_timestamp); 1308 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 1309 timespecadd(&sc->ppsinfo.assert_timestamp, 1310 &sc->ppsparam.assert_offset, 1311 &sc->ppsinfo.assert_timestamp); 1312 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.assert_timestamp); 1313 } 1314 1315 #ifdef PPS_SYNC 1316 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 1317 hardpps(&tv, tv.tv_usec); 1318 #endif 1319 sc->ppsinfo.assert_sequence++; 1320 sc->ppsinfo.current_mode = 1321 sc->ppsparam.mode; 1322 1323 } else if (ISSET(msr, sc->sc_ppsmask) == 1324 sc->sc_ppsclear) { 1325 /* XXX nanotime() */ 1326 microtime(&tv); 1327 TIMEVAL_TO_TIMESPEC(&tv, 1328 &sc->ppsinfo.clear_timestamp); 1329 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 1330 timespecadd(&sc->ppsinfo.clear_timestamp, 1331 &sc->ppsparam.clear_offset, 1332 &sc->ppsinfo.clear_timestamp); 1333 TIMESPEC_TO_TIMEVAL(&tv, &sc->ppsinfo.clear_timestamp); 1334 } 1335 1336 #ifdef PPS_SYNC 1337 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 1338 hardpps(&tv, tv.tv_usec); 1339 #endif 1340 sc->ppsinfo.clear_sequence++; 1341 sc->ppsinfo.current_mode = 1342 sc->ppsparam.mode; 1343 } 1344 } 1345 1346 /* 1347 * Stop output immediately if we lose the output 1348 * flow control signal or carrier detect. 1349 */ 1350 if (ISSET(~msr, sc->sc_msr_mask)) { 1351 sc->sc_tbc = 0; 1352 sc->sc_heldtbc = 0; 1353 #ifdef SCIF_DEBUG 1354 if (scif_debug) 1355 scifstatus(sc, "scifintr "); 1356 #endif 1357 } 1358 1359 sc->sc_st_check = 1; 1360 } 1361 #endif 1362 1363 /* 1364 * Done handling any receive interrupts. See if data can be 1365 * transmitted as well. Schedule tx done event if no data left 1366 * and tty was marked busy. 1367 */ 1368 if (((scif_fdr_read() & SCFDR2_TXCNT) >> 8) != 16) { /* XXX (msaitoh) */ 1369 /* 1370 * If we've delayed a parameter change, do it now, and restart 1371 * output. 1372 */ 1373 if (sc->sc_heldchange) { 1374 sc->sc_heldchange = 0; 1375 sc->sc_tbc = sc->sc_heldtbc; 1376 sc->sc_heldtbc = 0; 1377 } 1378 1379 /* Output the next chunk of the contiguous buffer, if any. */ 1380 if (sc->sc_tbc > 0) { 1381 int n; 1382 int maxchars; 1383 int i; 1384 1385 n = sc->sc_tbc; 1386 maxchars = sc->sc_fifolen - 1387 ((scif_fdr_read() & SCFDR2_TXCNT) >> 8); 1388 if (n > maxchars) 1389 n = maxchars; 1390 1391 for (i = 0; i < n; i++) { 1392 scif_putc(*(sc->sc_tba)); 1393 sc->sc_tba++; 1394 } 1395 sc->sc_tbc -= n; 1396 } else { 1397 /* Disable transmit completion interrupts if necessary. */ 1398 #if 0 1399 if (ISSET(sc->sc_ier, IER_ETXRDY)) 1400 #endif 1401 scif_scr_write(scif_scr_read() & ~SCSCR2_TIE); 1402 1403 if (sc->sc_tx_busy) { 1404 sc->sc_tx_busy = 0; 1405 sc->sc_tx_done = 1; 1406 } 1407 } 1408 } 1409 1410 /* Wake up the poller. */ 1411 softint_schedule(sc->sc_si); 1412 1413 #ifdef RND_SCIF 1414 rnd_add_uint32(&sc->rnd_source, iir | lsr); 1415 #endif 1416 1417 return (1); 1418 } 1419 1420 void 1421 scifcnprobe(struct consdev *cp) 1422 { 1423 int maj; 1424 1425 /* locate the major number */ 1426 maj = cdevsw_lookup_major(&scif_cdevsw); 1427 1428 /* Initialize required fields. */ 1429 cp->cn_dev = makedev(maj, 0); 1430 #ifdef SCIFCONSOLE 1431 cp->cn_pri = CN_REMOTE; 1432 #else 1433 cp->cn_pri = CN_NORMAL; 1434 #endif 1435 } 1436 1437 void 1438 scifcninit(struct consdev *cp) 1439 { 1440 1441 InitializeScif(scifcn_speed); 1442 scifisconsole = 1; 1443 } 1444 1445 int 1446 scifcngetc(dev_t dev) 1447 { 1448 int c; 1449 int s; 1450 1451 s = splserial(); 1452 c = scif_getc(); 1453 splx(s); 1454 1455 return (c); 1456 } 1457 1458 void 1459 scifcnputc(dev_t dev, int c) 1460 { 1461 int s; 1462 1463 s = splserial(); 1464 scif_putc((u_char)c); 1465 splx(s); 1466 } 1467 1468 #ifdef KGDB 1469 int 1470 scif_kgdb_init(void) 1471 { 1472 1473 if (strcmp(kgdb_devname, "scif") != 0) 1474 return (1); 1475 1476 if (scifisconsole) 1477 return (1); /* can't share with console */ 1478 1479 InitializeScif(kgdb_rate); 1480 1481 kgdb_attach((int (*)(void *))scifcngetc, 1482 (void (*)(void *, int))scifcnputc, NULL); 1483 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 1484 kgdb_attached = 1; 1485 1486 return (0); 1487 } 1488 #endif /* KGDB */ 1489
Indexes created Mon Sep 22 13:09:51 GMT 2025