1 /* $NetBSD: exception.h,v 1.12 2009/05/16 10:11:50 nonaka Exp $ */ 2 3 /*- 4 * Copyright (c) 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #ifndef _SH3_EXCEPTION_H_ 30 #define _SH3_EXCEPTION_H_ 31 /* 32 * SH3/SH4 Exception handling. 33 */ 34 #include <sh3/devreg.h> 35 36 #ifdef _KERNEL 37 #define SH3_TRA 0xffffffd0 /* 32bit */ 38 #define SH3_EXPEVT 0xffffffd4 /* 32bit */ 39 #define SH3_INTEVT 0xffffffd8 /* 32bit */ 40 #define SH7709_INTEVT2 0xa4000000 /* 32bit */ 41 42 #define SH4_TRA 0xff000020 /* 32bit */ 43 #define SH4_EXPEVT 0xff000024 /* 32bit */ 44 #define SH4_INTEVT 0xff000028 /* 32bit */ 45 46 /* 47 * EXPEVT 48 */ 49 /* Reset exception */ 50 #define EXPEVT_RESET_POWER 0x000 /* Power-On reset */ 51 #define EXPEVT_RESET_MANUAL 0x020 /* Manual reset */ 52 #define EXPEVT_RESET_TLB_MULTI_HIT 0x140 /* SH4 only */ 53 54 /* General exception */ 55 #define EXPEVT_TLB_MISS_LD 0x040 /* TLB miss (load) */ 56 #define EXPEVT_TLB_MISS_ST 0x060 /* TLB miss (store) */ 57 #define EXPEVT_TLB_MOD 0x080 /* Initial page write */ 58 #define EXPEVT_TLB_PROT_LD 0x0a0 /* Protection violation (load) */ 59 #define EXPEVT_TLB_PROT_ST 0x0c0 /* Protection violation (store)*/ 60 #define EXPEVT_ADDR_ERR_LD 0x0e0 /* Address error (load) */ 61 #define EXPEVT_ADDR_ERR_ST 0x100 /* Address error (store) */ 62 #define EXPEVT_FPU 0x120 /* FPU exception */ 63 #define EXPEVT_TRAPA 0x160 /* Unconditional trap (TRAPA) */ 64 #define EXPEVT_RES_INST 0x180 /* Illegal instruction */ 65 #define EXPEVT_SLOT_INST 0x1a0 /* Illegal slot instruction */ 66 #define EXPEVT_BREAK 0x1e0 /* User break */ 67 #define EXPEVT_FPU_DISABLE 0x800 /* FPU disabled */ 68 #define EXPEVT_FPU_SLOT_DISABLE 0x820 /* Slot FPU disabled */ 69 70 /* Software bit */ 71 #define EXP_USER 0x001 /* exception from user-mode */ 72 73 #define _SH_TRA_BREAK 0xc3 /* magic number for debugger */ 74 75 /* 76 * INTEVT/INTEVT2 77 */ 78 /* External interrupt */ 79 #define SH_INTEVT_NMI 0x1c0 80 81 #define SH_INTEVT_TMU0_TUNI0 0x400 82 #define SH_INTEVT_TMU1_TUNI1 0x420 83 #define SH_INTEVT_TMU2_TUNI2 0x440 84 #define SH_INTEVT_TMU2_TICPI2 0x460 85 86 #define SH_INTEVT_SCI_ERI 0x4e0 87 #define SH_INTEVT_SCI_RXI 0x500 88 #define SH_INTEVT_SCI_TXI 0x520 89 #define SH_INTEVT_SCI_TEI 0x540 90 91 #define SH_INTEVT_WDT_ITI 0x560 92 93 #define SH_INTEVT_IRL9 0x320 94 #define SH_INTEVT_IRL11 0x360 95 #define SH_INTEVT_IRL13 0x3a0 96 97 #define SH4_INTEVT_SCIF_ERI 0x700 98 #define SH4_INTEVT_SCIF_RXI 0x720 99 #define SH4_INTEVT_SCIF_BRI 0x740 100 #define SH4_INTEVT_SCIF_TXI 0x760 101 102 #define SH7709_INTEVT2_IRQ0 0x600 103 #define SH7709_INTEVT2_IRQ1 0x620 104 #define SH7709_INTEVT2_IRQ2 0x640 105 #define SH7709_INTEVT2_IRQ3 0x660 106 #define SH7709_INTEVT2_IRQ4 0x680 107 #define SH7709_INTEVT2_IRQ5 0x6a0 108 109 #define SH7709_INTEVT2_PINT07 0x700 110 #define SH7709_INTEVT2_PINT8F 0x720 111 112 #define SH7709_INTEVT2_DEI0 0x800 113 #define SH7709_INTEVT2_DEI1 0x820 114 #define SH7709_INTEVT2_DEI2 0x840 115 #define SH7709_INTEVT2_DEI3 0x860 116 117 #define SH7709_INTEVT2_IRDA_ERI 0x880 118 #define SH7709_INTEVT2_IRDA_RXI 0x8a0 119 #define SH7709_INTEVT2_IRDA_BRI 0x8c0 120 #define SH7709_INTEVT2_IRDA_TXI 0x8e0 121 122 #define SH7709_INTEVT2_SCIF_ERI 0x900 123 #define SH7709_INTEVT2_SCIF_RXI 0x920 124 #define SH7709_INTEVT2_SCIF_BRI 0x940 125 #define SH7709_INTEVT2_SCIF_TXI 0x960 126 127 #define SH7709_INTEVT2_ADC 0x980 128 129 /* SH7750R, SH7751, SH7751R */ 130 #define SH4_INTEVT_IRL0 0x240 131 #define SH4_INTEVT_IRL1 0x2a0 132 #define SH4_INTEVT_IRL2 0x300 133 #define SH4_INTEVT_IRL3 0x360 134 135 #define SH4_INTEVT_IRQ0 0x200 136 #define SH4_INTEVT_IRQ1 0x220 137 #define SH4_INTEVT_IRQ2 0x240 138 #define SH4_INTEVT_IRQ3 0x260 139 #define SH4_INTEVT_IRQ4 0x280 140 #define SH4_INTEVT_IRQ5 0x2a0 141 #define SH4_INTEVT_IRQ6 0x2c0 142 #define SH4_INTEVT_IRQ7 0x2e0 143 #define SH4_INTEVT_IRQ8 0x300 144 #define SH4_INTEVT_IRQ9 0x320 145 #define SH4_INTEVT_IRQ10 0x340 146 #define SH4_INTEVT_IRQ11 0x360 147 #define SH4_INTEVT_IRQ12 0x380 148 #define SH4_INTEVT_IRQ13 0x3a0 149 #define SH4_INTEVT_IRQ14 0x3c0 150 #define SH4_INTEVT_IRQ15 0x3e0 151 152 #define SH4_INTEVT_GPIO 0x620 153 154 #define SH4_INTEVT_PCISERR 0xa00 155 #define SH4_INTEVT_PCIDMA3 0xa20 156 #define SH4_INTEVT_PCIDMA2 0xa40 157 #define SH4_INTEVT_PCIDMA1 0xa60 158 #define SH4_INTEVT_PCIDMA0 0xa80 159 #define SH4_INTEVT_PCIPWON 0xaa0 160 #define SH4_INTEVT_PCIPWDWN 0xac0 161 #define SH4_INTEVT_PCIERR 0xae0 162 163 #define SH4_INTEVT_TMU3 0xb00 164 #define SH4_INTEVT_TMU4 0xb80 165 166 #ifndef _LOCORE 167 168 #if defined(SH3) && defined(SH4) 169 extern uint32_t __sh_TRA; 170 extern uint32_t __sh_EXPEVT; 171 extern uint32_t __sh_INTEVT; 172 #endif /* SH3 && SH4 */ 173 174 extern const char * const exp_type[]; 175 extern const int exp_types; 176 177 #endif /* !_LOCORE */ 178 179 #endif /* _KERNEL */ 180 #endif /* !_SH3_EXCEPTION_H_ */ 181
Indexes created Sat Sep 20 22:09:52 GMT 2025