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exception.h revision 1.10
      1  1.10       uwe /*	$NetBSD: exception.h,v 1.10 2008/03/23 05:45:45 uwe Exp $	*/
      2   1.1       uch 
      3   1.1       uch /*-
      4   1.1       uch  * Copyright (c) 2002 The NetBSD Foundation, Inc.
      5   1.1       uch  * All rights reserved.
      6   1.1       uch  *
      7   1.1       uch  * Redistribution and use in source and binary forms, with or without
      8   1.1       uch  * modification, are permitted provided that the following conditions
      9   1.1       uch  * are met:
     10   1.1       uch  * 1. Redistributions of source code must retain the above copyright
     11   1.1       uch  *    notice, this list of conditions and the following disclaimer.
     12   1.1       uch  * 2. Redistributions in binary form must reproduce the above copyright
     13   1.1       uch  *    notice, this list of conditions and the following disclaimer in the
     14   1.1       uch  *    documentation and/or other materials provided with the distribution.
     15   1.1       uch  * 3. All advertising materials mentioning features or use of this software
     16   1.1       uch  *    must display the following acknowledgement:
     17   1.1       uch  *        This product includes software developed by the NetBSD
     18   1.1       uch  *        Foundation, Inc. and its contributors.
     19   1.1       uch  * 4. Neither the name of The NetBSD Foundation nor the names of its
     20   1.1       uch  *    contributors may be used to endorse or promote products derived
     21   1.1       uch  *    from this software without specific prior written permission.
     22   1.1       uch  *
     23   1.1       uch  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     24   1.1       uch  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     25   1.1       uch  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     26   1.1       uch  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     27   1.1       uch  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     28   1.1       uch  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     29   1.1       uch  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     30   1.1       uch  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     31   1.1       uch  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     32   1.1       uch  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     33   1.1       uch  * POSSIBILITY OF SUCH DAMAGE.
     34   1.1       uch  */
     35   1.1       uch 
     36   1.1       uch #ifndef _SH3_EXCEPTION_H_
     37   1.1       uch #define	_SH3_EXCEPTION_H_
     38   1.3       uch /*
     39   1.3       uch  * SH3/SH4 Exception handling.
     40   1.3       uch  */
     41   1.1       uch #include <sh3/devreg.h>
     42   1.1       uch 
     43   1.3       uch #ifdef _KERNEL
     44   1.2       uch #define	SH3_TRA			0xffffffd0	/* 32bit */
     45   1.2       uch #define	SH3_EXPEVT		0xffffffd4	/* 32bit */
     46   1.2       uch #define	SH3_INTEVT		0xffffffd8	/* 32bit */
     47   1.2       uch #define	SH7709_INTEVT2		0xa4000000	/* 32bit */
     48   1.1       uch 
     49   1.2       uch #define	SH4_TRA			0xff000020	/* 32bit */
     50   1.2       uch #define	SH4_EXPEVT		0xff000024	/* 32bit */
     51   1.2       uch #define	SH4_INTEVT		0xff000028	/* 32bit */
     52   1.1       uch 
     53   1.3       uch /*
     54   1.3       uch  * EXPEVT
     55   1.3       uch  */
     56   1.3       uch /* Reset exception */
     57   1.3       uch #define	EXPEVT_RESET_POWER	0x000	/* Power-On reset */
     58   1.3       uch #define	EXPEVT_RESET_MANUAL	0x020	/* Manual reset */
     59   1.3       uch #define	EXPEVT_RESET_TLB_MULTI_HIT	0x140	/* SH4 only */
     60   1.3       uch 
     61   1.3       uch /* General exception */
     62   1.3       uch #define	EXPEVT_TLB_MISS_LD	0x040	/* TLB miss (load) */
     63   1.3       uch #define	EXPEVT_TLB_MISS_ST	0x060	/* TLB miss (store) */
     64   1.3       uch #define	EXPEVT_TLB_MOD		0x080	/* Initial page write */
     65   1.3       uch #define	EXPEVT_TLB_PROT_LD	0x0a0	/* Protection violation (load) */
     66   1.3       uch #define	EXPEVT_TLB_PROT_ST	0x0c0	/* Protection violation (store)*/
     67   1.3       uch #define	EXPEVT_ADDR_ERR_LD	0x0e0	/* Address error (load) */
     68   1.3       uch #define	EXPEVT_ADDR_ERR_ST	0x100	/* Address error (store) */
     69   1.3       uch #define	EXPEVT_FPU		0x120	/* FPU exception */
     70   1.3       uch #define	EXPEVT_TRAPA		0x160	/* Unconditional trap (TRAPA) */
     71   1.3       uch #define	EXPEVT_RES_INST		0x180	/* Illegal instruction */
     72   1.3       uch #define	EXPEVT_SLOT_INST	0x1a0	/* Illegal slot instruction */
     73   1.3       uch #define	EXPEVT_BREAK		0x1e0	/* User break */
     74   1.3       uch #define	EXPEVT_FPU_DISABLE	0x800	/* FPU disabled */
     75   1.3       uch #define	EXPEVT_FPU_SLOT_DISABLE	0x820	/* Slot FPU disabled */
     76   1.3       uch 
     77   1.3       uch /* Software bit */
     78   1.3       uch #define	EXP_USER		0x001	/* exception from user-mode */
     79   1.3       uch 
     80   1.3       uch #define	_SH_TRA_BREAK		0xc3	/* magic number for debugger */
     81   1.3       uch 
     82   1.3       uch /*
     83   1.3       uch  * INTEVT/INTEVT2
     84   1.3       uch  */
     85   1.3       uch /* External interrupt */
     86   1.1       uch #define	SH_INTEVT_NMI		0x1c0
     87   1.1       uch 
     88   1.1       uch #define	SH_INTEVT_TMU0_TUNI0	0x400
     89   1.1       uch #define	SH_INTEVT_TMU1_TUNI1	0x420
     90   1.1       uch #define	SH_INTEVT_TMU2_TUNI2	0x440
     91   1.1       uch #define	SH_INTEVT_TMU2_TICPI2	0x460
     92   1.1       uch 
     93   1.1       uch #define	SH_INTEVT_SCI_ERI	0x4e0
     94   1.1       uch #define	SH_INTEVT_SCI_RXI	0x500
     95   1.1       uch #define	SH_INTEVT_SCI_TXI	0x520
     96   1.1       uch #define	SH_INTEVT_SCI_TEI	0x540
     97   1.1       uch 
     98   1.1       uch #define	SH_INTEVT_WDT_ITI	0x560
     99   1.1       uch 
    100   1.1       uch #define	SH_INTEVT_IRL9		0x320
    101   1.1       uch #define	SH_INTEVT_IRL11		0x360
    102   1.1       uch #define	SH_INTEVT_IRL13		0x3a0
    103   1.1       uch 
    104   1.1       uch #define	SH4_INTEVT_SCIF_ERI	0x700
    105   1.1       uch #define	SH4_INTEVT_SCIF_RXI	0x720
    106   1.1       uch #define	SH4_INTEVT_SCIF_BRI	0x740
    107   1.1       uch #define	SH4_INTEVT_SCIF_TXI	0x760
    108   1.1       uch 
    109   1.4       uwe #define	SH7709_INTEVT2_IRQ0	0x600
    110   1.4       uwe #define	SH7709_INTEVT2_IRQ1	0x620
    111   1.4       uwe #define	SH7709_INTEVT2_IRQ2	0x640
    112   1.4       uwe #define	SH7709_INTEVT2_IRQ3	0x660
    113   1.4       uwe #define	SH7709_INTEVT2_IRQ4	0x680
    114   1.4       uwe #define	SH7709_INTEVT2_IRQ5	0x6a0
    115   1.4       uwe 
    116   1.4       uwe #define	SH7709_INTEVT2_PINT07	0x700
    117   1.4       uwe #define	SH7709_INTEVT2_PINT8F	0x720
    118   1.4       uwe 
    119   1.5       uwe #define SH7709_INTEVT2_DEI0	0x800
    120   1.5       uwe #define SH7709_INTEVT2_DEI1	0x820
    121   1.5       uwe #define SH7709_INTEVT2_DEI2	0x840
    122   1.5       uwe #define SH7709_INTEVT2_DEI3	0x860
    123   1.5       uwe 
    124   1.4       uwe #define	SH7709_INTEVT2_IRDA_ERI	0x880
    125   1.4       uwe #define	SH7709_INTEVT2_IRDA_RXI	0x8a0
    126   1.4       uwe #define	SH7709_INTEVT2_IRDA_BRI	0x8c0
    127   1.4       uwe #define	SH7709_INTEVT2_IRDA_TXI	0x8e0
    128   1.4       uwe 
    129   1.1       uch #define	SH7709_INTEVT2_SCIF_ERI	0x900
    130   1.1       uch #define	SH7709_INTEVT2_SCIF_RXI	0x920
    131   1.1       uch #define	SH7709_INTEVT2_SCIF_BRI	0x940
    132   1.1       uch #define	SH7709_INTEVT2_SCIF_TXI	0x960
    133   1.1       uch 
    134   1.4       uwe #define	SH7709_INTEVT2_ADC	0x980
    135   1.1       uch 
    136   1.6  christos /* SH7750R, SH7751, SH7751R */
    137   1.6  christos #define	SH4_INTEVT_IRL0		0x240
    138   1.6  christos #define	SH4_INTEVT_IRL1		0x2a0
    139   1.6  christos #define	SH4_INTEVT_IRL2		0x300
    140   1.6  christos #define	SH4_INTEVT_IRL3		0x360
    141   1.6  christos 
    142   1.6  christos #define	SH4_INTEVT_IRQ0		0x200
    143   1.6  christos #define	SH4_INTEVT_IRQ1		0x220
    144   1.6  christos #define	SH4_INTEVT_IRQ2		0x240
    145   1.6  christos #define	SH4_INTEVT_IRQ3		0x260
    146   1.6  christos #define	SH4_INTEVT_IRQ4		0x280
    147   1.6  christos #define	SH4_INTEVT_IRQ5		0x2a0
    148   1.6  christos #define	SH4_INTEVT_IRQ6		0x2c0
    149   1.6  christos #define	SH4_INTEVT_IRQ7		0x2e0
    150   1.6  christos #define	SH4_INTEVT_IRQ8		0x300
    151   1.6  christos #define	SH4_INTEVT_IRQ9		0x320
    152   1.6  christos #define	SH4_INTEVT_IRQ10	0x340
    153   1.6  christos #define	SH4_INTEVT_IRQ11	0x360
    154   1.6  christos #define	SH4_INTEVT_IRQ12	0x380
    155   1.6  christos #define	SH4_INTEVT_IRQ13	0x3a0
    156   1.6  christos #define	SH4_INTEVT_IRQ14	0x3c0
    157   1.6  christos #define	SH4_INTEVT_IRQ15	0x3e0
    158   1.6  christos 
    159  1.10       uwe #define	SH4_INTEVT_PCISERR	0xa00
    160  1.10       uwe #define	SH4_INTEVT_PCIDMA3	0xa20
    161  1.10       uwe #define	SH4_INTEVT_PCIDMA2	0xa40
    162  1.10       uwe #define	SH4_INTEVT_PCIDMA1	0xa60
    163  1.10       uwe #define	SH4_INTEVT_PCIDMA0	0xa80
    164  1.10       uwe #define	SH4_INTEVT_PCIPWON	0xaa0
    165  1.10       uwe #define	SH4_INTEVT_PCIPWDWN	0xac0
    166  1.10       uwe #define	SH4_INTEVT_PCIERR	0xae0
    167  1.10       uwe 
    168   1.6  christos #define	SH4_INTEVT_TMU3		0xb00
    169   1.6  christos #define	SH4_INTEVT_TMU4		0xb80
    170   1.6  christos 
    171   1.1       uch #ifndef _LOCORE
    172   1.9       uwe 
    173   1.1       uch #if defined(SH3) && defined(SH4)
    174   1.8       uwe extern uint32_t __sh_TRA;
    175   1.8       uwe extern uint32_t __sh_EXPEVT;
    176   1.8       uwe extern uint32_t __sh_INTEVT;
    177   1.1       uch #endif /* SH3 && SH4 */
    178   1.9       uwe 
    179   1.9       uwe extern const char * const exp_type[];
    180   1.9       uwe extern const int exp_types;
    181   1.9       uwe 
    182   1.1       uch #endif /* !_LOCORE */
    183   1.9       uwe 
    184   1.3       uch #endif /* _KERNEL */
    185   1.1       uch #endif /* !_SH3_EXCEPTION_H_ */
    186