1 /* $NetBSD: chipsfb_ofbus.c,v 1.6 2023/12/20 15:34:45 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2011 Michael Lorenz 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 /* 29 * C&T 6555x series. 30 * ofbus attachment for chipsfb 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: chipsfb_ofbus.c,v 1.6 2023/12/20 15:34:45 thorpej Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 #include <sys/buf.h> 41 #include <sys/bus.h> 42 #include <uvm/uvm.h> 43 44 #include <machine/intr.h> 45 #include <machine/ofw.h> 46 #include <machine/pmap.h> 47 48 #include <dev/isa/isavar.h> 49 50 #include <dev/wscons/wsdisplayvar.h> 51 #include <dev/wscons/wsconsio.h> 52 #include <dev/rasops/rasops.h> 53 #include <dev/wscons/wsdisplay_vconsvar.h> 54 #include <dev/ofw/openfirm.h> 55 56 #include <dev/ic/ct65550reg.h> 57 #include <dev/ic/ct65550var.h> 58 #include <shark/ofw/igsfb_ofbusvar.h> 59 60 static int chipsfb_ofbus_is_console(int); 61 62 static int chipsfb_ofbus_console = 0; 63 static int chipsfb_ofbus_phandle = 0; 64 65 66 67 static int chipsfb_ofbus_match(device_t, struct cfdata *, void *); 68 static void chipsfb_ofbus_attach(device_t, device_t, void *); 69 static paddr_t chipsfb_ofbus_mmap(void *, void *, off_t, int); 70 int chipsfb_ofbus_cnattach(bus_space_tag_t, bus_space_tag_t); 71 72 CFATTACH_DECL_NEW(chipsfb_ofbus, sizeof(struct chipsfb_softc), 73 chipsfb_ofbus_match, chipsfb_ofbus_attach, NULL, NULL); 74 75 static const struct device_compatible_entry compat_data[] = { 76 { .compat = "CHPS,ct65550" }, 77 DEVICE_COMPAT_EOL 78 }; 79 80 vaddr_t chipsfb_mem_vaddr = 0, chipsfb_mmio_vaddr = 0; 81 paddr_t chipsfb_mem_paddr; 82 extern paddr_t isa_io_physaddr; 83 struct bus_space chipsfb_memt, chipsfb_iot; 84 85 #if (NCHIPSFB_OFBUS > 0) || (NVGA_OFBUS > 0) 86 extern int console_ihandle; 87 #endif 88 89 int 90 chipsfb_ofbus_cnattach(bus_space_tag_t iot, bus_space_tag_t memt) 91 { 92 int chosen_phandle, ct_node; 93 int stdout_ihandle, stdout_phandle; 94 uint32_t regs[16]; 95 96 stdout_phandle = 0; 97 98 /* first find out if there's a ct65550 at all in this machine */ 99 ct_node = OF_finddevice("/vlbus/display"); 100 if (ct_node == -1) 101 return ENXIO; 102 if (!of_compatible_match(ct_node, compat_data)) 103 return ENXIO; 104 105 /* 106 * now we know there's a CyberPro in this machine so map it into 107 * kernel space, even if it's not the console 108 */ 109 if (OF_getprop(ct_node, "reg", regs, sizeof(regs)) <= 0) 110 return ENXIO; 111 112 chipsfb_mem_paddr = be32toh(regs[10]); 113 /* 2MB RAM aperture, bufferable and not cacheable */ 114 chipsfb_mem_vaddr = ofw_map(chipsfb_mem_paddr, 0x00200000, L2_B); 115 /* 128kB MMIO registers */ 116 chipsfb_mmio_vaddr = ofw_map(chipsfb_mem_paddr + CT_OFF_BITBLT, 117 0x00020000, 0); 118 119 memcpy(&chipsfb_memt, memt, sizeof(struct bus_space)); 120 chipsfb_memt.bs_cookie = (void *)chipsfb_mem_vaddr; 121 memcpy(&chipsfb_iot, iot, sizeof(struct bus_space)); 122 123 /* 124 * check if the firmware output device is indeed the ct65550 125 */ 126 if ((chosen_phandle = OF_finddevice("/chosen")) == -1 || 127 OF_getprop(chosen_phandle, "stdout", &stdout_ihandle, 128 sizeof(stdout_ihandle)) != sizeof(stdout_ihandle)) { 129 return ENXIO; 130 } 131 stdout_ihandle = of_decode_int((void *)&stdout_ihandle); 132 stdout_phandle = OF_instance_to_package(stdout_ihandle); 133 134 if (stdout_phandle != ct_node) 135 return ENXIO; 136 137 138 chipsfb_ofbus_console = 1; 139 chipsfb_ofbus_phandle = stdout_phandle; 140 #if (NCHIPSFB_OFBUS > 0) || (NVGA_OFBUS > 0) 141 console_ihandle = stdout_ihandle; 142 #endif 143 /* we're all set, now let's wait for chipsfb to attach */ 144 145 return 0; 146 } 147 148 static int 149 chipsfb_ofbus_is_console(int phandle) 150 { 151 152 return chipsfb_ofbus_console && (phandle == chipsfb_ofbus_phandle); 153 } 154 155 156 static int 157 chipsfb_ofbus_match(device_t parent, struct cfdata *match, void *aux) 158 { 159 struct ofbus_attach_args *oba = aux; 160 161 /* beat vga etc. */ 162 return of_compatible_match(oba->oba_phandle, compat_data) * 10; 163 } 164 165 static void 166 chipsfb_ofbus_attach(device_t parent, device_t self, void *aux) 167 { 168 struct chipsfb_softc *sc = device_private(self); 169 struct ofbus_attach_args *oba = aux; 170 prop_dictionary_t dict; 171 int isconsole, width, height, linebytes, depth; 172 173 printf(": Chips & Technologies 65550 at 0x%08x\n", 174 (uint32_t)chipsfb_mem_paddr); 175 176 sc->sc_dev = self; 177 sc->sc_memt = &chipsfb_memt; 178 sc->sc_iot = &chipsfb_iot; 179 sc->sc_fb = chipsfb_mem_paddr; 180 sc->sc_fbsize = 0x00800000; /* 8MB aperture */ 181 sc->sc_fbh = chipsfb_mem_vaddr; 182 sc->sc_mmregh = chipsfb_mmio_vaddr; 183 sc->sc_ioregh = isa_io_data_vaddr(); 184 sc->sc_mmap = chipsfb_ofbus_mmap; 185 sc->sc_ioctl = NULL; 186 sc->memsize = 0x00200000; 187 188 dict = device_properties(sc->sc_dev); 189 if (OF_getprop(oba->oba_phandle, "width", &width, sizeof(width)) == 4) { 190 width = be32toh(width); 191 } else 192 width = 640; 193 if (OF_getprop(oba->oba_phandle, "height", &height, sizeof(height)) 194 == 4) { 195 height = be32toh(height); 196 } else 197 height = 480; 198 if (OF_getprop(oba->oba_phandle, "depth", &depth, sizeof(depth)) == 4) { 199 depth = be32toh(depth); 200 } else 201 depth = 8; 202 if (OF_getprop(oba->oba_phandle, "linebytes", &linebytes, 203 sizeof(linebytes)) == 4) { 204 linebytes = be32toh(linebytes); 205 } else 206 linebytes = width * (depth >> 3); 207 isconsole = chipsfb_ofbus_is_console(oba->oba_phandle); 208 209 prop_dictionary_set_uint32(dict, "width", width); 210 prop_dictionary_set_uint32(dict, "height", height); 211 prop_dictionary_set_uint32(dict, "linebytes", linebytes); 212 prop_dictionary_set_uint32(dict, "depth", depth); 213 prop_dictionary_set_bool(dict, "is_console", isconsole); 214 215 chipsfb_do_attach(sc); 216 } 217 218 static paddr_t 219 chipsfb_ofbus_mmap(void *v, void *vs, off_t offset, int prot) 220 { 221 222 #ifdef PCI_MAGIC_IO_RANGE 223 /* access to IO ports */ 224 if ((offset >= PCI_MAGIC_IO_RANGE) && 225 (offset < (PCI_MAGIC_IO_RANGE + 0x10000))) { 226 paddr_t pa; 227 228 pa = isa_io_physaddr + offset - PCI_MAGIC_IO_RANGE; 229 return arm_btop(pa); 230 } 231 #endif 232 233 if ((offset >= chipsfb_mem_paddr) && 234 (offset < (chipsfb_mem_paddr + CT_OFF_BITBLT))) { 235 return (arm_btop(offset) | ARM32_MMAP_WRITECOMBINE); 236 } else if ((offset >= (chipsfb_mem_paddr + CT_OFF_BITBLT)) && 237 (offset < (chipsfb_mem_paddr + 0x00800000))) { 238 return arm_btop(offset); 239 } else if ((offset >= 0xa0000) && 240 (offset < 0xbffff)) { 241 return (arm_btop(offset) | ARM32_MMAP_WRITECOMBINE); 242 } 243 244 return -1; 245 } 246
Indexes created Fri Sep 26 20:09:58 GMT 2025