1 /* $NetBSD: fdreg.h,v 1.10 2005/12/11 12:19:05 christos Exp $ */ 2 3 /*- 4 * Copyright (c) 1991 The Regents of the University of California. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the University nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * @(#)fdreg.h 7.1 (Berkeley) 5/9/91 32 */ 33 34 /* 35 * AT floppy controller registers and bitfields 36 */ 37 38 /* uses NEC765 controller */ 39 #include <dev/ic/nec765reg.h> 40 41 /* 42 * Register offsets for the 82077 controller. 43 */ 44 #define FDREG77_STATUSA 0 45 #define FDREG77_STATUSB 1 46 #define FDREG77_DOR 2 /* Digital Output Register (R/W) */ 47 #define FDREG77_TDR 3 /* Tape Control Register (R/W) */ 48 #define FDREG77_MSR 4 /* Main Status Register (R) */ 49 #define FDREG77_DRS 4 /* Data Rate Select Register (W) */ 50 #define FDREG77_FIFO 5 /* Data (FIFO) register (R/W) */ 51 #define FDREG77_DIR 7 /* Digital Input Register (R) */ 52 #define FDREG77_CCR 7 /* Configuration Control (W) */ 53 54 /* 55 * Register offsets for the 82072 controller. 56 */ 57 #define FDREG72_MSR 0 /* Main Status Register (R) */ 58 #define FDREG72_DRS 0 /* Data Rate Select Register (W) */ 59 #define FDREG72_FIFO 1 /* Data (FIFO) register (R/W) */ 60 61 62 /* Data Select Register bits */ 63 #define DRS_RESET 0x80 64 #define DRS_POWER 0x40 65 #define DRS_PLL 0x20 66 #define FDC_500KBPS 0x00 /* 500KBPS MFM drive transfer rate */ 67 #define FDC_300KBPS 0x01 /* 300KBPS MFM drive transfer rate */ 68 #define FDC_250KBPS 0x02 /* 250KBPS MFM drive transfer rate */ 69 #define FDC_125KBPS 0x03 /* 125KBPS FM drive transfer rate */ 70 71 /* Digital Output Register bits (modified on suns) */ 72 #define FDO_DS 0x01 /* floppy device select (neg) */ 73 #define FDO_FRST 0x04 /* floppy controller reset (neg) */ 74 #define FDO_FDMAEN 0x08 /* enable floppy DMA and Interrupt */ 75 #define FDO_MOEN(n) ((1 << n) << 4) /* motor enable */ 76 #define FDO_DEN 0x40 /* Density select */ 77 #define FDO_EJ 0x80 /* Eject disk */ 78 79 /* Digital Input Register bits */ 80 #define FDI_DCHG 0x80 /* diskette has been changed */ 81 82 /* XXX - find a place for these... */ 83 #define NE7CMD_CFG 0x13 84 #define CFG_EIS 0x40 85 #define CFG_EFIFO 0x20 86 #define CFG_POLL 0x10 87 #define CFG_THRHLD_MASK 0x0f 88 89 #define NE7CMD_LOCK 0x14 90 #define CFG_LOCK 0x80 91 92 #define NE7CMD_MOTOR 0x0b 93 #define MOTOR_ON 0x80 94 95 #define NE7CMD_DUMPREG 0x0e 96 #define NE7CMD_VERSION 0x10 97 98 #define ST1_OVERRUN 0x10 99 100 #define NE7_SPECIFY_NODMA 0x01 101
Indexes created Sat Sep 20 22:09:52 GMT 2025