fdreg.h revision 1.8 1 1.8 pk /* $NetBSD: fdreg.h,v 1.8 2003/07/11 12:09:13 pk Exp $ */
2 1.1 pk
3 1.1 pk /*-
4 1.1 pk * Copyright (c) 1991 The Regents of the University of California.
5 1.1 pk * All rights reserved.
6 1.1 pk *
7 1.1 pk * Redistribution and use in source and binary forms, with or without
8 1.1 pk * modification, are permitted provided that the following conditions
9 1.1 pk * are met:
10 1.1 pk * 1. Redistributions of source code must retain the above copyright
11 1.1 pk * notice, this list of conditions and the following disclaimer.
12 1.1 pk * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 pk * notice, this list of conditions and the following disclaimer in the
14 1.1 pk * documentation and/or other materials provided with the distribution.
15 1.1 pk * 3. All advertising materials mentioning features or use of this software
16 1.1 pk * must display the following acknowledgement:
17 1.1 pk * This product includes software developed by the University of
18 1.1 pk * California, Berkeley and its contributors.
19 1.1 pk * 4. Neither the name of the University nor the names of its contributors
20 1.1 pk * may be used to endorse or promote products derived from this software
21 1.1 pk * without specific prior written permission.
22 1.1 pk *
23 1.1 pk * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24 1.1 pk * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 1.1 pk * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 1.1 pk * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27 1.1 pk * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28 1.1 pk * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29 1.1 pk * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30 1.1 pk * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31 1.1 pk * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32 1.1 pk * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33 1.1 pk * SUCH DAMAGE.
34 1.1 pk *
35 1.1 pk * @(#)fdreg.h 7.1 (Berkeley) 5/9/91
36 1.1 pk */
37 1.1 pk
38 1.1 pk /*
39 1.1 pk * AT floppy controller registers and bitfields
40 1.1 pk */
41 1.1 pk
42 1.1 pk /* uses NEC765 controller */
43 1.4 cgd #include <dev/ic/nec765reg.h>
44 1.1 pk
45 1.7 pk /*
46 1.7 pk * Register offsets for the 82077 controller.
47 1.7 pk */
48 1.7 pk #define FDREG77_STATUSA 0
49 1.7 pk #define FDREG77_STATUSB 1
50 1.7 pk #define FDREG77_DOR 2 /* Digital Output Register (R/W) */
51 1.7 pk #define FDREG77_TDR 3 /* Tape Control Register (R/W) */
52 1.7 pk #define FDREG77_MSR 4 /* Main Status Register (R) */
53 1.7 pk #define FDREG77_DRS 4 /* Data Rate Select Register (W) */
54 1.7 pk #define FDREG77_FIFO 5 /* Data (FIFO) register (R/W) */
55 1.7 pk #define FDREG77_DIR 7 /* Digital Input Register (R) */
56 1.7 pk #define FDREG77_CCR 7 /* Configuration Control (W) */
57 1.7 pk
58 1.7 pk /*
59 1.8 pk * Register offsets for the 82072 controller.
60 1.7 pk */
61 1.7 pk #define FDREG72_MSR 0 /* Main Status Register (R) */
62 1.7 pk #define FDREG72_DRS 0 /* Data Rate Select Register (W) */
63 1.7 pk #define FDREG72_FIFO 1 /* Data (FIFO) register (R/W) */
64 1.7 pk
65 1.1 pk
66 1.2 pk /* Data Select Register bits */
67 1.2 pk #define DRS_RESET 0x80
68 1.2 pk #define DRS_POWER 0x40
69 1.2 pk #define DRS_PLL 0x20
70 1.2 pk #define FDC_500KBPS 0x00 /* 500KBPS MFM drive transfer rate */
71 1.2 pk #define FDC_300KBPS 0x01 /* 300KBPS MFM drive transfer rate */
72 1.2 pk #define FDC_250KBPS 0x02 /* 250KBPS MFM drive transfer rate */
73 1.2 pk #define FDC_125KBPS 0x03 /* 125KBPS FM drive transfer rate */
74 1.2 pk
75 1.6 pk /* Digital Output Register bits (modified on suns) */
76 1.6 pk #define FDO_DS 0x01 /* floppy device select (neg) */
77 1.6 pk #define FDO_FRST 0x04 /* floppy controller reset (neg) */
78 1.1 pk #define FDO_FDMAEN 0x08 /* enable floppy DMA and Interrupt */
79 1.6 pk #define FDO_MOEN(n) ((1 << n) << 4) /* motor enable */
80 1.6 pk #define FDO_DEN 0x40 /* Density select */
81 1.6 pk #define FDO_EJ 0x80 /* Eject disk */
82 1.1 pk
83 1.8 pk /* Digital Input Register bits */
84 1.1 pk #define FDI_DCHG 0x80 /* diskette has been changed */
85 1.1 pk
86 1.1 pk /* XXX - find a place for these... */
87 1.1 pk #define NE7CMD_CFG 0x13
88 1.1 pk #define CFG_EIS 0x40
89 1.1 pk #define CFG_EFIFO 0x20
90 1.1 pk #define CFG_POLL 0x10
91 1.2 pk #define CFG_THRHLD_MASK 0x0f
92 1.1 pk
93 1.1 pk #define NE7CMD_LOCK 0x14
94 1.1 pk #define CFG_LOCK 0x80
95 1.1 pk
96 1.1 pk #define NE7CMD_MOTOR 0x0b
97 1.1 pk #define MOTOR_ON 0x80
98 1.1 pk
99 1.1 pk #define NE7CMD_DUMPREG 0x0e
100 1.1 pk #define NE7CMD_VERSION 0x10
101 1.1 pk
102 1.2 pk #define ST1_OVERRUN 0x10
103 1.2 pk
104 1.6 pk #define NE7_SPECIFY_NODMA 0x01
105