obio.c revision 1.50.4.5 1 1.50.4.5 nathanw /* $NetBSD: obio.c,v 1.50.4.5 2002/10/18 02:39:54 nathanw Exp $ */
2 1.50.4.2 nathanw
3 1.50.4.2 nathanw /*-
4 1.50.4.2 nathanw * Copyright (c) 1997,1998 The NetBSD Foundation, Inc.
5 1.50.4.2 nathanw * All rights reserved.
6 1.50.4.2 nathanw *
7 1.50.4.2 nathanw * This code is derived from software contributed to The NetBSD Foundation
8 1.50.4.2 nathanw * by Paul Kranenburg.
9 1.50.4.2 nathanw *
10 1.50.4.2 nathanw * Redistribution and use in source and binary forms, with or without
11 1.50.4.2 nathanw * modification, are permitted provided that the following conditions
12 1.50.4.2 nathanw * are met:
13 1.50.4.2 nathanw * 1. Redistributions of source code must retain the above copyright
14 1.50.4.2 nathanw * notice, this list of conditions and the following disclaimer.
15 1.50.4.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
16 1.50.4.2 nathanw * notice, this list of conditions and the following disclaimer in the
17 1.50.4.2 nathanw * documentation and/or other materials provided with the distribution.
18 1.50.4.2 nathanw * 3. All advertising materials mentioning features or use of this software
19 1.50.4.2 nathanw * must display the following acknowledgement:
20 1.50.4.2 nathanw * This product includes software developed by the NetBSD
21 1.50.4.2 nathanw * Foundation, Inc. and its contributors.
22 1.50.4.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.50.4.2 nathanw * contributors may be used to endorse or promote products derived
24 1.50.4.2 nathanw * from this software without specific prior written permission.
25 1.50.4.2 nathanw *
26 1.50.4.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.50.4.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.50.4.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.50.4.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.50.4.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.50.4.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.50.4.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.50.4.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.50.4.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.50.4.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.50.4.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
37 1.50.4.2 nathanw */
38 1.50.4.2 nathanw
39 1.50.4.2 nathanw
40 1.50.4.2 nathanw #include <sys/param.h>
41 1.50.4.2 nathanw #include <sys/systm.h>
42 1.50.4.2 nathanw #include <sys/device.h>
43 1.50.4.2 nathanw #include <sys/malloc.h>
44 1.50.4.2 nathanw
45 1.50.4.2 nathanw #ifdef DEBUG
46 1.50.4.2 nathanw #include <sys/proc.h>
47 1.50.4.2 nathanw #include <sys/syslog.h>
48 1.50.4.2 nathanw #endif
49 1.50.4.2 nathanw
50 1.50.4.2 nathanw #include <uvm/uvm_extern.h>
51 1.50.4.2 nathanw
52 1.50.4.2 nathanw #include <machine/bus.h>
53 1.50.4.2 nathanw #include <sparc/dev/sbusvar.h>
54 1.50.4.2 nathanw #include <machine/autoconf.h>
55 1.50.4.2 nathanw #include <machine/oldmon.h>
56 1.50.4.2 nathanw #include <machine/cpu.h>
57 1.50.4.2 nathanw #include <machine/ctlreg.h>
58 1.50.4.2 nathanw #include <sparc/sparc/asm.h>
59 1.50.4.2 nathanw #include <sparc/sparc/vaddrs.h>
60 1.50.4.2 nathanw #include <sparc/sparc/cpuvar.h>
61 1.50.4.2 nathanw
62 1.50.4.2 nathanw struct obio4_softc {
63 1.50.4.2 nathanw struct device sc_dev; /* base device */
64 1.50.4.2 nathanw bus_space_tag_t sc_bustag; /* parent bus tag */
65 1.50.4.2 nathanw bus_dma_tag_t sc_dmatag; /* parent bus dma tag */
66 1.50.4.2 nathanw };
67 1.50.4.2 nathanw
68 1.50.4.2 nathanw union obio_softc {
69 1.50.4.2 nathanw struct device sc_dev; /* base device */
70 1.50.4.2 nathanw struct obio4_softc sc_obio; /* sun4 obio */
71 1.50.4.2 nathanw struct sbus_softc sc_sbus; /* sun4m obio is another sbus slot */
72 1.50.4.2 nathanw };
73 1.50.4.2 nathanw
74 1.50.4.2 nathanw
75 1.50.4.2 nathanw /* autoconfiguration driver */
76 1.50.4.2 nathanw static int obiomatch __P((struct device *, struct cfdata *, void *));
77 1.50.4.2 nathanw static void obioattach __P((struct device *, struct device *, void *));
78 1.50.4.2 nathanw
79 1.50.4.5 nathanw CFATTACH_DECL(obio, sizeof(union obio_softc),
80 1.50.4.5 nathanw obiomatch, obioattach, NULL, NULL);
81 1.50.4.2 nathanw
82 1.50.4.2 nathanw /*
83 1.50.4.2 nathanw * This `obio4_busattachargs' data structure only exists to pass down
84 1.50.4.2 nathanw * to obiosearch() the name of a device that must be configured early.
85 1.50.4.2 nathanw */
86 1.50.4.2 nathanw struct obio4_busattachargs {
87 1.50.4.2 nathanw struct mainbus_attach_args *ma;
88 1.50.4.2 nathanw const char *name;
89 1.50.4.2 nathanw };
90 1.50.4.2 nathanw
91 1.50.4.2 nathanw #if defined(SUN4)
92 1.50.4.2 nathanw static int obioprint __P((void *, const char *));
93 1.50.4.2 nathanw static int obiosearch __P((struct device *, struct cfdata *, void *));
94 1.50.4.2 nathanw static paddr_t obio_bus_mmap __P((bus_space_tag_t, bus_addr_t, off_t,
95 1.50.4.2 nathanw int, int));
96 1.50.4.2 nathanw static int _obio_bus_map __P((bus_space_tag_t, bus_addr_t,
97 1.50.4.2 nathanw bus_size_t, int,
98 1.50.4.2 nathanw vaddr_t, bus_space_handle_t *));
99 1.50.4.2 nathanw
100 1.50.4.2 nathanw static struct sparc_bus_space_tag obio_space_tag = {
101 1.50.4.2 nathanw NULL, /* cookie */
102 1.50.4.2 nathanw NULL, /* parent bus tag */
103 1.50.4.4 nathanw NULL, /* ranges */
104 1.50.4.4 nathanw 0, /* nranges */
105 1.50.4.2 nathanw _obio_bus_map, /* bus_space_map */
106 1.50.4.2 nathanw NULL, /* bus_space_unmap */
107 1.50.4.2 nathanw NULL, /* bus_space_subregion */
108 1.50.4.2 nathanw NULL, /* bus_space_barrier */
109 1.50.4.2 nathanw obio_bus_mmap, /* bus_space_mmap */
110 1.50.4.2 nathanw NULL /* bus_intr_establish */
111 1.50.4.2 nathanw };
112 1.50.4.2 nathanw #endif
113 1.50.4.2 nathanw
114 1.50.4.2 nathanw /*
115 1.50.4.2 nathanw * Translate obio `interrupts' property value to processor IPL (see sbus.c)
116 1.50.4.2 nathanw * Apparently, the `interrupts' property on obio devices is just
117 1.50.4.2 nathanw * the processor IPL.
118 1.50.4.2 nathanw */
119 1.50.4.2 nathanw static int intr_obio2ipl[] = {
120 1.50.4.2 nathanw 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15
121 1.50.4.2 nathanw };
122 1.50.4.2 nathanw
123 1.50.4.2 nathanw int
124 1.50.4.2 nathanw obiomatch(parent, cf, aux)
125 1.50.4.2 nathanw struct device *parent;
126 1.50.4.2 nathanw struct cfdata *cf;
127 1.50.4.2 nathanw void *aux;
128 1.50.4.2 nathanw {
129 1.50.4.2 nathanw struct mainbus_attach_args *ma = aux;
130 1.50.4.2 nathanw
131 1.50.4.5 nathanw return (strcmp(cf->cf_name, ma->ma_name) == 0);
132 1.50.4.2 nathanw }
133 1.50.4.2 nathanw
134 1.50.4.2 nathanw void
135 1.50.4.2 nathanw obioattach(parent, self, aux)
136 1.50.4.2 nathanw struct device *parent, *self;
137 1.50.4.2 nathanw void *aux;
138 1.50.4.2 nathanw {
139 1.50.4.2 nathanw struct mainbus_attach_args *ma = aux;
140 1.50.4.2 nathanw
141 1.50.4.2 nathanw /*
142 1.50.4.2 nathanw * There is only one obio bus
143 1.50.4.2 nathanw */
144 1.50.4.2 nathanw if (self->dv_unit > 0) {
145 1.50.4.2 nathanw printf(" unsupported\n");
146 1.50.4.2 nathanw return;
147 1.50.4.2 nathanw }
148 1.50.4.2 nathanw printf("\n");
149 1.50.4.2 nathanw
150 1.50.4.2 nathanw if (CPU_ISSUN4) {
151 1.50.4.2 nathanw #if defined(SUN4)
152 1.50.4.2 nathanw struct obio4_softc *sc = &((union obio_softc *)self)->sc_obio;
153 1.50.4.2 nathanw struct obio4_busattachargs oa;
154 1.50.4.2 nathanw const char *const *cpp;
155 1.50.4.2 nathanw static const char *const special4[] = {
156 1.50.4.2 nathanw /* find these first */
157 1.50.4.2 nathanw "timer",
158 1.50.4.2 nathanw "dma", /* need this before `esp', if any */
159 1.50.4.2 nathanw NULL
160 1.50.4.2 nathanw };
161 1.50.4.2 nathanw
162 1.50.4.2 nathanw sc->sc_bustag = ma->ma_bustag;
163 1.50.4.2 nathanw sc->sc_dmatag = ma->ma_dmatag;
164 1.50.4.2 nathanw
165 1.50.4.2 nathanw obio_space_tag.cookie = sc;
166 1.50.4.2 nathanw obio_space_tag.parent = sc->sc_bustag;
167 1.50.4.2 nathanw
168 1.50.4.2 nathanw oa.ma = ma;
169 1.50.4.2 nathanw
170 1.50.4.2 nathanw /* Find all `early' obio devices */
171 1.50.4.2 nathanw for (cpp = special4; *cpp != NULL; cpp++) {
172 1.50.4.2 nathanw oa.name = *cpp;
173 1.50.4.2 nathanw (void)config_search(obiosearch, self, &oa);
174 1.50.4.2 nathanw }
175 1.50.4.2 nathanw
176 1.50.4.2 nathanw /* Find all other obio devices */
177 1.50.4.2 nathanw oa.name = NULL;
178 1.50.4.2 nathanw (void)config_search(obiosearch, self, &oa);
179 1.50.4.2 nathanw #endif
180 1.50.4.2 nathanw return;
181 1.50.4.2 nathanw } else if (CPU_ISSUN4M) {
182 1.50.4.2 nathanw /*
183 1.50.4.2 nathanw * Attach the on-board I/O bus at on a sun4m.
184 1.50.4.2 nathanw * In this case we treat the obio bus as another sbus slot.
185 1.50.4.2 nathanw */
186 1.50.4.2 nathanw struct sbus_softc *sc = &((union obio_softc *)self)->sc_sbus;
187 1.50.4.2 nathanw
188 1.50.4.2 nathanw static const char *const special4m[] = {
189 1.50.4.2 nathanw /* find these first */
190 1.50.4.2 nathanw "eeprom",
191 1.50.4.2 nathanw "counter",
192 1.50.4.2 nathanw #if 0 /* Not all sun4m's have an `auxio' */
193 1.50.4.2 nathanw "auxio",
194 1.50.4.2 nathanw #endif
195 1.50.4.2 nathanw "",
196 1.50.4.2 nathanw /* place device to ignore here */
197 1.50.4.2 nathanw "interrupt",
198 1.50.4.2 nathanw NULL
199 1.50.4.2 nathanw };
200 1.50.4.2 nathanw
201 1.50.4.2 nathanw sc->sc_bustag = ma->ma_bustag;
202 1.50.4.2 nathanw sc->sc_dmatag = ma->ma_dmatag;
203 1.50.4.2 nathanw sc->sc_intr2ipl = intr_obio2ipl;
204 1.50.4.2 nathanw
205 1.50.4.2 nathanw sbus_attach_common(sc, "obio", ma->ma_node, special4m);
206 1.50.4.2 nathanw } else {
207 1.50.4.2 nathanw printf("obio on this machine?\n");
208 1.50.4.2 nathanw }
209 1.50.4.2 nathanw }
210 1.50.4.2 nathanw
211 1.50.4.2 nathanw #if defined(SUN4)
212 1.50.4.2 nathanw int
213 1.50.4.2 nathanw obioprint(args, busname)
214 1.50.4.2 nathanw void *args;
215 1.50.4.2 nathanw const char *busname;
216 1.50.4.2 nathanw {
217 1.50.4.2 nathanw union obio_attach_args *uoba = args;
218 1.50.4.2 nathanw struct obio4_attach_args *oba = &uoba->uoba_oba4;
219 1.50.4.2 nathanw
220 1.50.4.3 nathanw printf(" addr 0x%lx", (u_long)BUS_ADDR_PADDR(oba->oba_paddr));
221 1.50.4.2 nathanw if (oba->oba_pri != -1)
222 1.50.4.2 nathanw printf(" level %d", oba->oba_pri);
223 1.50.4.2 nathanw
224 1.50.4.2 nathanw return (UNCONF);
225 1.50.4.2 nathanw }
226 1.50.4.2 nathanw
227 1.50.4.2 nathanw int
228 1.50.4.2 nathanw _obio_bus_map(t, ba, size, flags, va, hp)
229 1.50.4.2 nathanw bus_space_tag_t t;
230 1.50.4.2 nathanw bus_addr_t ba;
231 1.50.4.2 nathanw bus_size_t size;
232 1.50.4.2 nathanw int flags;
233 1.50.4.2 nathanw vaddr_t va;
234 1.50.4.2 nathanw bus_space_handle_t *hp;
235 1.50.4.2 nathanw {
236 1.50.4.2 nathanw struct obio4_softc *sc = t->cookie;
237 1.50.4.2 nathanw
238 1.50.4.2 nathanw if ((flags & OBIO_BUS_MAP_USE_ROM) != 0 &&
239 1.50.4.2 nathanw obio_find_rom_map(ba, size, hp) == 0)
240 1.50.4.2 nathanw return (0);
241 1.50.4.2 nathanw
242 1.50.4.3 nathanw return (bus_space_map2(sc->sc_bustag, ba, size, flags, va, hp));
243 1.50.4.2 nathanw }
244 1.50.4.2 nathanw
245 1.50.4.2 nathanw paddr_t
246 1.50.4.2 nathanw obio_bus_mmap(t, ba, off, prot, flags)
247 1.50.4.2 nathanw bus_space_tag_t t;
248 1.50.4.2 nathanw bus_addr_t ba;
249 1.50.4.2 nathanw off_t off;
250 1.50.4.2 nathanw int prot;
251 1.50.4.2 nathanw int flags;
252 1.50.4.2 nathanw {
253 1.50.4.2 nathanw struct obio4_softc *sc = t->cookie;
254 1.50.4.2 nathanw
255 1.50.4.3 nathanw return (bus_space_mmap(sc->sc_bustag, ba, off, prot, flags));
256 1.50.4.2 nathanw }
257 1.50.4.2 nathanw
258 1.50.4.2 nathanw int
259 1.50.4.2 nathanw obiosearch(parent, cf, aux)
260 1.50.4.2 nathanw struct device *parent;
261 1.50.4.2 nathanw struct cfdata *cf;
262 1.50.4.2 nathanw void *aux;
263 1.50.4.2 nathanw {
264 1.50.4.2 nathanw struct obio4_busattachargs *oap = aux;
265 1.50.4.2 nathanw union obio_attach_args uoba;
266 1.50.4.2 nathanw struct obio4_attach_args *oba = &uoba.uoba_oba4;
267 1.50.4.2 nathanw
268 1.50.4.2 nathanw /* Check whether we're looking for a specifically named device */
269 1.50.4.5 nathanw if (oap->name != NULL && strcmp(oap->name, cf->cf_name) != 0)
270 1.50.4.2 nathanw return (0);
271 1.50.4.2 nathanw
272 1.50.4.2 nathanw /*
273 1.50.4.2 nathanw * Avoid sun4m entries which don't have valid PAs.
274 1.50.4.2 nathanw * no point in even probing them.
275 1.50.4.2 nathanw */
276 1.50.4.2 nathanw if (cf->cf_loc[0] == -1)
277 1.50.4.2 nathanw return (0);
278 1.50.4.2 nathanw
279 1.50.4.2 nathanw /*
280 1.50.4.2 nathanw * On the 4/100 obio addresses must be mapped at
281 1.50.4.2 nathanw * 0x0YYYYYYY, but alias higher up (we avoid the
282 1.50.4.2 nathanw * alias condition because it causes pmap difficulties)
283 1.50.4.2 nathanw * XXX: We also assume that 4/[23]00 obio addresses
284 1.50.4.2 nathanw * must be 0xZYYYYYYY, where (Z != 0)
285 1.50.4.2 nathanw */
286 1.50.4.2 nathanw if (cpuinfo.cpu_type == CPUTYP_4_100 && (cf->cf_loc[0] & 0xf0000000))
287 1.50.4.2 nathanw return (0);
288 1.50.4.2 nathanw if (cpuinfo.cpu_type != CPUTYP_4_100 && !(cf->cf_loc[0] & 0xf0000000))
289 1.50.4.2 nathanw return (0);
290 1.50.4.2 nathanw
291 1.50.4.2 nathanw uoba.uoba_isobio4 = 1;
292 1.50.4.2 nathanw oba->oba_bustag = &obio_space_tag;
293 1.50.4.2 nathanw oba->oba_dmatag = oap->ma->ma_dmatag;
294 1.50.4.3 nathanw oba->oba_paddr = BUS_ADDR(PMAP_OBIO, cf->cf_loc[0]);
295 1.50.4.2 nathanw oba->oba_pri = cf->cf_loc[1];
296 1.50.4.2 nathanw
297 1.50.4.5 nathanw if (config_match(parent, cf, &uoba) == 0)
298 1.50.4.2 nathanw return (0);
299 1.50.4.2 nathanw
300 1.50.4.2 nathanw config_attach(parent, cf, &uoba, obioprint);
301 1.50.4.2 nathanw return (1);
302 1.50.4.2 nathanw }
303 1.50.4.2 nathanw
304 1.50.4.2 nathanw
305 1.50.4.2 nathanw /*
306 1.50.4.2 nathanw * If we can find a mapping that was established by the rom, use it.
307 1.50.4.2 nathanw * Else, create a new mapping.
308 1.50.4.2 nathanw */
309 1.50.4.2 nathanw int
310 1.50.4.3 nathanw obio_find_rom_map(ba, len, hp)
311 1.50.4.3 nathanw bus_addr_t ba;
312 1.50.4.2 nathanw int len;
313 1.50.4.2 nathanw bus_space_handle_t *hp;
314 1.50.4.2 nathanw {
315 1.50.4.2 nathanw #define getpte(va) lda(va, ASI_PTE)
316 1.50.4.2 nathanw
317 1.50.4.3 nathanw u_long pa, pf;
318 1.50.4.2 nathanw int pgtype;
319 1.50.4.2 nathanw u_long va, pte;
320 1.50.4.2 nathanw
321 1.50.4.2 nathanw if (len > NBPG)
322 1.50.4.2 nathanw return (EINVAL);
323 1.50.4.2 nathanw
324 1.50.4.3 nathanw pa = BUS_ADDR_PADDR(ba);
325 1.50.4.2 nathanw pf = pa >> PGSHIFT;
326 1.50.4.2 nathanw pgtype = PMAP_T2PTE_4(PMAP_OBIO);
327 1.50.4.2 nathanw
328 1.50.4.2 nathanw for (va = OLDMON_STARTVADDR; va < OLDMON_ENDVADDR; va += NBPG) {
329 1.50.4.2 nathanw pte = getpte(va);
330 1.50.4.2 nathanw if ((pte & PG_V) == 0 || (pte & PG_TYPE) != pgtype ||
331 1.50.4.2 nathanw (pte & PG_PFNUM) != pf)
332 1.50.4.2 nathanw continue;
333 1.50.4.2 nathanw
334 1.50.4.2 nathanw /*
335 1.50.4.2 nathanw * Found entry in PROM's pagetable
336 1.50.4.2 nathanw * note: preserve page offset
337 1.50.4.2 nathanw */
338 1.50.4.3 nathanw *hp = (bus_space_handle_t)(va | (pa & PGOFSET));
339 1.50.4.2 nathanw return (0);
340 1.50.4.2 nathanw }
341 1.50.4.2 nathanw
342 1.50.4.2 nathanw return (ENOENT);
343 1.50.4.2 nathanw }
344 1.50.4.2 nathanw #endif /* SUN4 */
345