srt0.S revision 1.1
1 1.1 mrg /* $NetBSD: srt0.S,v 1.1 1997/06/01 03:39:40 mrg Exp $ */ 2 1.1 mrg 3 1.1 mrg /* 4 1.1 mrg * Copyright (c) 1994 Paul Kranenburg 5 1.1 mrg * All rights reserved. 6 1.1 mrg * 7 1.1 mrg * Redistribution and use in source and binary forms, with or without 8 1.1 mrg * modification, are permitted provided that the following conditions 9 1.1 mrg * are met: 10 1.1 mrg * 1. Redistributions of source code must retain the above copyright 11 1.1 mrg * notice, this list of conditions and the following disclaimer. 12 1.1 mrg * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 mrg * notice, this list of conditions and the following disclaimer in the 14 1.1 mrg * documentation and/or other materials provided with the distribution. 15 1.1 mrg * 3. All advertising materials mentioning features or use of this software 16 1.1 mrg * must display the following acknowledgement: 17 1.1 mrg * This product includes software developed by Paul Kranenburg. 18 1.1 mrg * 4. The name of the author may not be used to endorse or promote products 19 1.1 mrg * derived from this software without specific prior written permission. 20 1.1 mrg * 21 1.1 mrg * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 1.1 mrg * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 1.1 mrg * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 1.1 mrg * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 1.1 mrg * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 1.1 mrg * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 1.1 mrg * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 1.1 mrg * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 1.1 mrg * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 1.1 mrg * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 1.1 mrg */ 32 1.1 mrg 33 1.1 mrg #include <machine/param.h> 34 1.1 mrg #include <machine/psl.h> 35 1.1 mrg 36 1.1 mrg #define CCFSZ 96 37 1.1 mrg 38 1.1 mrg .file "str0.s" 39 1.1 mrg 40 1.1 mrg .data 41 1.1 mrg .global _cputyp, _nbpg, _pgofset, _pgshift 42 1.1 mrg _cputyp: 43 1.1 mrg .word 1 44 1.1 mrg _nbpg: 45 1.1 mrg .word 1 46 1.1 mrg _pgofset: 47 1.1 mrg .word 1 48 1.1 mrg _pgshift: 49 1.1 mrg .word 1 50 1.1 mrg 51 1.1 mrg .text 52 1.1 mrg .globl start 53 1.1 mrg 54 1.1 mrg start: 55 1.1 mrg /* 56 1.1 mrg * Set up a stack. 57 1.1 mrg */ 58 1.1 mrg set start, %o1 59 1.1 mrg save %o1, -CCFSZ, %sp 60 1.1 mrg 61 1.1 mrg /* 62 1.1 mrg * Relocate. 63 1.1 mrg */ 64 1.1 mrg 1: call 2f 65 1.1 mrg nop 66 1.1 mrg 2: add %o7, (start-1b), %l0 67 1.1 mrg set start, %l1 68 1.1 mrg set _end, %o0 69 1.1 mrg sub %o0, %l1, %l2 ! length 70 1.1 mrg 3: ld [%l0], %o0 71 1.1 mrg add %l0, 4, %l0 72 1.1 mrg st %o0, [%l1] 73 1.1 mrg subcc %l2, 4, %l2 74 1.1 mrg bg 3b 75 1.1 mrg add %l1, 4, %l1 76 1.1 mrg 77 1.1 mrg set 4f, %g1 78 1.1 mrg jmp %g1 79 1.1 mrg nop 80 1.1 mrg 81 1.1 mrg 4: 82 1.1 mrg #ifdef notyet 83 1.1 mrg /* 84 1.1 mrg * Enable traps 85 1.1 mrg */ 86 1.1 mrg wr %g0, 0, %wim ! make sure we can set psr 87 1.1 mrg nop; nop; nop 88 1.1 mrg wr %g0, PSR_S|PSR_PS|PSR_PIL, %psr ! set initial psr 89 1.1 mrg nop; nop; nop 90 1.1 mrg wr %g0, 2, %wim ! set initial %wim (w1 invalid) 91 1.1 mrg 92 1.1 mrg rd %psr, %l0 93 1.1 mrg wr %l0, PSR_ET, %psr 94 1.1 mrg nop; nop; nop 95 1.1 mrg #endif 96 1.1 mrg 97 1.1 mrg /* 98 1.1 mrg * Clear BSS 99 1.1 mrg */ 100 1.1 mrg set _edata, %o0 ! bzero(edata, end - edata) 101 1.1 mrg set _end, %o1 102 1.1 mrg call _bzero 103 1.1 mrg sub %o1, %o0, %o1 104 1.1 mrg 105 1.1 mrg /* 106 1.1 mrg * Enable interrupts, but only above level 11. This enables "L1-A", 107 1.1 mrg * but avoids spurious interrupt bites from most other devices. 108 1.1 mrg */ 109 1.1 mrg rd %psr, %o0 110 1.1 mrg andn %o0, PSR_PIL, %o0 111 1.1 mrg wr %o0, 0xb00, %psr ! (11 << 8) 112 1.1 mrg nop; nop; nop 113 1.1 mrg 114 1.1 mrg /* 115 1.1 mrg * Set CPU type that we are running on. 116 1.1 mrg */ 117 1.1 mrg sethi %hi(_cputyp), %o0 118 1.1 mrg set 0x4000, %g7 119 1.1 mrg cmp %i0, %g7 120 1.1 mrg beq 5f 121 1.1 mrg nop 122 1.1 mrg 123 1.1 mrg /* 124 1.1 mrg * Save address of PROM vector (passed in %i0). 125 1.1 mrg */ 126 1.1 mrg sethi %hi(_promvec), %o1 127 1.1 mrg st %i0, [%o1 + %lo(_promvec)] 128 1.1 mrg 129 1.1 mrg mov CPU_SUN4C, %g4 130 1.1 mrg mov SUN4CM_PGSHIFT, %g5 131 1.1 mrg b,a 6f 132 1.1 mrg 133 1.1 mrg 5: 134 1.1 mrg mov CPU_SUN4, %g4 135 1.1 mrg mov SUN4_PGSHIFT, %g5 136 1.1 mrg 137 1.1 mrg 6: 138 1.1 mrg st %g4, [%o0 + %lo(_cputyp)] 139 1.1 mrg sethi %hi(_pgshift), %o0 ! pgshift = log2(nbpg) 140 1.1 mrg st %g5, [%o0 + %lo(_pgshift)] 141 1.1 mrg 142 1.1 mrg mov 1, %o0 ! nbpg = 1 << pgshift 143 1.1 mrg sll %o0, %g5, %g5 144 1.1 mrg sethi %hi(_nbpg), %o0 ! nbpg = bytes in a page 145 1.1 mrg st %g5, [%o0 + %lo(_nbpg)] 146 1.1 mrg 147 1.1 mrg sub %g5, 1, %g5 148 1.1 mrg sethi %hi(_pgofset), %o0 ! page offset = bytes in a page - 1 149 1.1 mrg st %g5, [%o0 + %lo(_pgofset)] 150 1.1 mrg 151 1.1 mrg call _main 152 1.1 mrg mov %i0, %o0 153 1.1 mrg 154 1.1 mrg ret 155 1.1 mrg restore 156 1.1 mrg 157 1.1 mrg 158 1.1 mrg #ifdef TIGHT 159 1.1 mrg 160 1.1 mrg /* 161 1.1 mrg * XXX - Space saving .div & .rem routines (small & non-negative numbres only) 162 1.1 mrg */ 163 1.1 mrg .align 4 164 1.1 mrg .global .div, .udiv 165 1.1 mrg ! int n = 0; while (a >= b) { a -= b; n++; }; return n; 166 1.1 mrg .div: 167 1.1 mrg .udiv: 168 1.1 mrg cmp %o0, %o1 169 1.1 mrg bl 2f 170 1.1 mrg mov 0, %o5 171 1.1 mrg 1: 172 1.1 mrg sub %o0, %o1, %o0 173 1.1 mrg cmp %o0, %o1 174 1.1 mrg bge 1b 175 1.1 mrg add %o5, 1, %o5 176 1.1 mrg 2: 177 1.1 mrg retl 178 1.1 mrg mov %o5, %o0 179 1.1 mrg 180 1.1 mrg .align 4 181 1.1 mrg .global .rem, .urem 182 1.1 mrg ! while (a>=b) a -= b; return a; 183 1.1 mrg .rem: 184 1.1 mrg .urem: 185 1.1 mrg cmp %o0, %o1 186 1.1 mrg bl 2f 187 1.1 mrg nop 188 1.1 mrg sub %o0, %o1, %o0 189 1.1 mrg 1: 190 1.1 mrg cmp %o0, %o1 191 1.1 mrg bge,a 1b 192 1.1 mrg sub %o0, %o1, %o0 193 1.1 mrg 2: 194 1.1 mrg retl 195 1.1 mrg nop 196 1.1 mrg 197 1.1 mrg #endif /* TIGHT */ 198
Indexes created Fri Sep 26 20:09:58 GMT 2025