pld_wdog.c revision 1.7
1 /* $NetBSD: pld_wdog.c,v 1.7 2009/03/18 10:22:37 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 2003 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/types.h> 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/device.h> 33 34 #include <machine/autoconf.h> 35 36 #include <dev/ebus/ebusreg.h> 37 #include <dev/ebus/ebusvar.h> 38 39 #include <dev/sysmon/sysmonvar.h> 40 41 #define PLD_WDOG1_COUNTER 0x00 42 #define PLD_WDOG1_LIMIT 0x04 43 #define PLD_WDOG1_STATUS 0x08 44 #define PLD_WDOG2_COUNTER 0x10 45 #define PLD_WDOG2_LIMIT 0x14 46 #define PLD_WDOG2_STATUS 0x18 47 #define PLD_WDOG3_COUNTER 0x20 48 #define PLD_WDOG3_LIMIT 0x24 49 #define PLD_WDOG3_STATUS 0x28 50 51 #define PLD_WDOG_INTR_MASK 0x30 52 #define PLD_WDOG_STATUS 0x34 53 54 #define PLD_WDOG_PERIOD_DEFAULT 15 /* seconds */ 55 56 /* #define PLD_WDOG_DEBUG 1 */ 57 58 struct pldwdog_softc { 59 struct device sc_dev; 60 61 bus_space_tag_t sc_btag; 62 bus_space_handle_t sc_bh; 63 64 struct sysmon_wdog sc_smw; 65 int sc_wdog_period; 66 }; 67 68 int pldwdog_match(struct device *, struct cfdata *, void *); 69 void pldwdog_attach(struct device *, struct device *, void *); 70 71 CFATTACH_DECL(pldwdog, sizeof(struct pldwdog_softc), 72 pldwdog_match, pldwdog_attach, NULL, NULL); 73 74 #ifdef PLD_WDOG_DEBUG 75 static void pldwdog_regs(struct pldwdog_softc *); 76 #endif 77 78 static int 79 pldwdog_tickle(struct sysmon_wdog *smw) 80 { 81 struct pldwdog_softc *sc = smw->smw_cookie; 82 83 #ifdef PLD_WDOG_DEBUG 84 printf("%s: pldwdog_tickle: mode %x, period %d\n", 85 device_xname(&sc->sc_dev), smw->smw_mode, smw->smw_period); 86 /* pldwdog_regs(sc); */ 87 #endif 88 89 bus_space_write_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_LIMIT, 90 smw->smw_period * 10); 91 bus_space_write_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK, 5); 92 93 return 0; 94 } 95 96 static int 97 pldwdog_setmode(struct sysmon_wdog *smw) 98 { 99 struct pldwdog_softc *sc = smw->smw_cookie; 100 101 #ifdef PLD_WDOG_DEBUG 102 printf("%s:pldwdog_setmode: mode %x\n", device_xname(&sc->sc_dev), smw->smw_mode); 103 #endif 104 105 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) { 106 bus_space_write_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK, 7); 107 } else { 108 if (smw->smw_period == WDOG_PERIOD_DEFAULT) 109 smw->smw_period = sc->sc_wdog_period; 110 111 pldwdog_tickle(smw); 112 } 113 return (0); 114 } 115 116 #if 0 117 static int pldwdog_intr(void); 118 static int 119 pldwdog_intr(void) 120 { 121 122 printf("pldwdog_intr:\n"); 123 124 return 1; 125 } 126 #endif 127 128 int 129 pldwdog_match(struct device *parent, struct cfdata *cf, void *aux) 130 { 131 struct ebus_attach_args *ea = aux; 132 133 return (strcmp("watchdog", ea->ea_name) == 0); 134 } 135 136 #ifdef PLD_WDOG_DEBUG 137 static void 138 pldwdog_regs(struct pldwdog_softc *sc) 139 { 140 141 printf("%s: status 0x%02x, intr mask 0x%02x\n", 142 device_xname(&sc->sc_dev), 143 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK), 144 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_STATUS)); 145 146 printf("%s: wdog1: count 0x%04x, limit 0x%04x, status 0x%02x\n", 147 device_xname(&sc->sc_dev), 148 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG1_COUNTER), 149 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG1_LIMIT), 150 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG1_STATUS)); 151 152 printf("%s: wdog2: count 0x%04x, limit 0x%04x, status 0x%02x\n", 153 device_xname(&sc->sc_dev), 154 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_COUNTER), 155 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_LIMIT), 156 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG2_STATUS)); 157 158 printf("%s: wdog3: count 0x%04x, limit 0x%04x, status 0x%02x\n", 159 device_xname(&sc->sc_dev), 160 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG3_COUNTER), 161 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG3_LIMIT), 162 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG3_STATUS)); 163 } 164 #endif 165 166 void 167 pldwdog_attach(struct device *parent, struct device *self, void *aux) 168 { 169 struct pldwdog_softc *sc = (struct pldwdog_softc *)self; 170 struct ebus_attach_args *ea = aux; 171 172 printf("\n"); 173 174 sc->sc_btag = ea->ea_bustag; 175 176 if (ea->ea_nreg < 1) { 177 printf(": no registers??\n"); 178 return; 179 } 180 181 if (ea->ea_nvaddr) 182 sparc_promaddr_to_handle(sc->sc_btag, ea->ea_vaddr[0], &sc->sc_bh); 183 else if (bus_space_map(sc->sc_btag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]), 184 ea->ea_reg[0].size, 0, &sc->sc_bh) != 0) { 185 printf(": can't map register space\n"); 186 return; 187 } 188 189 sc->sc_wdog_period = PLD_WDOG_PERIOD_DEFAULT; 190 191 sc->sc_smw.smw_name = device_xname(&sc->sc_dev); 192 sc->sc_smw.smw_cookie = sc; 193 sc->sc_smw.smw_setmode = pldwdog_setmode; 194 sc->sc_smw.smw_tickle = pldwdog_tickle; 195 sc->sc_smw.smw_period = sc->sc_wdog_period; 196 197 if (sysmon_wdog_register(&sc->sc_smw) != 0) 198 aprint_error_dev(&sc->sc_dev, "unable to register with sysmon\n"); 199 200 /* pldwdog_regs(sc); */ 201 202 #if 0 203 bus_intr_establish(ea->ea_bustag, ea->ea_intr[0], 204 IPL_TTY, pldwdog_intr, sc); 205 #endif 206 } 207
Indexes created Fri Sep 26 08:10:20 GMT 2025