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      1 /*	$NetBSD: pld_wdog.c,v 1.11 2012/10/27 17:18:12 chs Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2003 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     17  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     26  * POSSIBILITY OF SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: pld_wdog.c,v 1.11 2012/10/27 17:18:12 chs Exp $");
     31 
     32 #include <sys/types.h>
     33 #include <sys/param.h>
     34 #include <sys/systm.h>
     35 #include <sys/device.h>
     36 
     37 #include <machine/autoconf.h>
     38 
     39 #include <dev/ebus/ebusreg.h>
     40 #include <dev/ebus/ebusvar.h>
     41 
     42 #include <dev/sysmon/sysmonvar.h>
     43 
     44 #define PLD_WDOG1_COUNTER	0x00
     45 #define PLD_WDOG1_LIMIT		0x04
     46 #define PLD_WDOG1_STATUS	0x08
     47 #define PLD_WDOG2_COUNTER	0x10
     48 #define PLD_WDOG2_LIMIT		0x14
     49 #define PLD_WDOG2_STATUS	0x18
     50 #define PLD_WDOG3_COUNTER	0x20
     51 #define PLD_WDOG3_LIMIT		0x24
     52 #define PLD_WDOG3_STATUS	0x28
     53 
     54 #define PLD_WDOG_INTR_MASK	0x30
     55 #define PLD_WDOG_STATUS		0x34
     56 
     57 #define PLD_WDOG_PERIOD_DEFAULT	15 /* seconds */
     58 
     59 /* #define PLD_WDOG_DEBUG	1 */
     60 
     61 struct pldwdog_softc {
     62 	device_t		sc_dev;
     63 
     64 	bus_space_tag_t		sc_btag;
     65 	bus_space_handle_t	sc_bh;
     66 
     67 	struct sysmon_wdog 	sc_smw;
     68 	int 			sc_wdog_period;
     69 };
     70 
     71 int	pldwdog_match(device_t, cfdata_t, void *);
     72 void	pldwdog_attach(device_t, device_t, void *);
     73 
     74 CFATTACH_DECL_NEW(pldwdog, sizeof(struct pldwdog_softc),
     75     pldwdog_match, pldwdog_attach, NULL, NULL);
     76 
     77 #ifdef PLD_WDOG_DEBUG
     78 static void pldwdog_regs(struct pldwdog_softc *);
     79 #endif
     80 
     81 static int
     82 pldwdog_tickle(struct sysmon_wdog *smw)
     83 {
     84 	struct pldwdog_softc *sc = smw->smw_cookie;
     85 
     86 #ifdef PLD_WDOG_DEBUG
     87 	printf("%s: pldwdog_tickle: mode %x, period %d\n",
     88 	       device_xname(sc->sc_dev), smw->smw_mode, smw->smw_period);
     89 /*	pldwdog_regs(sc); */
     90 #endif
     91 
     92 	bus_space_write_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_LIMIT,
     93 			  smw->smw_period * 10);
     94 	bus_space_write_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK, 5);
     95 
     96 	return 0;
     97 }
     98 
     99 static int
    100 pldwdog_setmode(struct sysmon_wdog *smw)
    101 {
    102 	struct pldwdog_softc *sc = smw->smw_cookie;
    103 
    104 #ifdef PLD_WDOG_DEBUG
    105 	printf("%s:pldwdog_setmode: mode %x\n", device_xname(sc->sc_dev),
    106 	    smw->smw_mode);
    107 #endif
    108 
    109 	if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
    110 		bus_space_write_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK, 7);
    111 	} else {
    112 		if (smw->smw_period == WDOG_PERIOD_DEFAULT)
    113 			smw->smw_period = sc->sc_wdog_period;
    114 
    115 		pldwdog_tickle(smw);
    116 	}
    117 	return (0);
    118 }
    119 
    120 #if 0
    121 static int pldwdog_intr(void);
    122 static int
    123 pldwdog_intr(void)
    124 {
    125 
    126 	printf("pldwdog_intr:\n");
    127 
    128 	return 1;
    129 }
    130 #endif
    131 
    132 int
    133 pldwdog_match(device_t parent, cfdata_t cf, void *aux)
    134 {
    135 	struct ebus_attach_args *ea = aux;
    136 
    137 	return (strcmp("watchdog", ea->ea_name) == 0);
    138 }
    139 
    140 #ifdef PLD_WDOG_DEBUG
    141 static void
    142 pldwdog_regs(struct pldwdog_softc *sc)
    143 {
    144 
    145 	printf("%s: status 0x%02x, intr mask 0x%02x\n",
    146 	       device_xname(sc->sc_dev),
    147 	       bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK),
    148 	       bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_STATUS));
    149 
    150 	printf("%s: wdog1: count 0x%04x, limit 0x%04x, status 0x%02x\n",
    151 	       device_xname(sc->sc_dev),
    152 	       bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG1_COUNTER),
    153 	       bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG1_LIMIT),
    154 	       bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG1_STATUS));
    155 
    156 	printf("%s: wdog2: count 0x%04x, limit 0x%04x, status 0x%02x\n",
    157 	       device_xname(sc->sc_dev),
    158 	       bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_COUNTER),
    159 	       bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_LIMIT),
    160 	       bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG2_STATUS));
    161 
    162 	printf("%s: wdog3: count 0x%04x, limit 0x%04x, status 0x%02x\n",
    163 	       device_xname(sc->sc_dev),
    164 	       bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG3_COUNTER),
    165 	       bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG3_LIMIT),
    166 	       bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG3_STATUS));
    167 }
    168 #endif
    169 
    170 void
    171 pldwdog_attach(device_t parent, device_t self, void *aux)
    172 {
    173 	struct pldwdog_softc *sc = device_private(self);
    174 	struct ebus_attach_args *ea = aux;
    175 
    176 	printf("\n");
    177 
    178 	sc->sc_dev = self;
    179 	sc->sc_btag = ea->ea_bustag;
    180 
    181 	if (ea->ea_nreg < 1) {
    182 		printf(": no registers??\n");
    183 		return;
    184 	}
    185 
    186 	if (ea->ea_nvaddr)
    187 		sparc_promaddr_to_handle(sc->sc_btag, ea->ea_vaddr[0], &sc->sc_bh);
    188 	else if (bus_space_map(sc->sc_btag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
    189 				 ea->ea_reg[0].size, 0, &sc->sc_bh) != 0) {
    190 		printf(": can't map register space\n");
    191 		return;
    192 	}
    193 
    194 	sc->sc_wdog_period = PLD_WDOG_PERIOD_DEFAULT;
    195 
    196 	sc->sc_smw.smw_name = device_xname(sc->sc_dev);
    197 	sc->sc_smw.smw_cookie = sc;
    198 	sc->sc_smw.smw_setmode = pldwdog_setmode;
    199 	sc->sc_smw.smw_tickle = pldwdog_tickle;
    200 	sc->sc_smw.smw_period = sc->sc_wdog_period;
    201 
    202 	if (sysmon_wdog_register(&sc->sc_smw) != 0)
    203 		aprint_error_dev(sc->sc_dev, "unable to register with sysmon\n");
    204 
    205 /*	pldwdog_regs(sc); */
    206 
    207 #if 0
    208 	bus_intr_establish(ea->ea_bustag, ea->ea_intr[0],
    209 			   IPL_TTY, pldwdog_intr, sc);
    210 #endif
    211 }
    212