pld_wdog.c revision 1.8 1 /* $NetBSD: pld_wdog.c,v 1.8 2011/06/03 03:20:39 christos Exp $ */
2
3 /*-
4 * Copyright (c) 2003 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 * POSSIBILITY OF SUCH DAMAGE.
27 */
28
29 #include <sys/types.h>
30 #include <sys/param.h>
31 #include <sys/systm.h>
32 #include <sys/device.h>
33
34 #include <machine/autoconf.h>
35
36 #include <dev/ebus/ebusreg.h>
37 #include <dev/ebus/ebusvar.h>
38
39 #include <dev/sysmon/sysmonvar.h>
40
41 #define PLD_WDOG1_COUNTER 0x00
42 #define PLD_WDOG1_LIMIT 0x04
43 #define PLD_WDOG1_STATUS 0x08
44 #define PLD_WDOG2_COUNTER 0x10
45 #define PLD_WDOG2_LIMIT 0x14
46 #define PLD_WDOG2_STATUS 0x18
47 #define PLD_WDOG3_COUNTER 0x20
48 #define PLD_WDOG3_LIMIT 0x24
49 #define PLD_WDOG3_STATUS 0x28
50
51 #define PLD_WDOG_INTR_MASK 0x30
52 #define PLD_WDOG_STATUS 0x34
53
54 #define PLD_WDOG_PERIOD_DEFAULT 15 /* seconds */
55
56 /* #define PLD_WDOG_DEBUG 1 */
57
58 struct pldwdog_softc {
59 device_t sc_dev;
60
61 bus_space_tag_t sc_btag;
62 bus_space_handle_t sc_bh;
63
64 struct sysmon_wdog sc_smw;
65 int sc_wdog_period;
66 };
67
68 int pldwdog_match(device_t, cfdata_t, void *);
69 void pldwdog_attach(device_t, device_t, void *);
70
71 CFATTACH_DECL(pldwdog, sizeof(struct pldwdog_softc),
72 pldwdog_match, pldwdog_attach, NULL, NULL);
73
74 #ifdef PLD_WDOG_DEBUG
75 static void pldwdog_regs(struct pldwdog_softc *);
76 #endif
77
78 static int
79 pldwdog_tickle(struct sysmon_wdog *smw)
80 {
81 struct pldwdog_softc *sc = smw->smw_cookie;
82
83 #ifdef PLD_WDOG_DEBUG
84 printf("%s: pldwdog_tickle: mode %x, period %d\n",
85 device_xname(&sc->sc_dev), smw->smw_mode, smw->smw_period);
86 /* pldwdog_regs(sc); */
87 #endif
88
89 bus_space_write_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_LIMIT,
90 smw->smw_period * 10);
91 bus_space_write_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK, 5);
92
93 return 0;
94 }
95
96 static int
97 pldwdog_setmode(struct sysmon_wdog *smw)
98 {
99 struct pldwdog_softc *sc = smw->smw_cookie;
100
101 #ifdef PLD_WDOG_DEBUG
102 printf("%s:pldwdog_setmode: mode %x\n", device_xname(sc->sc_dev),
103 smw->smw_mode);
104 #endif
105
106 if ((smw->smw_mode & WDOG_MODE_MASK) == WDOG_MODE_DISARMED) {
107 bus_space_write_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK, 7);
108 } else {
109 if (smw->smw_period == WDOG_PERIOD_DEFAULT)
110 smw->smw_period = sc->sc_wdog_period;
111
112 pldwdog_tickle(smw);
113 }
114 return (0);
115 }
116
117 #if 0
118 static int pldwdog_intr(void);
119 static int
120 pldwdog_intr(void)
121 {
122
123 printf("pldwdog_intr:\n");
124
125 return 1;
126 }
127 #endif
128
129 int
130 pldwdog_match(device_t parent, cfdata_t cf, void *aux)
131 {
132 struct ebus_attach_args *ea = aux;
133
134 return (strcmp("watchdog", ea->ea_name) == 0);
135 }
136
137 #ifdef PLD_WDOG_DEBUG
138 static void
139 pldwdog_regs(struct pldwdog_softc *sc)
140 {
141
142 printf("%s: status 0x%02x, intr mask 0x%02x\n",
143 device_xname(sc->sc_dev),
144 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_INTR_MASK),
145 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG_STATUS));
146
147 printf("%s: wdog1: count 0x%04x, limit 0x%04x, status 0x%02x\n",
148 device_xname(sc->sc_dev),
149 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG1_COUNTER),
150 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG1_LIMIT),
151 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG1_STATUS));
152
153 printf("%s: wdog2: count 0x%04x, limit 0x%04x, status 0x%02x\n",
154 device_xname(sc->sc_dev),
155 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_COUNTER),
156 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG2_LIMIT),
157 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG2_STATUS));
158
159 printf("%s: wdog3: count 0x%04x, limit 0x%04x, status 0x%02x\n",
160 device_xname(sc->sc_dev),
161 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG3_COUNTER),
162 bus_space_read_2(sc->sc_btag, sc->sc_bh, PLD_WDOG3_LIMIT),
163 bus_space_read_1(sc->sc_btag, sc->sc_bh, PLD_WDOG3_STATUS));
164 }
165 #endif
166
167 void
168 pldwdog_attach(device_t parent, device_t self, void *aux)
169 {
170 struct pldwdog_softc *sc = device_private(self);
171 struct ebus_attach_args *ea = aux;
172
173 printf("\n");
174
175 sc->sc_dev = self;
176 sc->sc_btag = ea->ea_bustag;
177
178 if (ea->ea_nreg < 1) {
179 printf(": no registers??\n");
180 return;
181 }
182
183 if (ea->ea_nvaddr)
184 sparc_promaddr_to_handle(sc->sc_btag, ea->ea_vaddr[0], &sc->sc_bh);
185 else if (bus_space_map(sc->sc_btag, EBUS_ADDR_FROM_REG(&ea->ea_reg[0]),
186 ea->ea_reg[0].size, 0, &sc->sc_bh) != 0) {
187 printf(": can't map register space\n");
188 return;
189 }
190
191 sc->sc_wdog_period = PLD_WDOG_PERIOD_DEFAULT;
192
193 sc->sc_smw.smw_name = device_xname(sc->sc_dev);
194 sc->sc_smw.smw_cookie = sc;
195 sc->sc_smw.smw_setmode = pldwdog_setmode;
196 sc->sc_smw.smw_tickle = pldwdog_tickle;
197 sc->sc_smw.smw_period = sc->sc_wdog_period;
198
199 if (sysmon_wdog_register(&sc->sc_smw) != 0)
200 aprint_error_dev(sc->sc_dev, "unable to register with sysmon\n");
201
202 /* pldwdog_regs(sc); */
203
204 #if 0
205 bus_intr_establish(ea->ea_bustag, ea->ea_intr[0],
206 IPL_TTY, pldwdog_intr, sc);
207 #endif
208 }
209