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      1 /*	$NetBSD: fdreg.h,v 1.4 2005/12/11 12:19:20 christos Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1991 The Regents of the University of California.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. Neither the name of the University nor the names of its contributors
     16  *    may be used to endorse or promote products derived from this software
     17  *    without specific prior written permission.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     20  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     21  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     22  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     23  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     24  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     25  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     26  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     27  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     28  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     29  * SUCH DAMAGE.
     30  *
     31  *	@(#)fdreg.h	7.1 (Berkeley) 5/9/91
     32  */
     33 
     34 /*
     35  * AT floppy controller registers and bitfields
     36  */
     37 
     38 /* uses NEC765 controller */
     39 #include <dev/ic/nec765reg.h>
     40 
     41 #ifndef _LOCORE
     42 struct fdreg_77 {
     43 	uint8_t	fd_statusA;
     44 	uint8_t	fd_statusB;
     45 	uint8_t	fd_dor;		/* Digital Output Register (R/W) */
     46 	uint8_t	fd_tdr;		/* Tape Control Register (R/W) */
     47 	uint8_t	fd_msr;		/* Main Status Register (R) */
     48 #define fd_drs	fd_msr		/* Data Rate Select Register (W) */
     49 	uint8_t	fd_fifo;	/* Data (FIFO) register (R/W) */
     50 	uint8_t	fd_reserved;
     51 	uint8_t	fd_dir;		/* Digital Input Register (R) */
     52 #define fd_ccr	fd_dir		/* Configuration Control (W) */
     53 };
     54 
     55 struct fdreg_72 {
     56 	uint8_t	fd_msr;		/* Main Status Register (R) */
     57 #if already_a_define
     58 #define fd_drs	fd_msr		/* Data Rate Select Register (W) */
     59 #endif
     60 	uint8_t	fd_fifo;	/* Data (FIFO) register (R/W) */
     61 };
     62 
     63 union fdreg {
     64 	struct fdreg_72 fun72;
     65 	struct fdreg_77 fun77;
     66 };
     67 #endif
     68 
     69 /* Data Select Register bits */
     70 #define DRS_RESET	0x80
     71 #define DRS_POWER	0x40
     72 #define DRS_PLL		0x20
     73 #define	FDC_500KBPS	0x00		/*   500KBPS MFM drive transfer rate */
     74 #define	FDC_300KBPS	0x01		/*   300KBPS MFM drive transfer rate */
     75 #define	FDC_250KBPS	0x02		/*   250KBPS MFM drive transfer rate */
     76 #define	FDC_125KBPS	0x03		/*   125KBPS  FM drive transfer rate */
     77 
     78 /* Digital Output Register bits */
     79 #define	FDO_FDSEL	0x03		/*  floppy device select */
     80 #define	FDO_FRST	0x04		/*  floppy controller reset */
     81 #define	FDO_FDMAEN	0x08		/*  enable floppy DMA and Interrupt */
     82 #define	FDO_MOEN(n)	((1 << n) * 0x10)	/* motor enable */
     83 
     84 #define	FDI_DCHG	0x80		/*   diskette has been changed */
     85 
     86 /* XXX - find a place for these... */
     87 #define NE7CMD_CFG		0x13
     88 #define CFG_EIS			0x40
     89 #define CFG_EFIFO		0x20
     90 #define CFG_POLL		0x10
     91 #define CFG_THRHLD_MASK		0x0f
     92 
     93 #define NE7CMD_LOCK		0x14
     94 #define CFG_LOCK		0x80
     95 
     96 #define NE7CMD_MOTOR		0x0b
     97 #define MOTOR_ON		0x80
     98 
     99 #define NE7CMD_DUMPREG		0x0e
    100 #define NE7CMD_VERSION		0x10
    101 
    102 #define ST1_OVERRUN		0x10
    103 
    104 /* sun3x - Floppy Control Register bits */
    105 #define	FCR_TC		0x01	/* terminal count reset */
    106 #define	FCR_EJECT	0x02	/* eject floppy */
    107 #define	FCR_MTRON	0x04	/* motor on */
    108 #define	FCR_DSEL1	0x08	/* select drive 1 */
    109 #define	FCR_DSEL0	0x10	/* select drive 0 */
    110 #define	FCR_DSEL(drive)	((drive) ? FCR_DSEL1 : FCR_DSEL0)
    111 
    112 /* sun3x - Register offsets */
    113 #define	FDC_FCR_OFFSET	0x400
    114 #define	FDC_FVR_OFFSET	0x800
    115