1 1.7 andvar /* $NetBSD: cg2reg.h,v 1.7 2023/03/28 20:01:57 andvar Exp $ */ 2 1.1 gwr 3 1.1 gwr /* 4 1.1 gwr * Copyright (c) 1994 Dennis Ferguson 5 1.1 gwr * All rights reserved. 6 1.1 gwr * 7 1.1 gwr * Redistribution and use in source and binary forms, with or without 8 1.1 gwr * modification, are permitted provided that the following conditions 9 1.1 gwr * are met: 10 1.1 gwr * 1. Redistributions of source code must retain the above copyright 11 1.1 gwr * notice, this list of conditions and the following disclaimer. 12 1.1 gwr * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 gwr * notice, this list of conditions and the following disclaimer in the 14 1.1 gwr * documentation and/or other materials provided with the distribution. 15 1.1 gwr * 16 1.1 gwr * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 gwr * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 gwr * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 gwr * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 gwr * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 1.1 gwr * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 1.1 gwr * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 1.1 gwr * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 1.1 gwr * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 1.1 gwr * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 1.1 gwr */ 27 1.1 gwr 28 1.2 gwr /* cg2reg.h - CG2 colour frame buffer definitions 29 1.1 gwr * 30 1.1 gwr * The mapped memory looks like: 31 1.1 gwr * 32 1.1 gwr * offset contents 33 1.1 gwr * 0x000000 bit plane map - 1st (of 8) plane used by the X server in -mono mode 34 1.1 gwr * 0x100000 pixel map - used by the X server in color mode 35 1.1 gwr * 0x200000 raster op mode memory map - unused by X server 36 1.1 gwr * 0x300000 random control registers (lots of spaces in between) 37 1.1 gwr * 0x310000 shadow colour map 38 1.1 gwr */ 39 1.1 gwr 40 1.1 gwr /* Frame buffer memory size and depth */ 41 1.1 gwr #define CG2_FBSIZE (1024 * 1024) 42 1.1 gwr #define CG2_N_PLANE 8 43 1.1 gwr 44 1.1 gwr /* Screen dimensions */ 45 1.1 gwr #define CG2_WIDTH 1152 46 1.1 gwr #define CG2_HEIGHT 900 47 1.1 gwr 48 1.1 gwr /* arrangement of bit plane mode memory */ 49 1.1 gwr union bitplane { 50 1.1 gwr u_short word[CG2_HEIGHT][CG2_WIDTH/(CG2_N_PLANE * sizeof(u_short))]; 51 1.1 gwr u_short plane[CG2_FBSIZE/(CG2_N_PLANE * sizeof(u_short))]; 52 1.1 gwr }; 53 1.1 gwr 54 1.1 gwr /* arrangement of pixel mode memory */ 55 1.1 gwr union byteplane { 56 1.1 gwr u_char pixel[CG2_HEIGHT][CG2_WIDTH]; 57 1.1 gwr u_char frame[CG2_FBSIZE]; 58 1.1 gwr }; 59 1.1 gwr 60 1.1 gwr 61 1.1 gwr /* 62 1.1 gwr * Structure describing the first two megabytes of the frame buffer. 63 1.1 gwr * Normal memory maps in bit plane and pixel modes 64 1.1 gwr */ 65 1.1 gwr struct cg2memfb { 66 1.1 gwr union bitplane memplane[CG2_N_PLANE]; /* bit plane map */ 67 1.1 gwr union byteplane pixplane; /* pixel map */ 68 1.1 gwr }; 69 1.1 gwr 70 1.1 gwr 71 1.1 gwr /* 72 1.1 gwr * Control/status register. The X server only appears to use update_cmap 73 1.1 gwr * and video_enab. 74 1.1 gwr */ 75 1.1 gwr struct cg2statusreg { 76 1.1 gwr u_int reserved : 2; /* not used */ 77 1.1 gwr u_int fastread : 1; /* r/o: has some feature I don't understand */ 78 1.1 gwr u_int id : 1; /* r/o: ext status and ID registers exist */ 79 1.1 gwr u_int resolution : 4; /* screen resolution, 0 means 1152x900 */ 80 1.1 gwr u_int retrace : 1; /* r/o: retrace in progress */ 81 1.1 gwr u_int inpend : 1; /* r/o: interrupt request */ 82 1.1 gwr u_int ropmode : 3; /* ?? */ 83 1.1 gwr u_int inten : 1; /* interrupt enable (for end of retrace) */ 84 1.1 gwr u_int update_cmap : 1; /* copy/use shadow colour map */ 85 1.1 gwr u_int video_enab : 1; /* enable video */ 86 1.1 gwr }; 87 1.1 gwr 88 1.1 gwr 89 1.1 gwr /* 90 1.1 gwr * Extended status register. Unused by X server 91 1.1 gwr */ 92 1.1 gwr struct cg2_extstatus { 93 1.1 gwr u_int gpintreq : 1; /* interrupt request */ 94 1.1 gwr u_int gpintdis : 1; /* interrupt disable */ 95 1.1 gwr u_int reserved : 13; /* unused */ 96 1.1 gwr u_int gpbus : 1; /* bus enabled */ 97 1.1 gwr }; 98 1.1 gwr 99 1.1 gwr 100 1.1 gwr /* 101 1.1 gwr * Double buffer control register. It appears that (some of?) the 102 1.1 gwr * cg2 cards support a pair of memory sets, referred to as `A' and 103 1.1 gwr * `B', which can be swapped to allow atomic screen updates. This 104 1.1 gwr * controls them. 105 1.1 gwr */ 106 1.1 gwr struct dblbufreg { 107 1.1 gwr u_int display_b : 1; /* display memory B (set) or A (reset) */ 108 1.7 andvar u_int read_b : 1; /* access memory B (set) or A (reset) */ 109 1.1 gwr u_int nowrite_b : 1; /* when set, writes don't update memory B */ 110 1.1 gwr u_int nowrite_a : 1; /* when set, writes don't update memory A */ 111 1.1 gwr u_int read_ecmap : 1; /* copy from(clear)/to(set) shadow colour map */ 112 1.1 gwr u_int fast_read : 1; /* fast reads, but wrong data */ 113 1.1 gwr u_int wait : 1; /* when set, remains so to end up v. retrace */ 114 1.1 gwr u_int update_ecmap : 1; /* copy/use shadow colour map */ 115 1.1 gwr u_int reserved : 8; 116 1.1 gwr }; 117 1.1 gwr 118 1.1 gwr 119 1.1 gwr /* 120 1.1 gwr * Zoom register, apparently present on Sun-2 colour boards only. See 121 1.1 gwr * the Sun documentation, I don't know anyone who still has a Sun-2. 122 1.1 gwr */ 123 1.1 gwr struct cg2_zoom { 124 1.1 gwr union { 125 1.5 cl u_short reg; 126 1.1 gwr u_char reg_pad[4096]; 127 1.1 gwr } wordpan; 128 1.1 gwr union { 129 1.1 gwr struct { 130 1.1 gwr u_int unused : 8; 131 1.1 gwr u_int lineoff : 4; 132 1.1 gwr u_int pixzoom : 4; 133 1.1 gwr } reg; 134 1.1 gwr u_short word; 135 1.1 gwr u_char reg_pad[4096]; 136 1.1 gwr } zoom; 137 1.1 gwr union { 138 1.1 gwr struct { 139 1.1 gwr u_int unused : 8; 140 1.1 gwr u_int lorigin : 4; 141 1.1 gwr u_int pixeloff : 4; 142 1.1 gwr } reg; 143 1.1 gwr u_short word; 144 1.1 gwr u_char reg_pad[4096]; 145 1.1 gwr } pixpan; 146 1.1 gwr union { 147 1.1 gwr u_short reg; 148 1.1 gwr u_char reg_pad[4096]; 149 1.1 gwr } varzoom; 150 1.1 gwr }; 151 1.1 gwr 152 1.1 gwr 153 1.1 gwr /* 154 1.1 gwr * Miscellany. On the Sun-3 these registers exist in place of the above. 155 1.1 gwr */ 156 1.1 gwr struct cg2_nozoom { 157 1.1 gwr union { /* double buffer register (see above) */ 158 1.1 gwr struct dblbufreg reg; 159 1.1 gwr u_short word; 160 1.1 gwr u_char reg_pad[4096]; 161 1.1 gwr } dblbuf; 162 1.4 wiz union { /* start of DMA window */ 163 1.1 gwr u_short reg; 164 1.1 gwr u_char reg_pad[4096]; 165 1.1 gwr } dmabase; 166 1.4 wiz union { /* DMA window size */ 167 1.1 gwr u_short reg; /* actually 8 bits. reg*16 == size */ 168 1.1 gwr u_char reg_pad[4096]; 169 1.1 gwr } dmawidth; 170 1.1 gwr union { /* frame count */ 171 1.1 gwr u_short reg; /* actually 8 bits only. r/o */ 172 1.1 gwr u_char reg_pad[4096]; 173 1.1 gwr } framecnt; 174 1.1 gwr }; 175 1.1 gwr 176 1.1 gwr 177 1.1 gwr /* 178 1.1 gwr * Raster op control registers. X doesn't use this, but documented here 179 1.1 gwr * for future reference. 180 1.1 gwr */ 181 1.1 gwr struct memropc { 182 1.1 gwr u_short mrc_dest; 183 1.1 gwr u_short mrc_source1; 184 1.1 gwr u_short mrc_source2; 185 1.1 gwr u_short mrc_pattern; 186 1.1 gwr u_short mrc_mask1; 187 1.1 gwr u_short mrc_mask2; 188 1.1 gwr u_short mrc_shift; 189 1.1 gwr u_short mrc_op; 190 1.1 gwr u_short mrc_width; 191 1.1 gwr u_short mrc_opcount; 192 1.1 gwr u_short mrc_decoderout; 193 1.1 gwr u_short mrc_x11; 194 1.1 gwr u_short mrc_x12; 195 1.1 gwr u_short mrc_x13; 196 1.1 gwr u_short mrc_x14; 197 1.1 gwr u_short mrc_x15; 198 1.1 gwr }; 199 1.1 gwr 200 1.1 gwr 201 1.1 gwr /* 202 1.1 gwr * Last chunk of the frame buffer (i.e. from offset 0x200000 and above). 203 1.1 gwr * Exists separately from struct cg2memfb apparently because Sun software 204 1.1 gwr * avoids mapping the latter, though X uses it. 205 1.1 gwr */ 206 1.1 gwr struct cg2fb { 207 1.3 gwr 208 1.3 gwr #ifndef _KERNEL /* XXX - Hack! */ 209 1.3 gwr /* XXX - Don't want this permanently in the kernel mapping. */ 210 1.1 gwr union { /* raster op mode frame memory */ 211 1.1 gwr union bitplane ropplane[CG2_N_PLANE]; 212 1.1 gwr union byteplane roppixel; 213 1.1 gwr } ropio; 214 1.3 gwr #endif /* _KERNEL XXX - Hack! */ 215 1.3 gwr 216 1.1 gwr union { /* raster op control unit (1 per plane) */ 217 1.1 gwr struct memropc ropregs; 218 1.1 gwr struct { 219 1.1 gwr u_char pad[2048]; 220 1.1 gwr struct memropc ropregs; 221 1.1 gwr } prime; 222 1.1 gwr u_char reg_pad[4096]; 223 1.1 gwr } ropcontrol[9]; 224 1.1 gwr union { /* status register */ 225 1.1 gwr struct cg2statusreg reg; 226 1.1 gwr u_short word; 227 1.1 gwr u_char reg_pad[4096]; 228 1.1 gwr } status; 229 1.1 gwr union { /* per-plane mask register */ 230 1.1 gwr u_short reg; /* 8 bit mask register - set means plane r/w */ 231 1.1 gwr u_char reg_pad[4096]; 232 1.1 gwr } ppmask; 233 1.1 gwr union { /* miscellaneous registers */ 234 1.1 gwr struct cg2_zoom zoom; 235 1.1 gwr struct cg2_nozoom nozoom; 236 1.1 gwr } misc; 237 1.1 gwr union { /* interrupt vector */ 238 1.1 gwr u_short reg; 239 1.1 gwr u_char reg_pad[32]; 240 1.1 gwr } intrptvec; 241 1.1 gwr union { /* board ID */ 242 1.1 gwr u_short reg; 243 1.1 gwr u_char reg_pad[16]; 244 1.1 gwr } id; 245 1.1 gwr union { /* extended status */ 246 1.1 gwr struct cg2_extstatus reg; 247 1.1 gwr u_short word; 248 1.1 gwr u_char reg_pad[16]; 249 1.1 gwr } extstatus; 250 1.1 gwr union { /* auxiliary raster op mode register (?)*/ 251 1.1 gwr u_short reg; 252 1.1 gwr u_char reg_pad[4032]; 253 1.1 gwr } ropmode; 254 1.1 gwr u_short redmap[256]; /* shadow colour maps */ 255 1.1 gwr u_short greenmap[256]; 256 1.1 gwr u_short bluemap[256]; 257 1.1 gwr }; 258