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clock.c revision 1.9
      1  1.9  gwr /*	$NetBSD: clock.c,v 1.9 1997/03/05 22:22:11 gwr Exp $	*/
      2  1.1  gwr 
      3  1.1  gwr /*
      4  1.1  gwr  * Copyright (c) 1994 Gordon W. Ross
      5  1.1  gwr  * Copyright (c) 1993 Adam Glass
      6  1.1  gwr  * Copyright (c) 1988 University of Utah.
      7  1.1  gwr  * Copyright (c) 1982, 1990, 1993
      8  1.1  gwr  *	The Regents of the University of California.  All rights reserved.
      9  1.1  gwr  *
     10  1.1  gwr  * This code is derived from software contributed to Berkeley by
     11  1.1  gwr  * the Systems Programming Group of the University of Utah Computer
     12  1.1  gwr  * Science Department.
     13  1.1  gwr  *
     14  1.1  gwr  * Redistribution and use in source and binary forms, with or without
     15  1.1  gwr  * modification, are permitted provided that the following conditions
     16  1.1  gwr  * are met:
     17  1.1  gwr  * 1. Redistributions of source code must retain the above copyright
     18  1.1  gwr  *    notice, this list of conditions and the following disclaimer.
     19  1.1  gwr  * 2. Redistributions in binary form must reproduce the above copyright
     20  1.1  gwr  *    notice, this list of conditions and the following disclaimer in the
     21  1.1  gwr  *    documentation and/or other materials provided with the distribution.
     22  1.1  gwr  * 3. All advertising materials mentioning features or use of this software
     23  1.1  gwr  *    must display the following acknowledgement:
     24  1.1  gwr  *	This product includes software developed by the University of
     25  1.1  gwr  *	California, Berkeley and its contributors.
     26  1.1  gwr  * 4. Neither the name of the University nor the names of its contributors
     27  1.1  gwr  *    may be used to endorse or promote products derived from this software
     28  1.1  gwr  *    without specific prior written permission.
     29  1.1  gwr  *
     30  1.1  gwr  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     31  1.1  gwr  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     32  1.1  gwr  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     33  1.1  gwr  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     34  1.1  gwr  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     35  1.1  gwr  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     36  1.1  gwr  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     37  1.1  gwr  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     38  1.1  gwr  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     39  1.1  gwr  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     40  1.1  gwr  * SUCH DAMAGE.
     41  1.1  gwr  *
     42  1.1  gwr  *	from: Utah Hdr: clock.c 1.18 91/01/21$
     43  1.1  gwr  *	from: @(#)clock.c	8.2 (Berkeley) 1/12/94
     44  1.1  gwr  */
     45  1.1  gwr 
     46  1.1  gwr /*
     47  1.3  gwr  * Machine-dependent clock routines for the Mostek48t02
     48  1.1  gwr  */
     49  1.1  gwr 
     50  1.1  gwr #include <sys/param.h>
     51  1.1  gwr #include <sys/systm.h>
     52  1.1  gwr #include <sys/time.h>
     53  1.1  gwr #include <sys/kernel.h>
     54  1.1  gwr #include <sys/device.h>
     55  1.1  gwr 
     56  1.9  gwr #include <m68k/asm_single.h>
     57  1.9  gwr 
     58  1.1  gwr #include <machine/autoconf.h>
     59  1.1  gwr #include <machine/cpu.h>
     60  1.1  gwr #include <machine/mon.h>
     61  1.1  gwr #include <machine/obio.h>
     62  1.3  gwr #include <machine/machdep.h>
     63  1.1  gwr 
     64  1.8  gwr #include <dev/clock_subr.h>
     65  1.8  gwr 
     66  1.3  gwr #include <sun3/sun3/interreg.h>
     67  1.3  gwr #include "mostek48t02.h"
     68  1.1  gwr 
     69  1.1  gwr #define	CLOCK_PRI	5
     70  1.9  gwr #define IREG_CLK_BITS	(IREG_CLOCK_ENAB_7 | IREG_CLOCK_ENAB_5)
     71  1.1  gwr 
     72  1.1  gwr void _isr_clock __P((void));	/* in locore.s */
     73  1.1  gwr void clock_intr __P((struct clockframe));
     74  1.1  gwr 
     75  1.3  gwr static volatile void *clock_va;
     76  1.1  gwr 
     77  1.1  gwr static int  clock_match __P((struct device *, struct cfdata *, void *args));
     78  1.1  gwr static void clock_attach __P((struct device *, struct device *, void *));
     79  1.1  gwr 
     80  1.1  gwr struct cfattach clock_ca = {
     81  1.1  gwr 	sizeof(struct device), clock_match, clock_attach
     82  1.1  gwr };
     83  1.1  gwr 
     84  1.1  gwr struct cfdriver clock_cd = {
     85  1.1  gwr 	NULL, "clock", DV_DULL
     86  1.1  gwr };
     87  1.1  gwr 
     88  1.9  gwr 
     89  1.9  gwr /*
     90  1.9  gwr  * This is called very early (by obio_init()) but after
     91  1.9  gwr  * intreg_init() has found the PROM mapping for the
     92  1.9  gwr  * interrupt register and cleared it.
     93  1.9  gwr  */
     94  1.9  gwr void
     95  1.9  gwr clock_init()
     96  1.9  gwr {
     97  1.9  gwr 	/* Yes, use the EEPROM address.  It is the same H/W device. */
     98  1.9  gwr 	clock_va = obio_find_mapping(OBIO_EEPROM, sizeof(struct clockreg));
     99  1.9  gwr 	if (!clock_va) {
    100  1.9  gwr 		mon_printf("clock_init\n");
    101  1.9  gwr 		sunmon_abort();
    102  1.9  gwr 	}
    103  1.9  gwr }
    104  1.9  gwr 
    105  1.1  gwr /*
    106  1.7  gwr  * XXX  Need to determine which type of clock we have!
    107  1.7  gwr  * XXX  The Sun3/80 always has the MK4802, while the
    108  1.7  gwr  * XXX  Sun3/470 can (reportedly) have that or the old
    109  1.7  gwr  * XXX  intersil7170.  Should have two clock drivers...
    110  1.1  gwr  */
    111  1.1  gwr static int
    112  1.1  gwr clock_match(parent, cf, args)
    113  1.1  gwr     struct device *parent;
    114  1.1  gwr 	struct cfdata *cf;
    115  1.1  gwr     void *args;
    116  1.1  gwr {
    117  1.1  gwr 	struct confargs *ca = args;
    118  1.1  gwr 
    119  1.1  gwr 	/* This driver only supports one unit. */
    120  1.1  gwr 	if (cf->cf_unit != 0)
    121  1.1  gwr 		return (0);
    122  1.1  gwr 
    123  1.1  gwr 	/* Validate the given address. */
    124  1.1  gwr 	if (ca->ca_paddr != OBIO_CLOCK2)
    125  1.1  gwr 		return (0);
    126  1.1  gwr 
    127  1.1  gwr 	/* Default interrupt priority. */
    128  1.1  gwr 	if (ca->ca_intpri == -1)
    129  1.1  gwr 		ca->ca_intpri = CLOCK_PRI;
    130  1.1  gwr 
    131  1.1  gwr 	return (1);
    132  1.1  gwr }
    133  1.1  gwr 
    134  1.1  gwr static void
    135  1.1  gwr clock_attach(parent, self, args)
    136  1.1  gwr 	struct device *parent;
    137  1.1  gwr 	struct device *self;
    138  1.1  gwr 	void *args;
    139  1.1  gwr {
    140  1.1  gwr 
    141  1.1  gwr 	printf("\n");
    142  1.1  gwr 
    143  1.1  gwr 	/*
    144  1.1  gwr 	 * Can not hook up the ISR until cpu_initclocks()
    145  1.1  gwr 	 * because hardclock is not ready until then.
    146  1.1  gwr 	 * For now, the handler is _isr_autovec(), which
    147  1.1  gwr 	 * will complain if it gets clock interrupts.
    148  1.1  gwr 	 */
    149  1.1  gwr }
    150  1.1  gwr 
    151  1.1  gwr /*
    152  1.1  gwr  * Set and/or clear the desired clock bits in the interrupt
    153  1.1  gwr  * register.  We have to be extremely careful that we do it
    154  1.1  gwr  * in such a manner that we don't get ourselves lost.
    155  1.9  gwr  * XXX:  Watch out!  It's really easy to break this!
    156  1.1  gwr  */
    157  1.1  gwr void
    158  1.9  gwr set_clk_mode(on, off, enable_clk)
    159  1.1  gwr 	u_char on, off;
    160  1.9  gwr 	int enable_clk;
    161  1.1  gwr {
    162  1.1  gwr 	register u_char interreg;
    163  1.1  gwr 
    164  1.9  gwr 	/*
    165  1.9  gwr 	 * If we have not yet mapped the register,
    166  1.9  gwr 	 * then we do not want to do any of this...
    167  1.9  gwr 	 */
    168  1.5  gwr 	if (!interrupt_reg)
    169  1.4  gwr 		return;
    170  1.4  gwr 
    171  1.9  gwr #ifdef	DIAGNOSTIC
    172  1.9  gwr 	/* Assertion: were are at splhigh! */
    173  1.9  gwr 	if ((getsr() & PSL_IPL) < PSL_IPL7)
    174  1.9  gwr 		panic("set_clk_mode: bad ipl");
    175  1.9  gwr #endif
    176  1.1  gwr 
    177  1.1  gwr 	/*
    178  1.1  gwr 	 * make sure that we are only playing w/
    179  1.1  gwr 	 * clock interrupt register bits
    180  1.1  gwr 	 */
    181  1.9  gwr 	on  &= IREG_CLK_BITS;
    182  1.9  gwr 	off &= IREG_CLK_BITS;
    183  1.1  gwr 
    184  1.9  gwr 	/* First, turn off the "master" enable bit. */
    185  1.9  gwr 	single_inst_bclr_b(*interrupt_reg, IREG_ALL_ENAB);
    186  1.1  gwr 
    187  1.1  gwr 	/*
    188  1.9  gwr 	 * Save the current interrupt register clock bits,
    189  1.9  gwr 	 * and turn off/on the requested bits in the copy.
    190  1.1  gwr 	 */
    191  1.9  gwr 	interreg = *interrupt_reg & IREG_CLK_BITS;
    192  1.9  gwr 	interreg &= ~off;
    193  1.9  gwr 	interreg |= on;
    194  1.9  gwr 
    195  1.9  gwr 	/* Clear the CLK5 and CLK7 bits to clear the flip-flops. */
    196  1.9  gwr 	single_inst_bclr_b(*interrupt_reg, IREG_CLK_BITS);
    197  1.9  gwr 
    198  1.9  gwr #ifdef	SUN3_470
    199  1.9  gwr 	if (intersil_va) {
    200  1.9  gwr 		/*
    201  1.9  gwr 		 * Then disable clock interrupts, and read the clock's
    202  1.9  gwr 		 * interrupt register to clear any pending signals there.
    203  1.9  gwr 		 */
    204  1.9  gwr 		intersil_clock->clk_cmd_reg =
    205  1.9  gwr 			intersil_command(INTERSIL_CMD_RUN, INTERSIL_CMD_IDISABLE);
    206  1.9  gwr 		intersil_clear();
    207  1.9  gwr 	}
    208  1.9  gwr #endif	/* SUN3_470 */
    209  1.3  gwr 
    210  1.9  gwr 	/* Set the requested bits in the interrupt register. */
    211  1.9  gwr 	single_inst_bset_b(*interrupt_reg, interreg);
    212  1.1  gwr 
    213  1.9  gwr #ifdef	SUN3_470
    214  1.9  gwr 	/* Turn the clock back on (maybe) */
    215  1.9  gwr 	if (intersil_va && enable_clk)
    216  1.9  gwr 		intersil_clock->clk_cmd_reg =
    217  1.9  gwr 			intersil_command(INTERSIL_CMD_RUN, INTERSIL_CMD_IENABLE);
    218  1.9  gwr #endif	/* SUN3_470 */
    219  1.1  gwr 
    220  1.9  gwr 	/* Finally, turn the "master" enable back on. */
    221  1.9  gwr 	single_inst_bset_b(*interrupt_reg, IREG_ALL_ENAB);
    222  1.1  gwr }
    223  1.1  gwr 
    224  1.1  gwr /*
    225  1.1  gwr  * Set up the real-time clock (enable clock interrupts).
    226  1.1  gwr  * Leave stathz 0 since there is no secondary clock available.
    227  1.1  gwr  * Note that clock interrupts MUST STAY DISABLED until here.
    228  1.1  gwr  */
    229  1.1  gwr void
    230  1.1  gwr cpu_initclocks(void)
    231  1.1  gwr {
    232  1.1  gwr 	int s;
    233  1.1  gwr 
    234  1.1  gwr 	s = splhigh();
    235  1.1  gwr 
    236  1.1  gwr 	/* Install isr (in locore.s) that calls clock_intr(). */
    237  1.1  gwr 	isr_add_custom(5, (void*)_isr_clock);
    238  1.1  gwr 
    239  1.9  gwr 	/* Now enable the clock at level 5 in the interrupt reg. */
    240  1.9  gwr 	set_clk_mode(IREG_CLOCK_ENAB_5, 0, 1);
    241  1.3  gwr 
    242  1.1  gwr 	splx(s);
    243  1.1  gwr }
    244  1.1  gwr 
    245  1.1  gwr /*
    246  1.1  gwr  * This doesn't need to do anything, as we have only one timer and
    247  1.1  gwr  * profhz==stathz==hz.
    248  1.1  gwr  */
    249  1.1  gwr void
    250  1.1  gwr setstatclockrate(newhz)
    251  1.1  gwr 	int newhz;
    252  1.1  gwr {
    253  1.1  gwr 	/* nothing */
    254  1.1  gwr }
    255  1.1  gwr 
    256  1.1  gwr /*
    257  1.3  gwr  * This is is called by the "custom" interrupt handler.
    258  1.9  gwr  * Note that we can get ZS interrupts while this runs,
    259  1.9  gwr  * and zshard may touch the interrupt_reg, so we must
    260  1.9  gwr  * be careful to use the single_inst_* macros to modify
    261  1.9  gwr  * the interrupt register atomically.
    262  1.1  gwr  */
    263  1.1  gwr void
    264  1.1  gwr clock_intr(cf)
    265  1.1  gwr 	struct clockframe cf;
    266  1.1  gwr {
    267  1.1  gwr 
    268  1.1  gwr 	/* Pulse the clock intr. enable low. */
    269  1.9  gwr 	single_inst_bclr_b(*interrupt_reg, IREG_CLOCK_ENAB_5);
    270  1.9  gwr 	single_inst_bset_b(*interrupt_reg, IREG_CLOCK_ENAB_5);
    271  1.1  gwr 
    272  1.9  gwr 	/* Call common clock interrupt handler. */
    273  1.1  gwr 	hardclock(&cf);
    274  1.9  gwr 
    275  1.9  gwr 	/* No LED frobbing on the 3/80 */
    276  1.1  gwr }
    277  1.9  gwr 
    278  1.1  gwr 
    279  1.1  gwr /*
    280  1.1  gwr  * Return the best possible estimate of the time in the timeval
    281  1.1  gwr  * to which tvp points.  We do this by returning the current time
    282  1.1  gwr  * plus the amount of time since the last clock interrupt.
    283  1.1  gwr  *
    284  1.1  gwr  * Check that this time is no less than any previously-reported time,
    285  1.1  gwr  * which could happen around the time of a clock adjustment.  Just for
    286  1.1  gwr  * fun, we guarantee that the time will be greater than the value
    287  1.1  gwr  * obtained by a previous call.
    288  1.1  gwr  */
    289  1.1  gwr void
    290  1.1  gwr microtime(tvp)
    291  1.1  gwr 	register struct timeval *tvp;
    292  1.1  gwr {
    293  1.1  gwr 	int s = splhigh();
    294  1.1  gwr 	static struct timeval lasttime;
    295  1.1  gwr 
    296  1.1  gwr 	*tvp = time;
    297  1.1  gwr 	tvp->tv_usec++; 	/* XXX */
    298  1.1  gwr 	while (tvp->tv_usec > 1000000) {
    299  1.1  gwr 		tvp->tv_sec++;
    300  1.1  gwr 		tvp->tv_usec -= 1000000;
    301  1.1  gwr 	}
    302  1.1  gwr 	if (tvp->tv_sec == lasttime.tv_sec &&
    303  1.1  gwr 		tvp->tv_usec <= lasttime.tv_usec &&
    304  1.1  gwr 		(tvp->tv_usec = lasttime.tv_usec + 1) > 1000000)
    305  1.1  gwr 	{
    306  1.1  gwr 		tvp->tv_sec++;
    307  1.1  gwr 		tvp->tv_usec -= 1000000;
    308  1.1  gwr 	}
    309  1.1  gwr 	lasttime = *tvp;
    310  1.1  gwr 	splx(s);
    311  1.1  gwr }
    312  1.1  gwr 
    313  1.1  gwr 
    314  1.1  gwr /*
    315  1.1  gwr  * Machine-dependent clock routines.
    316  1.1  gwr  *
    317  1.1  gwr  * Inittodr initializes the time of day hardware which provides
    318  1.1  gwr  * date functions.
    319  1.1  gwr  *
    320  1.1  gwr  * Resettodr restores the time of day hardware after a time change.
    321  1.1  gwr  */
    322  1.1  gwr 
    323  1.1  gwr static long clk_get_secs(void);
    324  1.1  gwr static void clk_set_secs(long);
    325  1.1  gwr 
    326  1.1  gwr /*
    327  1.1  gwr  * Initialize the time of day register, based on the time base
    328  1.1  gwr  * which is, e.g. from a filesystem.
    329  1.1  gwr  */
    330  1.1  gwr void inittodr(fs_time)
    331  1.1  gwr 	time_t fs_time;
    332  1.1  gwr {
    333  1.1  gwr 	long diff, clk_time;
    334  1.1  gwr 	long long_ago = (5 * SECYR);
    335  1.1  gwr 	int clk_bad = 0;
    336  1.1  gwr 
    337  1.1  gwr 	/*
    338  1.1  gwr 	 * Sanity check time from file system.
    339  1.1  gwr 	 * If it is zero,assume filesystem time is just unknown
    340  1.1  gwr 	 * instead of preposterous.  Don't bark.
    341  1.1  gwr 	 */
    342  1.1  gwr 	if (fs_time < long_ago) {
    343  1.1  gwr 		/*
    344  1.1  gwr 		 * If fs_time is zero, assume filesystem time is just
    345  1.1  gwr 		 * unknown instead of preposterous.  Don't bark.
    346  1.1  gwr 		 */
    347  1.1  gwr 		if (fs_time != 0)
    348  1.1  gwr 			printf("WARNING: preposterous time in file system\n");
    349  1.1  gwr 		/* 1991/07/01  12:00:00 */
    350  1.1  gwr 		fs_time = 21*SECYR + 186*SECDAY + SECDAY/2;
    351  1.1  gwr 	}
    352  1.1  gwr 
    353  1.1  gwr 	clk_time = clk_get_secs();
    354  1.1  gwr 
    355  1.1  gwr 	/* Sanity check time from clock. */
    356  1.1  gwr 	if (clk_time < long_ago) {
    357  1.1  gwr 		printf("WARNING: bad date in battery clock");
    358  1.1  gwr 		clk_bad = 1;
    359  1.1  gwr 		clk_time = fs_time;
    360  1.1  gwr 	} else {
    361  1.1  gwr 		/* Does the clock time jive with the file system? */
    362  1.1  gwr 		diff = clk_time - fs_time;
    363  1.1  gwr 		if (diff < 0)
    364  1.1  gwr 			diff = -diff;
    365  1.1  gwr 		if (diff >= (SECDAY*2)) {
    366  1.1  gwr 			printf("WARNING: clock %s %d days",
    367  1.1  gwr 				   (clk_time < fs_time) ? "lost" : "gained",
    368  1.1  gwr 				   (int) (diff / SECDAY));
    369  1.1  gwr 			clk_bad = 1;
    370  1.1  gwr 		}
    371  1.1  gwr 	}
    372  1.1  gwr 	if (clk_bad)
    373  1.1  gwr 		printf(" -- CHECK AND RESET THE DATE!\n");
    374  1.1  gwr 	time.tv_sec = clk_time;
    375  1.1  gwr }
    376  1.1  gwr 
    377  1.1  gwr /*
    378  1.1  gwr  * Resettodr restores the time of day hardware after a time change.
    379  1.1  gwr  */
    380  1.1  gwr void resettodr()
    381  1.1  gwr {
    382  1.1  gwr 	clk_set_secs(time.tv_sec);
    383  1.1  gwr }
    384  1.1  gwr 
    385  1.1  gwr 
    386  1.1  gwr /*
    387  1.3  gwr  * Routines to copy state into and out of the clock.
    388  1.3  gwr  * The clock CSR has to be set for read or write.
    389  1.1  gwr  */
    390  1.3  gwr static void
    391  1.8  gwr clk_get_dt(struct clock_ymdhms *dt)
    392  1.1  gwr {
    393  1.3  gwr 	volatile struct clockreg *cl = clock_va;
    394  1.1  gwr 	int s;
    395  1.1  gwr 
    396  1.1  gwr 	s = splhigh();
    397  1.7  gwr 
    398  1.3  gwr 	/* enable read (stop time) */
    399  1.3  gwr 	cl->cl_csr |= CLK_READ;
    400  1.1  gwr 
    401  1.3  gwr 	/* Copy the info */
    402  1.3  gwr 	dt->dt_sec  = cl->cl_sec;
    403  1.3  gwr 	dt->dt_min  = cl->cl_min;
    404  1.3  gwr 	dt->dt_hour = cl->cl_hour;
    405  1.3  gwr 	dt->dt_wday = cl->cl_wday;
    406  1.3  gwr 	dt->dt_day  = cl->cl_mday;
    407  1.3  gwr 	dt->dt_mon  = cl->cl_month;
    408  1.3  gwr 	dt->dt_year = cl->cl_year;
    409  1.1  gwr 
    410  1.3  gwr 	/* Done reading (time wears on) */
    411  1.3  gwr 	cl->cl_csr &= ~CLK_READ;
    412  1.1  gwr 	splx(s);
    413  1.1  gwr }
    414  1.1  gwr 
    415  1.3  gwr static void
    416  1.8  gwr clk_set_dt(struct clock_ymdhms *dt)
    417  1.1  gwr {
    418  1.3  gwr 	volatile struct clockreg *cl = clock_va;
    419  1.1  gwr 	int s;
    420  1.1  gwr 
    421  1.1  gwr 	s = splhigh();
    422  1.3  gwr 	/* enable write */
    423  1.3  gwr 	cl->cl_csr |= CLK_WRITE;
    424  1.1  gwr 
    425  1.3  gwr 	/* Copy the info */
    426  1.3  gwr 	cl->cl_sec = dt->dt_sec;
    427  1.3  gwr 	cl->cl_min = dt->dt_min;
    428  1.3  gwr 	cl->cl_hour = dt->dt_hour;
    429  1.3  gwr 	cl->cl_wday = dt->dt_wday;
    430  1.3  gwr 	cl->cl_mday = dt->dt_day;
    431  1.3  gwr 	cl->cl_month = dt->dt_mon;
    432  1.3  gwr 	cl->cl_year = dt->dt_year;
    433  1.1  gwr 
    434  1.3  gwr 	/* load them up */
    435  1.3  gwr 	cl->cl_csr &= ~CLK_WRITE;
    436  1.1  gwr 	splx(s);
    437  1.1  gwr }
    438  1.1  gwr 
    439  1.1  gwr 
    440  1.3  gwr /*
    441  1.8  gwr  * Now routines to get and set clock as POSIX time.
    442  1.8  gwr  * Our clock keeps "years since 1/1/1968".
    443  1.7  gwr  */
    444  1.8  gwr #define	CLOCK_BASE_YEAR 1968
    445  1.7  gwr 
    446  1.3  gwr static long
    447  1.3  gwr clk_get_secs()
    448  1.3  gwr {
    449  1.8  gwr 	struct clock_ymdhms dt;
    450  1.8  gwr 	long secs;
    451  1.3  gwr 
    452  1.3  gwr 	clk_get_dt(&dt);
    453  1.7  gwr 
    454  1.7  gwr 	/* Convert BCD values to binary. */
    455  1.7  gwr 	dt.dt_sec  = FROMBCD(dt.dt_sec);
    456  1.7  gwr 	dt.dt_min  = FROMBCD(dt.dt_min);
    457  1.7  gwr 	dt.dt_hour = FROMBCD(dt.dt_hour);
    458  1.7  gwr 	dt.dt_day  = FROMBCD(dt.dt_day);
    459  1.7  gwr 	dt.dt_mon  = FROMBCD(dt.dt_mon);
    460  1.7  gwr 	dt.dt_year = FROMBCD(dt.dt_year);
    461  1.7  gwr 
    462  1.8  gwr 	if ((dt.dt_hour > 24) ||
    463  1.8  gwr 		(dt.dt_day  > 31) ||
    464  1.8  gwr 		(dt.dt_mon  > 12))
    465  1.8  gwr 		return (0);
    466  1.8  gwr 
    467  1.8  gwr 	dt.dt_year += CLOCK_BASE_YEAR;
    468  1.8  gwr 	secs = clock_ymdhms_to_secs(&dt);
    469  1.8  gwr 	return (secs);
    470  1.3  gwr }
    471  1.7  gwr 
    472  1.3  gwr static void
    473  1.3  gwr clk_set_secs(secs)
    474  1.3  gwr 	long secs;
    475  1.3  gwr {
    476  1.8  gwr 	struct clock_ymdhms dt;
    477  1.3  gwr 
    478  1.8  gwr 	clock_secs_to_ymdhms(secs, &dt);
    479  1.8  gwr 	dt.dt_year -= CLOCK_BASE_YEAR;
    480  1.7  gwr 
    481  1.7  gwr 	/* Convert binary values to BCD. */
    482  1.7  gwr 	dt.dt_sec  = TOBCD(dt.dt_sec);
    483  1.7  gwr 	dt.dt_min  = TOBCD(dt.dt_min);
    484  1.7  gwr 	dt.dt_hour = TOBCD(dt.dt_hour);
    485  1.7  gwr 	dt.dt_day  = TOBCD(dt.dt_day);
    486  1.7  gwr 	dt.dt_mon  = TOBCD(dt.dt_mon);
    487  1.7  gwr 	dt.dt_year = TOBCD(dt.dt_year);
    488  1.7  gwr 
    489  1.3  gwr 	clk_set_dt(&dt);
    490  1.1  gwr }
    491