ka43.c revision 1.16
1 /* $NetBSD: ka43.c,v 1.16 1999/04/14 23:14:46 ragge Exp $ */ 2 /* 3 * Copyright (c) 1996 Ludd, University of Lule}, Sweden. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Ludd by Bertram Barth. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed at Ludd, University of 19 * Lule}, Sweden and its contributors. 20 * 4. The name of the author may not be used to endorse or promote products 21 * derived from this software without specific prior written permission 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/param.h> 36 #include <sys/types.h> 37 #include <sys/device.h> 38 #include <sys/kernel.h> 39 #include <sys/systm.h> 40 41 #include <vm/vm.h> 42 #include <vm/vm_kern.h> 43 44 #include <machine/pte.h> 45 #include <machine/cpu.h> 46 #include <machine/mtpr.h> 47 #include <machine/sid.h> 48 #include <machine/pmap.h> 49 #include <machine/nexus.h> 50 #include <machine/uvax.h> 51 #include <machine/vsbus.h> 52 #include <machine/ka43.h> 53 #include <machine/clock.h> 54 55 static void ka43_conf __P((struct device*, struct device*, void*)); 56 static void ka43_steal_pages __P((void)); 57 58 static int ka43_mchk __P((caddr_t)); 59 static void ka43_memerr __P((void)); 60 #if 0 61 static void ka43_clear_errors __P((void)); 62 #endif 63 static int ka43_cache_init __P((void)); /* "int mapen" as argument? */ 64 static int ka43_cache_reset __P((void)); 65 static int ka43_cache_enable __P((void)); 66 static int ka43_cache_disable __P((void)); 67 static int ka43_cache_invalidate __P((void)); 68 static void ka43_halt __P((void)); 69 static void ka43_reboot __P((int)); 70 static void ka43_clrf __P((void)); 71 72 73 struct cpu_dep ka43_calls = { 74 ka43_steal_pages, 75 no_nicr_clock, 76 ka43_mchk, 77 ka43_memerr, 78 ka43_conf, 79 chip_clkread, 80 chip_clkwrite, 81 7, /* 7.6 VUP */ 82 2, /* SCB pages */ 83 ka43_halt, 84 ka43_reboot, 85 ka43_clrf, 86 }; 87 88 /* 89 * ka43_steal_pages() is called with MMU disabled, after that call MMU gets 90 * enabled. Thus we initialize these four pointers with physical addresses, 91 * but before leving ka43_steal_pages() we reset them to virtual addresses. 92 */ 93 static volatile struct ka43_cpu *ka43_cpu = (void*)KA43_CPU_BASE; 94 extern short *clk_page; 95 96 static volatile u_int *ka43_creg = (void*)KA43_CH2_CREG; 97 static volatile u_int *ka43_ctag = (void*)KA43_CT2_BASE; 98 99 #define KA43_MC_RESTART 0x00008000 /* Restart possible*/ 100 #define KA43_PSL_FPDONE 0x00010000 /* First Part Done */ 101 102 struct ka43_mcframe { /* Format of RigelMAX machine check frame: */ 103 int mc43_bcnt; /* byte count, always 24 (0x18) */ 104 int mc43_code; /* machine check type code and restart bit */ 105 int mc43_addr; /* most recent (faulting?) virtual address */ 106 int mc43_viba; /* contents of VIBA register */ 107 int mc43_sisr; /* ICCS bit 6 and SISR bits 15:0 */ 108 int mc43_istate; /* internal state */ 109 int mc43_sc; /* shift count register */ 110 int mc43_pc; /* trapped PC */ 111 int mc43_psl; /* trapped PSL */ 112 }; 113 114 static char *ka43_mctype[] = { 115 "no error (0)", /* Code 0: No error */ 116 "FPA: protocol error", /* Code 1-5: FPA errors */ 117 "FPA: illegal opcode", 118 "FPA: operand parity error", 119 "FPA: unknown status", 120 "FPA: result parity error", 121 "unused (6)", /* Code 6-7: Unused */ 122 "unused (7)", 123 "MMU error (TLB miss)", /* Code 8-9: MMU errors */ 124 "MMU error (TLB hit)", 125 "HW interrupt at unused IPL", /* Code 10: Interrupt error */ 126 "MOVCx impossible state", /* Code 11-13: Microcode errors */ 127 "undefined trap code (i-box)", 128 "undefined control store address", 129 "unused (14)", /* Code 14-15: Unused */ 130 "unused (15)", 131 "PC tag or data parity error", /* Code 16: Cache error */ 132 "data bus parity error", /* Code 17: Read error */ 133 "data bus error (NXM)", /* Code 18: Write error */ 134 "undefined data bus state", /* Code 19: Bus error */ 135 }; 136 #define MC43_MAX 19 137 138 static int ka43_error_count = 0; 139 140 int 141 ka43_mchk(addr) 142 caddr_t addr; 143 { 144 register struct ka43_mcframe *mcf = (void*)addr; 145 146 mtpr(0x00, PR_MCESR); /* Acknowledge the machine check */ 147 printf("machine check %d (0x%x)\n", mcf->mc43_code, mcf->mc43_code); 148 printf("reason: %s\n", ka43_mctype[mcf->mc43_code & 0xff]); 149 if (++ka43_error_count > 10) { 150 printf("error_count exceeded: %d\n", ka43_error_count); 151 return (-1); 152 } 153 154 /* 155 * If either the Restart flag is set or the First-Part-Done flag 156 * is set, and the TRAP2 (double error) bit is not set, the the 157 * error is recoverable. 158 */ 159 if (mfpr(PR_PCSTS) & KA43_PCS_TRAP2) { 160 printf("TRAP2 (double error) in ka43_mchk.\n"); 161 panic("unrecoverable state in ka43_mchk.\n"); 162 return (-1); 163 } 164 if ((mcf->mc43_code & KA43_MC_RESTART) || 165 (mcf->mc43_psl & KA43_PSL_FPDONE)) { 166 printf("ka43_mchk: recovering from machine-check.\n"); 167 ka43_cache_reset(); /* reset caches */ 168 return (0); /* go on; */ 169 } 170 171 /* 172 * Unknown error state, panic/halt the machine! 173 */ 174 printf("ka43_mchk: unknown error state!\n"); 175 return (-1); 176 } 177 178 void 179 ka43_memerr() 180 { 181 /* 182 * Don\'t know what to do here. So just print some messages 183 * and try to go on... 184 */ 185 printf("memory error!\n"); 186 printf("primary cache status: %b\n", mfpr(PR_PCSTS), KA43_PCSTS_BITS); 187 printf("secondary cache status: %b\n", *ka43_creg, KA43_SESR_BITS); 188 } 189 190 int 191 ka43_cache_init() 192 { 193 return (ka43_cache_reset()); 194 } 195 196 #if 0 197 void 198 ka43_clear_errors() 199 { 200 int val = *ka43_creg; 201 val |= KA43_SESR_SERR | KA43_SESR_LERR | KA43_SESR_CERR; 202 *ka43_creg = val; 203 } 204 #endif 205 206 int 207 ka43_cache_reset() 208 { 209 /* 210 * resetting primary and secondary caches is done in three steps: 211 * 1. disable both caches 212 * 2. manually clear secondary cache 213 * 3. enable both caches 214 */ 215 ka43_cache_disable(); 216 ka43_cache_invalidate(); 217 ka43_cache_enable(); 218 219 printf("primary cache status: %b\n", mfpr(PR_PCSTS), KA43_PCSTS_BITS); 220 printf("secondary cache status: %b\n", *ka43_creg, KA43_SESR_BITS); 221 222 return (0); 223 } 224 225 int 226 ka43_cache_disable() 227 { 228 int val; 229 230 /* 231 * first disable primary cache and clear error flags 232 */ 233 mtpr(KA43_PCS_REFRESH, PR_PCSTS); /* disable primary cache */ 234 val = mfpr(PR_PCSTS); 235 mtpr(val, PR_PCSTS); /* clear error flags */ 236 237 /* 238 * now disable secondary cache and clear error flags 239 */ 240 val = *ka43_creg & ~KA43_SESR_CENB; /* BICL !!! */ 241 *ka43_creg = val; /* disable secondary cache */ 242 val = KA43_SESR_SERR | KA43_SESR_LERR | KA43_SESR_CERR; 243 *ka43_creg = val; /* clear error flags */ 244 245 return (0); 246 } 247 248 int 249 ka43_cache_invalidate() 250 { 251 int i, val; 252 253 val = KA43_PCTAG_PARITY; /* clear valid flag, set parity bit */ 254 for (i = 0; i < 256; i++) { /* 256 Quadword entries */ 255 mtpr(i*8, PR_PCIDX); /* write index of tag */ 256 mtpr(val, PR_PCTAG); /* write value into tag */ 257 } 258 val = KA43_PCS_FLUSH | KA43_PCS_REFRESH; 259 mtpr(val, PR_PCSTS); /* flush primary cache */ 260 261 /* 262 * Rigel\'s secondary cache doesn\'t implement a valid-flag. 263 * Thus we initialize all entries with out-of-range/dummy 264 * addresses which will never be referenced (ie. never hit). 265 * After enabling cache we also access 128K of memory starting 266 * at 0x00 so that secondary cache will be filled with these 267 * valid addresses... 268 */ 269 val = 0xff; 270 /* if (memory > 28 MB) val = 0x55; */ 271 for (i = 0; i < KA43_CT2_SIZE; i+= 4) { /* Quadword entries ?? */ 272 ka43_ctag[i/4] = val; /* reset upper and lower */ 273 } 274 275 return (0); 276 } 277 278 279 int 280 ka43_cache_enable() 281 { 282 volatile char *membase = (void*)0x80000000; /* physical 0x00 */ 283 int i, val; 284 285 val = KA43_PCS_FLUSH | KA43_PCS_REFRESH; 286 mtpr(val, PR_PCSTS); /* flush primary cache */ 287 288 /* 289 * now we enable secondary cache and access first 128K of memory 290 * so that secondary cache gets really initialized and holds 291 * valid addresses/data... 292 */ 293 *ka43_creg = KA43_SESR_CENB; /* enable secondary cache */ 294 for (i=0; i<128*1024; i++) { 295 val += membase[i]; /* some dummy operation... */ 296 } 297 298 val = KA43_PCS_ENABLE | KA43_PCS_REFRESH; 299 mtpr(val, PR_PCSTS); /* enable primary cache */ 300 301 return (0); 302 } 303 304 void 305 ka43_conf(parent, self, aux) 306 struct device *parent, *self; 307 void *aux; 308 { 309 extern int clk_adrshift, clk_tweak; 310 311 printf(": KA43\n"); 312 ka43_cpu = (void *)vax_map_physmem(VS_REGS, 1); 313 314 ka43_creg = (void *)vax_map_physmem(KA43_CH2_CREG, 1); 315 ka43_ctag = (void *)vax_map_physmem(KA43_CT2_BASE, 316 (KA43_CT2_SIZE/VAX_NBPG)); 317 318 /* 319 * ka43_conf() gets called with MMU enabled, now it's save to 320 * init/reset the caches. 321 */ 322 ka43_cache_init(); 323 324 clk_adrshift = 1; /* Addressed at long's... */ 325 clk_tweak = 2; /* ...and shift two */ 326 clk_page = (short *)vax_map_physmem(VS_CLOCK, 1); 327 } 328 329 330 /* 331 * The interface for communication with the LANCE ethernet controller 332 * is setup in the xxx_steal_pages() routine. We decrease highest 333 * available address by 64K and use this area as communication buffer. 334 */ 335 336 void 337 ka43_steal_pages() 338 { 339 int val; 340 341 342 /* 343 * if LANCE\'s io-buffer is above 16 MB, then the appropriate flag 344 * in the parity control register has to be set (it works as an 345 * additional address bit). In any case, don\'t enable CPEN and 346 * DPEN in the PARCTL register, somewhow they are internally managed 347 * by the RIGEL chip itself!?! 348 */ 349 val = ka43_cpu->parctl & 0x03; /* read the old value */ 350 ka43_cpu->parctl = val; /* and write new value */ 351 } 352 353 static void 354 ka43_clrf() 355 { 356 struct ka43_clock *clk = (void *)clk_page; 357 358 /* 359 * Clear restart and boot in progress flags in the CPMBX. 360 */ 361 clk->cpmbx = (clk->cpmbx & ~0xf0); 362 } 363 364 static void 365 ka43_halt() 366 { 367 asm("movl $0xc, (%0)"::"r"((int)clk_page + 0x38)); /* Don't ask */ 368 asm("halt"); 369 } 370 371 static void 372 ka43_reboot(arg) 373 int arg; 374 { 375 asm("movl $0xc, (%0)"::"r"((int)clk_page + 0x38)); /* Don't ask */ 376 asm("halt"); 377 } 378 379
Indexes created Wed Sep 24 05:09:52 GMT 2025