ka43.c revision 1.18 1 /* $NetBSD: ka43.c,v 1.18 1999/08/07 10:36:48 ragge Exp $ */
2 /*
3 * Copyright (c) 1996 Ludd, University of Lule}, Sweden.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to Ludd by Bertram Barth.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed at Ludd, University of
19 * Lule}, Sweden and its contributors.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 #include <sys/param.h>
36 #include <sys/types.h>
37 #include <sys/device.h>
38 #include <sys/kernel.h>
39 #include <sys/systm.h>
40
41 #include <vm/vm.h>
42 #include <vm/vm_kern.h>
43
44 #include <machine/pte.h>
45 #include <machine/cpu.h>
46 #include <machine/mtpr.h>
47 #include <machine/sid.h>
48 #include <machine/pmap.h>
49 #include <machine/nexus.h>
50 #include <machine/uvax.h>
51 #include <machine/vsbus.h>
52 #include <machine/ka43.h>
53 #include <machine/clock.h>
54
55 static void ka43_conf __P((void));
56 static void ka43_steal_pages __P((void));
57
58 static int ka43_mchk __P((caddr_t));
59 static void ka43_memerr __P((void));
60 #if 0
61 static void ka43_clear_errors __P((void));
62 #endif
63 static int ka43_cache_init __P((void)); /* "int mapen" as argument? */
64 static int ka43_cache_reset __P((void));
65 static int ka43_cache_enable __P((void));
66 static int ka43_cache_disable __P((void));
67 static int ka43_cache_invalidate __P((void));
68 static void ka43_halt __P((void));
69 static void ka43_reboot __P((int));
70 static void ka43_clrf __P((void));
71
72
73 struct cpu_dep ka43_calls = {
74 ka43_steal_pages,
75 ka43_mchk,
76 ka43_memerr,
77 ka43_conf,
78 chip_clkread,
79 chip_clkwrite,
80 7, /* 7.6 VUP */
81 2, /* SCB pages */
82 ka43_halt,
83 ka43_reboot,
84 ka43_clrf,
85 };
86
87 /*
88 * ka43_steal_pages() is called with MMU disabled, after that call MMU gets
89 * enabled. Thus we initialize these four pointers with physical addresses,
90 * but before leving ka43_steal_pages() we reset them to virtual addresses.
91 */
92 static volatile struct ka43_cpu *ka43_cpu = (void*)KA43_CPU_BASE;
93 extern short *clk_page;
94
95 static volatile u_int *ka43_creg = (void*)KA43_CH2_CREG;
96 static volatile u_int *ka43_ctag = (void*)KA43_CT2_BASE;
97
98 #define KA43_MC_RESTART 0x00008000 /* Restart possible*/
99 #define KA43_PSL_FPDONE 0x00010000 /* First Part Done */
100
101 struct ka43_mcframe { /* Format of RigelMAX machine check frame: */
102 int mc43_bcnt; /* byte count, always 24 (0x18) */
103 int mc43_code; /* machine check type code and restart bit */
104 int mc43_addr; /* most recent (faulting?) virtual address */
105 int mc43_viba; /* contents of VIBA register */
106 int mc43_sisr; /* ICCS bit 6 and SISR bits 15:0 */
107 int mc43_istate; /* internal state */
108 int mc43_sc; /* shift count register */
109 int mc43_pc; /* trapped PC */
110 int mc43_psl; /* trapped PSL */
111 };
112
113 static char *ka43_mctype[] = {
114 "no error (0)", /* Code 0: No error */
115 "FPA: protocol error", /* Code 1-5: FPA errors */
116 "FPA: illegal opcode",
117 "FPA: operand parity error",
118 "FPA: unknown status",
119 "FPA: result parity error",
120 "unused (6)", /* Code 6-7: Unused */
121 "unused (7)",
122 "MMU error (TLB miss)", /* Code 8-9: MMU errors */
123 "MMU error (TLB hit)",
124 "HW interrupt at unused IPL", /* Code 10: Interrupt error */
125 "MOVCx impossible state", /* Code 11-13: Microcode errors */
126 "undefined trap code (i-box)",
127 "undefined control store address",
128 "unused (14)", /* Code 14-15: Unused */
129 "unused (15)",
130 "PC tag or data parity error", /* Code 16: Cache error */
131 "data bus parity error", /* Code 17: Read error */
132 "data bus error (NXM)", /* Code 18: Write error */
133 "undefined data bus state", /* Code 19: Bus error */
134 };
135 #define MC43_MAX 19
136
137 static int ka43_error_count = 0;
138
139 int
140 ka43_mchk(addr)
141 caddr_t addr;
142 {
143 register struct ka43_mcframe *mcf = (void*)addr;
144
145 mtpr(0x00, PR_MCESR); /* Acknowledge the machine check */
146 printf("machine check %d (0x%x)\n", mcf->mc43_code, mcf->mc43_code);
147 printf("reason: %s\n", ka43_mctype[mcf->mc43_code & 0xff]);
148 if (++ka43_error_count > 10) {
149 printf("error_count exceeded: %d\n", ka43_error_count);
150 return (-1);
151 }
152
153 /*
154 * If either the Restart flag is set or the First-Part-Done flag
155 * is set, and the TRAP2 (double error) bit is not set, the the
156 * error is recoverable.
157 */
158 if (mfpr(PR_PCSTS) & KA43_PCS_TRAP2) {
159 printf("TRAP2 (double error) in ka43_mchk.\n");
160 panic("unrecoverable state in ka43_mchk.\n");
161 return (-1);
162 }
163 if ((mcf->mc43_code & KA43_MC_RESTART) ||
164 (mcf->mc43_psl & KA43_PSL_FPDONE)) {
165 printf("ka43_mchk: recovering from machine-check.\n");
166 ka43_cache_reset(); /* reset caches */
167 return (0); /* go on; */
168 }
169
170 /*
171 * Unknown error state, panic/halt the machine!
172 */
173 printf("ka43_mchk: unknown error state!\n");
174 return (-1);
175 }
176
177 void
178 ka43_memerr()
179 {
180 /*
181 * Don\'t know what to do here. So just print some messages
182 * and try to go on...
183 */
184 printf("memory error!\n");
185 printf("primary cache status: %b\n", mfpr(PR_PCSTS), KA43_PCSTS_BITS);
186 printf("secondary cache status: %b\n", *ka43_creg, KA43_SESR_BITS);
187 }
188
189 int
190 ka43_cache_init()
191 {
192 return (ka43_cache_reset());
193 }
194
195 #if 0
196 void
197 ka43_clear_errors()
198 {
199 int val = *ka43_creg;
200 val |= KA43_SESR_SERR | KA43_SESR_LERR | KA43_SESR_CERR;
201 *ka43_creg = val;
202 }
203 #endif
204
205 int
206 ka43_cache_reset()
207 {
208 /*
209 * resetting primary and secondary caches is done in three steps:
210 * 1. disable both caches
211 * 2. manually clear secondary cache
212 * 3. enable both caches
213 */
214 ka43_cache_disable();
215 ka43_cache_invalidate();
216 ka43_cache_enable();
217
218 printf("primary cache status: %b\n", mfpr(PR_PCSTS), KA43_PCSTS_BITS);
219 printf("secondary cache status: %b\n", *ka43_creg, KA43_SESR_BITS);
220
221 return (0);
222 }
223
224 int
225 ka43_cache_disable()
226 {
227 int val;
228
229 /*
230 * first disable primary cache and clear error flags
231 */
232 mtpr(KA43_PCS_REFRESH, PR_PCSTS); /* disable primary cache */
233 val = mfpr(PR_PCSTS);
234 mtpr(val, PR_PCSTS); /* clear error flags */
235
236 /*
237 * now disable secondary cache and clear error flags
238 */
239 val = *ka43_creg & ~KA43_SESR_CENB; /* BICL !!! */
240 *ka43_creg = val; /* disable secondary cache */
241 val = KA43_SESR_SERR | KA43_SESR_LERR | KA43_SESR_CERR;
242 *ka43_creg = val; /* clear error flags */
243
244 return (0);
245 }
246
247 int
248 ka43_cache_invalidate()
249 {
250 int i, val;
251
252 val = KA43_PCTAG_PARITY; /* clear valid flag, set parity bit */
253 for (i = 0; i < 256; i++) { /* 256 Quadword entries */
254 mtpr(i*8, PR_PCIDX); /* write index of tag */
255 mtpr(val, PR_PCTAG); /* write value into tag */
256 }
257 val = KA43_PCS_FLUSH | KA43_PCS_REFRESH;
258 mtpr(val, PR_PCSTS); /* flush primary cache */
259
260 /*
261 * Rigel\'s secondary cache doesn\'t implement a valid-flag.
262 * Thus we initialize all entries with out-of-range/dummy
263 * addresses which will never be referenced (ie. never hit).
264 * After enabling cache we also access 128K of memory starting
265 * at 0x00 so that secondary cache will be filled with these
266 * valid addresses...
267 */
268 val = 0xff;
269 /* if (memory > 28 MB) val = 0x55; */
270 for (i = 0; i < KA43_CT2_SIZE; i+= 4) { /* Quadword entries ?? */
271 ka43_ctag[i/4] = val; /* reset upper and lower */
272 }
273
274 return (0);
275 }
276
277
278 int
279 ka43_cache_enable()
280 {
281 volatile char *membase = (void*)0x80000000; /* physical 0x00 */
282 int i, val;
283
284 val = KA43_PCS_FLUSH | KA43_PCS_REFRESH;
285 mtpr(val, PR_PCSTS); /* flush primary cache */
286
287 /*
288 * now we enable secondary cache and access first 128K of memory
289 * so that secondary cache gets really initialized and holds
290 * valid addresses/data...
291 */
292 *ka43_creg = KA43_SESR_CENB; /* enable secondary cache */
293 for (i=0; i<128*1024; i++) {
294 val += membase[i]; /* some dummy operation... */
295 }
296
297 val = KA43_PCS_ENABLE | KA43_PCS_REFRESH;
298 mtpr(val, PR_PCSTS); /* enable primary cache */
299
300 return (0);
301 }
302
303 void
304 ka43_conf()
305 {
306 extern int clk_adrshift, clk_tweak;
307
308 printf("cpu: KA43\n");
309 ka43_cpu = (void *)vax_map_physmem(VS_REGS, 1);
310
311 ka43_creg = (void *)vax_map_physmem(KA43_CH2_CREG, 1);
312 ka43_ctag = (void *)vax_map_physmem(KA43_CT2_BASE,
313 (KA43_CT2_SIZE/VAX_NBPG));
314
315 /*
316 * ka43_conf() gets called with MMU enabled, now it's save to
317 * init/reset the caches.
318 */
319 ka43_cache_init();
320
321 clk_adrshift = 1; /* Addressed at long's... */
322 clk_tweak = 2; /* ...and shift two */
323 clk_page = (short *)vax_map_physmem(VS_CLOCK, 1);
324 }
325
326
327 /*
328 * The interface for communication with the LANCE ethernet controller
329 * is setup in the xxx_steal_pages() routine. We decrease highest
330 * available address by 64K and use this area as communication buffer.
331 */
332
333 void
334 ka43_steal_pages()
335 {
336 int val;
337
338
339 /*
340 * if LANCE\'s io-buffer is above 16 MB, then the appropriate flag
341 * in the parity control register has to be set (it works as an
342 * additional address bit). In any case, don\'t enable CPEN and
343 * DPEN in the PARCTL register, somewhow they are internally managed
344 * by the RIGEL chip itself!?!
345 */
346 val = ka43_cpu->parctl & 0x03; /* read the old value */
347 ka43_cpu->parctl = val; /* and write new value */
348 }
349
350 static void
351 ka43_clrf()
352 {
353 struct ka43_clock *clk = (void *)clk_page;
354
355 /*
356 * Clear restart and boot in progress flags in the CPMBX.
357 */
358 clk->cpmbx = (clk->cpmbx & ~0xf0);
359 }
360
361 static void
362 ka43_halt()
363 {
364 asm("movl $0xc, (%0)"::"r"((int)clk_page + 0x38)); /* Don't ask */
365 asm("halt");
366 }
367
368 static void
369 ka43_reboot(arg)
370 int arg;
371 {
372 asm("movl $0xc, (%0)"::"r"((int)clk_page + 0x38)); /* Don't ask */
373 asm("halt");
374 }
375
376