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ka43.c revision 1.23
      1 /*	$NetBSD: ka43.c,v 1.23 2000/06/29 07:14:25 mrg Exp $ */
      2 /*
      3  * Copyright (c) 1996 Ludd, University of Lule}, Sweden.
      4  * All rights reserved.
      5  *
      6  * This code is derived from software contributed to Ludd by Bertram Barth.
      7  *
      8  * Redistribution and use in source and binary forms, with or without
      9  * modification, are permitted provided that the following conditions
     10  * are met:
     11  * 1. Redistributions of source code must retain the above copyright
     12  *    notice, this list of conditions and the following disclaimer.
     13  * 2. Redistributions in binary form must reproduce the above copyright
     14  *    notice, this list of conditions and the following disclaimer in the
     15  *    documentation and/or other materials provided with the distribution.
     16  * 3. All advertising materials mentioning features or use of this software
     17  *    must display the following acknowledgement:
     18  *	This product includes software developed at Ludd, University of
     19  *	Lule}, Sweden and its contributors.
     20  * 4. The name of the author may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 #include <sys/param.h>
     36 #include <sys/types.h>
     37 #include <sys/device.h>
     38 #include <sys/kernel.h>
     39 #include <sys/systm.h>
     40 
     41 #include <uvm/uvm_extern.h>
     42 
     43 #include <machine/pte.h>
     44 #include <machine/cpu.h>
     45 #include <machine/mtpr.h>
     46 #include <machine/sid.h>
     47 #include <machine/pmap.h>
     48 #include <machine/nexus.h>
     49 #include <machine/uvax.h>
     50 #include <machine/vsbus.h>
     51 #include <machine/ka43.h>
     52 #include <machine/clock.h>
     53 
     54 static	void ka43_conf __P((void));
     55 static	void ka43_steal_pages __P((void));
     56 
     57 static	int ka43_mchk __P((caddr_t));
     58 static	void ka43_memerr __P((void));
     59 #if 0
     60 static	void ka43_clear_errors __P((void));
     61 #endif
     62 static	int ka43_cache_init __P((void));	/* "int mapen" as argument? */
     63 static	int ka43_cache_reset __P((void));
     64 static	int ka43_cache_enable __P((void));
     65 static	int ka43_cache_disable __P((void));
     66 static	int ka43_cache_invalidate __P((void));
     67 static  void ka43_halt __P((void));
     68 static  void ka43_reboot __P((int));
     69 static  void ka43_clrf __P((void));
     70 
     71 
     72 struct	cpu_dep ka43_calls = {
     73 	ka43_steal_pages,
     74 	ka43_mchk,
     75 	ka43_memerr,
     76 	ka43_conf,
     77 	chip_clkread,
     78 	chip_clkwrite,
     79 	7,	/* 7.6 VUP */
     80 	2,	/* SCB pages */
     81         ka43_halt,
     82         ka43_reboot,
     83         ka43_clrf,
     84 	NULL,
     85 	CPU_RAISEIPL,
     86 };
     87 
     88 /*
     89  * ka43_steal_pages() is called with MMU disabled, after that call MMU gets
     90  * enabled. Thus we initialize these four pointers with physical addresses,
     91  * but before leving ka43_steal_pages() we reset them to virtual addresses.
     92  */
     93 static	volatile struct	ka43_cpu   *ka43_cpu	= (void*)KA43_CPU_BASE;
     94 static	volatile u_int	*ka43_creg = (void*)KA43_CH2_CREG;
     95 static	volatile u_int	*ka43_ctag = (void*)KA43_CT2_BASE;
     96 
     97 #define KA43_MC_RESTART	0x00008000	/* Restart possible*/
     98 #define KA43_PSL_FPDONE	0x00010000	/* First Part Done */
     99 
    100 struct ka43_mcframe {		/* Format of RigelMAX machine check frame: */
    101 	int	mc43_bcnt;	/* byte count, always 24 (0x18) */
    102 	int	mc43_code;	/* machine check type code and restart bit */
    103 	int	mc43_addr;	/* most recent (faulting?) virtual address */
    104 	int	mc43_viba;	/* contents of VIBA register */
    105 	int	mc43_sisr;	/* ICCS bit 6 and SISR bits 15:0 */
    106 	int	mc43_istate;	/* internal state */
    107 	int	mc43_sc;	/* shift count register */
    108 	int	mc43_pc;	/* trapped PC */
    109 	int	mc43_psl;	/* trapped PSL */
    110 };
    111 
    112 static char *ka43_mctype[] = {
    113 	"no error (0)",			/* Code 0: No error */
    114 	"FPA: protocol error",		/* Code 1-5: FPA errors */
    115 	"FPA: illegal opcode",
    116 	"FPA: operand parity error",
    117 	"FPA: unknown status",
    118 	"FPA: result parity error",
    119 	"unused (6)",			/* Code 6-7: Unused */
    120 	"unused (7)",
    121 	"MMU error (TLB miss)",		/* Code 8-9: MMU errors */
    122 	"MMU error (TLB hit)",
    123 	"HW interrupt at unused IPL",	/* Code 10: Interrupt error */
    124 	"MOVCx impossible state",	/* Code 11-13: Microcode errors */
    125 	"undefined trap code (i-box)",
    126 	"undefined control store address",
    127 	"unused (14)",			/* Code 14-15: Unused */
    128 	"unused (15)",
    129 	"PC tag or data parity error",	/* Code 16: Cache error */
    130 	"data bus parity error",	/* Code 17: Read error */
    131 	"data bus error (NXM)",		/* Code 18: Write error */
    132 	"undefined data bus state",	/* Code 19: Bus error */
    133 };
    134 #define MC43_MAX	19
    135 
    136 static int ka43_error_count = 0;
    137 
    138 int
    139 ka43_mchk(addr)
    140 	caddr_t addr;
    141 {
    142 	register struct ka43_mcframe *mcf = (void*)addr;
    143 
    144 	mtpr(0x00, PR_MCESR);	/* Acknowledge the machine check */
    145 	printf("machine check %d (0x%x)\n", mcf->mc43_code, mcf->mc43_code);
    146 	printf("reason: %s\n", ka43_mctype[mcf->mc43_code & 0xff]);
    147 	if (++ka43_error_count > 10) {
    148 		printf("error_count exceeded: %d\n", ka43_error_count);
    149 		return (-1);
    150 	}
    151 
    152 	/*
    153 	 * If either the Restart flag is set or the First-Part-Done flag
    154 	 * is set, and the TRAP2 (double error) bit is not set, then the
    155 	 * error is recoverable.
    156 	 */
    157 	if (mfpr(PR_PCSTS) & KA43_PCS_TRAP2) {
    158 		printf("TRAP2 (double error) in ka43_mchk.\n");
    159 		panic("unrecoverable state in ka43_mchk.\n");
    160 		return (-1);
    161 	}
    162 	if ((mcf->mc43_code & KA43_MC_RESTART) ||
    163 	    (mcf->mc43_psl & KA43_PSL_FPDONE)) {
    164 		printf("ka43_mchk: recovering from machine-check.\n");
    165 		ka43_cache_reset();	/* reset caches */
    166 		return (0);		/* go on; */
    167 	}
    168 
    169 	/*
    170 	 * Unknown error state, panic/halt the machine!
    171 	 */
    172 	printf("ka43_mchk: unknown error state!\n");
    173 	return (-1);
    174 }
    175 
    176 void
    177 ka43_memerr()
    178 {
    179 	/*
    180 	 * Don\'t know what to do here. So just print some messages
    181 	 * and try to go on...
    182 	 */
    183 	printf("memory error!\n");
    184 	printf("primary cache status: %b\n", mfpr(PR_PCSTS), KA43_PCSTS_BITS);
    185 	printf("secondary cache status: %b\n", *ka43_creg, KA43_SESR_BITS);
    186 }
    187 
    188 int
    189 ka43_cache_init()
    190 {
    191 	return (ka43_cache_reset());
    192 }
    193 
    194 #if 0
    195 void
    196 ka43_clear_errors()
    197 {
    198 	int val = *ka43_creg;
    199 	val |= KA43_SESR_SERR | KA43_SESR_LERR | KA43_SESR_CERR;
    200 	*ka43_creg = val;
    201 }
    202 #endif
    203 
    204 int
    205 ka43_cache_reset()
    206 {
    207 	/*
    208 	 * resetting primary and secondary caches is done in three steps:
    209 	 *	1. disable both caches
    210 	 *	2. manually clear secondary cache
    211 	 *	3. enable both caches
    212 	 */
    213 	ka43_cache_disable();
    214 	ka43_cache_invalidate();
    215 	ka43_cache_enable();
    216 
    217 	printf("primary cache status: %b\n", mfpr(PR_PCSTS), KA43_PCSTS_BITS);
    218 	printf("secondary cache status: %b\n", *ka43_creg, KA43_SESR_BITS);
    219 
    220 	return (0);
    221 }
    222 
    223 int
    224 ka43_cache_disable()
    225 {
    226 	int val;
    227 
    228 	/*
    229 	 * first disable primary cache and clear error flags
    230 	 */
    231 	mtpr(KA43_PCS_REFRESH, PR_PCSTS);	/* disable primary cache */
    232 	val = mfpr(PR_PCSTS);
    233 	mtpr(val, PR_PCSTS);			/* clear error flags */
    234 
    235 	/*
    236 	 * now disable secondary cache and clear error flags
    237 	 */
    238 	val = *ka43_creg & ~KA43_SESR_CENB;	/* BICL !!! */
    239 	*ka43_creg = val;			/* disable secondary cache */
    240 	val = KA43_SESR_SERR | KA43_SESR_LERR | KA43_SESR_CERR;
    241 	*ka43_creg = val;			/* clear error flags */
    242 
    243 	return (0);
    244 }
    245 
    246 int
    247 ka43_cache_invalidate()
    248 {
    249 	int i, val;
    250 
    251 	val = KA43_PCTAG_PARITY;	/* clear valid flag, set parity bit */
    252 	for (i = 0; i < 256; i++) {	/* 256 Quadword entries */
    253 		mtpr(i*8, PR_PCIDX);	/* write index of tag */
    254 		mtpr(val, PR_PCTAG);	/* write value into tag */
    255 	}
    256 	val = KA43_PCS_FLUSH | KA43_PCS_REFRESH;
    257 	mtpr(val, PR_PCSTS);		/* flush primary cache */
    258 
    259 	/*
    260 	 * Rigel\'s secondary cache doesn\'t implement a valid-flag.
    261 	 * Thus we initialize all entries with out-of-range/dummy
    262 	 * addresses which will never be referenced (ie. never hit).
    263 	 * After enabling cache we also access 128K of memory starting
    264 	 * at 0x00 so that secondary cache will be filled with these
    265 	 * valid addresses...
    266 	 */
    267 	val = 0xff;
    268 	/* if (memory > 28 MB) val = 0x55; */
    269 	for (i = 0; i < KA43_CT2_SIZE; i+= 4) {	/* Quadword entries ?? */
    270 		ka43_ctag[i/4] = val;		/* reset upper and lower */
    271 	}
    272 
    273 	return (0);
    274 }
    275 
    276 
    277 int
    278 ka43_cache_enable()
    279 {
    280 	volatile char *membase = (void*)0x80000000;	/* physical 0x00 */
    281 	int i, val;
    282 
    283 	val = KA43_PCS_FLUSH | KA43_PCS_REFRESH;
    284 	mtpr(val, PR_PCSTS);		/* flush primary cache */
    285 
    286 	/*
    287 	 * now we enable secondary cache and access first 128K of memory
    288 	 * so that secondary cache gets really initialized and holds
    289 	 * valid addresses/data...
    290 	 */
    291 	*ka43_creg = KA43_SESR_CENB;	/* enable secondary cache */
    292 	for (i=0; i<128*1024; i++) {
    293 		val += membase[i];	/* some dummy operation... */
    294 	}
    295 
    296 	val = KA43_PCS_ENABLE | KA43_PCS_REFRESH;
    297 	mtpr(val, PR_PCSTS);		/* enable primary cache */
    298 
    299 	return (0);
    300 }
    301 
    302 void
    303 ka43_conf()
    304 {
    305 	printf("cpu: KA43\n");
    306 	ka43_cpu = (void *)vax_map_physmem(VS_REGS, 1);
    307 
    308 	ka43_creg = (void *)vax_map_physmem(KA43_CH2_CREG, 1);
    309 	ka43_ctag = (void *)vax_map_physmem(KA43_CT2_BASE,
    310 	    (KA43_CT2_SIZE/VAX_NBPG));
    311 
    312 	/*
    313 	 * ka43_conf() gets called with MMU enabled, now it's save to
    314 	 * init/reset the caches.
    315 	 */
    316 	ka43_cache_init();
    317 
    318         clk_adrshift = 1;       /* Addressed at long's... */
    319         clk_tweak = 2;          /* ...and shift two */
    320 	clk_page = (short *)vax_map_physmem(VS_CLOCK, 1);
    321 }
    322 
    323 
    324 /*
    325  * The interface for communication with the LANCE ethernet controller
    326  * is setup in the xxx_steal_pages() routine. We decrease highest
    327  * available address by 64K and use this area as communication buffer.
    328  */
    329 
    330 void
    331 ka43_steal_pages()
    332 {
    333 	int	val;
    334 
    335 
    336 	/*
    337 	 * if LANCE\'s io-buffer is above 16 MB, then the appropriate flag
    338 	 * in the parity control register has to be set (it works as an
    339 	 * additional address bit). In any case, don\'t enable CPEN and
    340 	 * DPEN in the PARCTL register, somewhow they are internally managed
    341 	 * by the RIGEL chip itself!?!
    342 	 */
    343 	val = ka43_cpu->parctl & 0x03;	/* read the old value */
    344 	ka43_cpu->parctl = val;		/* and write new value */
    345 }
    346 
    347 static void
    348 ka43_clrf()
    349 {
    350         struct ka43_clock *clk = (void *)clk_page;
    351 
    352         /*
    353          * Clear restart and boot in progress flags in the CPMBX.
    354          */
    355         clk->cpmbx = (clk->cpmbx & ~0xf0);
    356 }
    357 
    358 static void
    359 ka43_halt()
    360 {
    361         asm("movl $0xc, (%0)"::"r"((int)clk_page + 0x38)); /* Don't ask */
    362         asm("halt");
    363 }
    364 
    365 static void
    366 ka43_reboot(arg)
    367         int arg;
    368 {
    369         asm("movl $0xc, (%0)"::"r"((int)clk_page + 0x38)); /* Don't ask */
    370         asm("halt");
    371 }
    372 
    373