1 /* $NetBSD: bus_dma.h,v 1.1 2024/01/02 07:41:00 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Carnegie-Mellon University. 35 * All rights reserved. 36 * 37 * Author: Chris G. Demetriou 38 * 39 * Permission to use, copy, modify and distribute this software and 40 * its documentation is hereby granted, provided that both the copyright 41 * notice and this permission notice appear in all copies of the 42 * software, derivative works or modified versions, and any portions 43 * thereof, and that both notices appear in supporting documentation. 44 * 45 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 46 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 47 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 48 * 49 * Carnegie Mellon requests users of this software to return to 50 * 51 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 52 * School of Computer Science 53 * Carnegie Mellon University 54 * Pittsburgh PA 15213-3890 55 * 56 * any improvements or extensions that they make and grant Carnegie the 57 * rights to redistribute these changes. 58 */ 59 60 #ifndef _VIRT68K_BUS_DMA_H_ 61 #define _VIRT68K_BUS_DMA_H_ 62 63 /* 64 * Bus DMA methods. 65 */ 66 67 /* 68 * Flags used in various bus DMA methods. 69 */ 70 #define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */ 71 #define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */ 72 #define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */ 73 #define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */ 74 #define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */ 75 #define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */ 76 #define BUS_DMA_BUS2 0x020 77 #define BUS_DMA_BUS3 0x040 78 #define BUS_DMA_BUS4 0x080 79 #define BUS_DMA_READ 0x100 /* mapping is device -> memory only */ 80 #define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */ 81 #define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */ 82 83 /* 84 * Flags to constrain the physical memory allocated for DMA 85 */ 86 #define BUS_DMA_ONBOARD_RAM BUS_DMA_BUS1 87 #define BUS_DMA_24BIT BUS_DMA_BUS2 88 89 /* Forwards needed by prototypes below. */ 90 struct mbuf; 91 struct uio; 92 93 /* 94 * Operations performed by bus_dmamap_sync(). 95 */ 96 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 97 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 98 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 99 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 100 101 typedef struct virt68k_bus_dma_tag *bus_dma_tag_t; 102 typedef struct virt68k_bus_dmamap *bus_dmamap_t; 103 104 /* 105 * bus_dma_segment_t 106 * 107 * Describes a single contiguous DMA transaction. Values 108 * are suitable for programming into DMA registers. 109 */ 110 struct virt68k_bus_dma_segment { 111 bus_addr_t ds_addr; /* DMA address */ 112 bus_size_t ds_len; /* length of transfer */ 113 114 /* PRIVATE */ 115 bus_addr_t _ds_cpuaddr; /* CPU-relative phys addr of segment */ 116 int _ds_flags; 117 }; 118 typedef struct virt68k_bus_dma_segment bus_dma_segment_t; 119 120 /* 121 * bus_dma_tag_t 122 * 123 * A machine-dependent opaque type describing the implementation of 124 * DMA for a given bus. 125 */ 126 struct virt68k_bus_dma_tag { 127 void *_cookie; /* cookie used in the guts */ 128 129 /* 130 * DMA mapping methods. 131 */ 132 int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int, 133 bus_size_t, bus_size_t, int, bus_dmamap_t *); 134 void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t); 135 int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *, 136 bus_size_t, struct proc *, int); 137 int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t, 138 struct mbuf *, int); 139 int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t, 140 struct uio *, int); 141 int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t, 142 bus_dma_segment_t *, int, bus_size_t, int); 143 void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t); 144 void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t, 145 bus_addr_t, bus_size_t, int); 146 147 /* 148 * DMA memory utility functions. 149 */ 150 int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t, 151 bus_size_t, bus_dma_segment_t *, int, int *, int); 152 void (*_dmamem_free)(bus_dma_tag_t, 153 bus_dma_segment_t *, int); 154 int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *, 155 int, size_t, void **, int); 156 void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t); 157 paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *, 158 int, off_t, int, int); 159 }; 160 161 #define bus_dmamap_create(t, s, n, m, b, f, p) \ 162 (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p)) 163 #define bus_dmamap_destroy(t, p) \ 164 (*(t)->_dmamap_destroy)((t), (p)) 165 #define bus_dmamap_load(t, m, b, s, p, f) \ 166 (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f)) 167 #define bus_dmamap_load_mbuf(t, m, b, f) \ 168 (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f)) 169 #define bus_dmamap_load_uio(t, m, u, f) \ 170 (*(t)->_dmamap_load_uio)((t), (m), (u), (f)) 171 #define bus_dmamap_load_raw(t, m, sg, n, s, f) \ 172 (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f)) 173 #define bus_dmamap_unload(t, p) \ 174 (*(t)->_dmamap_unload)((t), (p)) 175 #define bus_dmamap_sync(t, p, o, l, ops) \ 176 (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops)) 177 #define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \ 178 (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f)) 179 #define bus_dmamem_free(t, sg, n) \ 180 (*(t)->_dmamem_free)((t), (sg), (n)) 181 #define bus_dmamem_map(t, sg, n, s, k, f) \ 182 (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f)) 183 #define bus_dmamem_unmap(t, k, s) \ 184 (*(t)->_dmamem_unmap)((t), (k), (s)) 185 #define bus_dmamem_mmap(t, sg, n, o, p, f) \ 186 (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f)) 187 188 /* 189 * bus_dmamap_t 190 * 191 * Describes a DMA mapping. 192 */ 193 struct virt68k_bus_dmamap { 194 /* 195 * PRIVATE MEMBERS: not for use by machine-independent code. 196 */ 197 bus_size_t _dm_size; /* largest DMA transfer mappable */ 198 int _dm_segcnt; /* number of segs this map can map */ 199 bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */ 200 bus_size_t _dm_boundary; /* don't cross this */ 201 int _dm_flags; /* misc. flags */ 202 void *_dm_cookie; /* Bus-specific cookie */ 203 204 /* 205 * PUBLIC MEMBERS: these are used by machine-independent code. 206 */ 207 bus_size_t dm_maxsegsz; /* largest possible segment */ 208 bus_size_t dm_mapsize; /* size of the mapping */ 209 int dm_nsegs; /* # valid segments in mapping */ 210 bus_dma_segment_t dm_segs[1]; /* segments; variable length */ 211 }; 212 213 #ifdef _VIRT68K_BUS_DMA_PRIVATE 214 int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t, 215 bus_size_t, int, bus_dmamap_t *); 216 void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t); 217 218 int _bus_dmamap_load_direct(bus_dma_tag_t, bus_dmamap_t, 219 void *, bus_size_t, struct proc *, int); 220 int _bus_dmamap_load_mbuf_direct(bus_dma_tag_t, 221 bus_dmamap_t, struct mbuf *, int); 222 int _bus_dmamap_load_uio_direct(bus_dma_tag_t, 223 bus_dmamap_t, struct uio *, int); 224 int _bus_dmamap_load_raw_direct(bus_dma_tag_t, 225 bus_dmamap_t, bus_dma_segment_t *, int, bus_size_t, int); 226 void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t); 227 void _bus_dmamap_sync_030(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 228 bus_size_t, int); 229 void _bus_dmamap_sync_0460(bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 230 bus_size_t, int); 231 int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size, 232 bus_size_t alignment, bus_size_t boundary, 233 bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags); 234 void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs, 235 int nsegs); 236 int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs, 237 int nsegs, size_t size, void **kvap, int flags); 238 void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva, size_t size); 239 paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs, 240 int nsegs, off_t off, int prot, int flags); 241 #endif /* _VIRT68K_BUS_DMA_PRIVATE */ 242 243 /* Needed by mvmebus.c */ 244 int _bus_dmamem_alloc_common(bus_dma_tag_t, 245 bus_addr_t, bus_addr_t, bus_size_t, bus_size_t, bus_size_t, 246 bus_dma_segment_t *, int, int *, int); 247 248 #endif /* _VIRT68K_BUS_DMA_H_ */ 249
Indexes created Sat Sep 20 22:09:52 GMT 2025