intio.c revision 1.1.2.7 1 1.1.2.7 minoura /* $NetBSD: intio.c,v 1.1.2.7 1999/03/12 15:13:37 minoura Exp $ */
2 1.1.2.1 minoura
3 1.1.2.1 minoura /*
4 1.1.2.1 minoura *
5 1.1.2.1 minoura * Copyright (c) 1998 NetBSD Foundation, Inc.
6 1.1.2.1 minoura * All rights reserved.
7 1.1.2.1 minoura *
8 1.1.2.1 minoura * Redistribution and use in source and binary forms, with or without
9 1.1.2.1 minoura * modification, are permitted provided that the following conditions
10 1.1.2.1 minoura * are met:
11 1.1.2.1 minoura * 1. Redistributions of source code must retain the above copyright
12 1.1.2.1 minoura * notice, this list of conditions and the following disclaimer.
13 1.1.2.1 minoura * 2. Redistributions in binary form must reproduce the above copyright
14 1.1.2.1 minoura * notice, this list of conditions and the following disclaimer in the
15 1.1.2.1 minoura * documentation and/or other materials provided with the distribution.
16 1.1.2.1 minoura * 3. All advertising materials mentioning features or use of this software
17 1.1.2.1 minoura * must display the following acknowledgement:
18 1.1.2.1 minoura * This product includes software developed by Charles D. Cranor and
19 1.1.2.1 minoura * Washington University.
20 1.1.2.1 minoura * 4. The name of the author may not be used to endorse or promote products
21 1.1.2.1 minoura * derived from this software without specific prior written permission.
22 1.1.2.1 minoura *
23 1.1.2.1 minoura * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 1.1.2.1 minoura * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.1.2.1 minoura * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.1.2.1 minoura * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 1.1.2.1 minoura * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 1.1.2.1 minoura * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 1.1.2.1 minoura * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 1.1.2.1 minoura * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 1.1.2.1 minoura * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 1.1.2.1 minoura * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.1.2.1 minoura */
34 1.1.2.1 minoura
35 1.1.2.1 minoura /*
36 1.1.2.1 minoura * NetBSD/x68k internal I/O virtual bus.
37 1.1.2.1 minoura */
38 1.1.2.1 minoura
39 1.1.2.1 minoura #include <sys/param.h>
40 1.1.2.1 minoura #include <sys/systm.h>
41 1.1.2.1 minoura #include <sys/device.h>
42 1.1.2.1 minoura #include <sys/malloc.h>
43 1.1.2.3 minoura #include <sys/mbuf.h>
44 1.1.2.1 minoura #include <sys/extent.h>
45 1.1.2.3 minoura #include <vm/vm.h>
46 1.1.2.1 minoura
47 1.1.2.1 minoura #include <machine/bus.h>
48 1.1.2.1 minoura #include <machine/cpu.h>
49 1.1.2.1 minoura #include <machine/frame.h>
50 1.1.2.1 minoura
51 1.1.2.1 minoura #include <arch/x68k/dev/intiovar.h>
52 1.1.2.1 minoura #include <arch/x68k/dev/mfp.h>
53 1.1.2.1 minoura
54 1.1.2.1 minoura
55 1.1.2.1 minoura /*
56 1.1.2.1 minoura * bus_space(9) interface
57 1.1.2.1 minoura */
58 1.1.2.1 minoura static int intio_bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *));
59 1.1.2.1 minoura static void intio_bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
60 1.1.2.1 minoura static int intio_bus_space_subregion __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *));
61 1.1.2.1 minoura
62 1.1.2.1 minoura static struct x68k_bus_space intio_bus = {
63 1.1.2.1 minoura #if 0
64 1.1.2.1 minoura X68K_INTIO_BUS,
65 1.1.2.1 minoura #endif
66 1.1.2.1 minoura intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
67 1.1.2.1 minoura x68k_bus_space_alloc, x68k_bus_space_free,
68 1.1.2.1 minoura #if 0
69 1.1.2.1 minoura x68k_bus_space_barrier,
70 1.1.2.1 minoura #endif
71 1.1.2.1 minoura x68k_bus_space_read_1, x68k_bus_space_read_2, x68k_bus_space_read_4,
72 1.1.2.1 minoura x68k_bus_space_read_multi_1, x68k_bus_space_read_multi_2,
73 1.1.2.1 minoura x68k_bus_space_read_multi_4,
74 1.1.2.1 minoura x68k_bus_space_read_region_1, x68k_bus_space_read_region_2,
75 1.1.2.1 minoura x68k_bus_space_read_region_4,
76 1.1.2.1 minoura
77 1.1.2.1 minoura x68k_bus_space_write_1, x68k_bus_space_write_2, x68k_bus_space_write_4,
78 1.1.2.1 minoura x68k_bus_space_write_multi_1, x68k_bus_space_write_multi_2,
79 1.1.2.1 minoura x68k_bus_space_write_multi_4,
80 1.1.2.1 minoura x68k_bus_space_write_region_1, x68k_bus_space_write_region_2,
81 1.1.2.1 minoura x68k_bus_space_write_region_4,
82 1.1.2.1 minoura
83 1.1.2.1 minoura x68k_bus_space_set_region_1, x68k_bus_space_set_region_2,
84 1.1.2.1 minoura x68k_bus_space_set_region_4,
85 1.1.2.1 minoura x68k_bus_space_copy_region_1, x68k_bus_space_copy_region_2,
86 1.1.2.1 minoura x68k_bus_space_copy_region_4,
87 1.1.2.1 minoura
88 1.1.2.1 minoura 0
89 1.1.2.1 minoura };
90 1.1.2.1 minoura
91 1.1.2.3 minoura /*
92 1.1.2.3 minoura * bus_dma(9) interface
93 1.1.2.3 minoura */
94 1.1.2.3 minoura #define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
95 1.1.2.3 minoura int _intio_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int,
96 1.1.2.3 minoura bus_size_t, bus_size_t, int, bus_dmamap_t *));
97 1.1.2.3 minoura void _intio_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
98 1.1.2.3 minoura int _intio_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
99 1.1.2.3 minoura bus_size_t, struct proc *, int));
100 1.1.2.3 minoura int _intio_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
101 1.1.2.3 minoura struct mbuf *, int));
102 1.1.2.3 minoura int _intio_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
103 1.1.2.3 minoura struct uio *, int));
104 1.1.2.3 minoura int _intio_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
105 1.1.2.3 minoura bus_dma_segment_t *, int, bus_size_t, int));
106 1.1.2.3 minoura void _intio_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
107 1.1.2.3 minoura void _intio_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
108 1.1.2.3 minoura bus_addr_t, bus_size_t, int));
109 1.1.2.3 minoura
110 1.1.2.3 minoura int _intio_bus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
111 1.1.2.3 minoura bus_size_t, bus_dma_segment_t *, int, int *, int));
112 1.1.2.3 minoura
113 1.1.2.3 minoura int _intio_dma_alloc_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t,
114 1.1.2.3 minoura bus_size_t, int));
115 1.1.2.3 minoura void _intio_dma_free_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t));
116 1.1.2.3 minoura
117 1.1.2.3 minoura struct x68k_bus_dma intio_bus_dma = {
118 1.1.2.3 minoura INTIO_DMA_BOUNCE_THRESHOLD,
119 1.1.2.3 minoura _intio_bus_dmamap_create,
120 1.1.2.3 minoura _intio_bus_dmamap_destroy,
121 1.1.2.3 minoura _intio_bus_dmamap_load,
122 1.1.2.3 minoura _intio_bus_dmamap_load_mbuf,
123 1.1.2.3 minoura _intio_bus_dmamap_load_uio,
124 1.1.2.3 minoura _intio_bus_dmamap_load_raw,
125 1.1.2.3 minoura _intio_bus_dmamap_unload,
126 1.1.2.3 minoura _intio_bus_dmamap_sync,
127 1.1.2.3 minoura _intio_bus_dmamem_alloc,
128 1.1.2.3 minoura x68k_bus_dmamem_free,
129 1.1.2.3 minoura x68k_bus_dmamem_map,
130 1.1.2.3 minoura x68k_bus_dmamem_unmap,
131 1.1.2.3 minoura x68k_bus_dmamem_mmap,
132 1.1.2.3 minoura };
133 1.1.2.1 minoura
134 1.1.2.1 minoura /*
135 1.1.2.1 minoura * autoconf stuff
136 1.1.2.1 minoura */
137 1.1.2.1 minoura static int intio_match __P((struct device *, struct cfdata *, void *));
138 1.1.2.1 minoura static void intio_attach __P((struct device *, struct device *, void *));
139 1.1.2.1 minoura static int intio_search __P((struct device *, struct cfdata *cf, void *));
140 1.1.2.1 minoura static int intio_print __P((void *, const char *));
141 1.1.2.1 minoura static void intio_alloc_system_ports __P((struct intio_softc*));
142 1.1.2.1 minoura
143 1.1.2.1 minoura struct cfattach intio_ca = {
144 1.1.2.1 minoura sizeof(struct intio_softc), intio_match, intio_attach
145 1.1.2.1 minoura };
146 1.1.2.1 minoura
147 1.1.2.1 minoura static struct intio_interrupt_vector {
148 1.1.2.1 minoura intio_intr_handler_t iiv_handler;
149 1.1.2.1 minoura void *iiv_arg;
150 1.1.2.7 minoura int iiv_intrcntoff;
151 1.1.2.1 minoura } iiv[256] = {0,};
152 1.1.2.1 minoura
153 1.1.2.1 minoura extern struct cfdriver intio_cd;
154 1.1.2.1 minoura
155 1.1.2.1 minoura /* used in console initialization */
156 1.1.2.1 minoura extern int x68k_realconfig;
157 1.1.2.1 minoura int x68k_config_found __P((struct cfdata *, struct device *,
158 1.1.2.1 minoura void *, cfprint_t));
159 1.1.2.1 minoura static struct cfdata *cfdata_intiobus = NULL;
160 1.1.2.1 minoura
161 1.1.2.7 minoura /* other static functions */
162 1.1.2.7 minoura static int scan_intrnames __P((const char *));
163 1.1.2.7 minoura
164 1.1.2.1 minoura static int
165 1.1.2.1 minoura intio_match(parent, cf, aux)
166 1.1.2.1 minoura struct device *parent;
167 1.1.2.1 minoura struct cfdata *cf;
168 1.1.2.1 minoura void *aux; /* NULL */
169 1.1.2.1 minoura {
170 1.1.2.1 minoura if (strcmp(aux, intio_cd.cd_name) != 0)
171 1.1.2.1 minoura return (0);
172 1.1.2.1 minoura if (cf->cf_unit != 0)
173 1.1.2.1 minoura return (0);
174 1.1.2.1 minoura if (x68k_realconfig == 0)
175 1.1.2.1 minoura cfdata_intiobus = cf; /* XXX */
176 1.1.2.1 minoura
177 1.1.2.1 minoura return (1);
178 1.1.2.1 minoura }
179 1.1.2.1 minoura
180 1.1.2.1 minoura
181 1.1.2.1 minoura /* used in console initialization: configure only MFP */
182 1.1.2.1 minoura static struct intio_attach_args initial_ia = {
183 1.1.2.1 minoura &intio_bus,
184 1.1.2.1 minoura 0/*XXX*/,
185 1.1.2.1 minoura
186 1.1.2.2 minoura "mfp", /* ia_name */
187 1.1.2.1 minoura MFP_ADDR, /* ia_addr */
188 1.1.2.1 minoura MFP_INTR, /* ia_intr */
189 1.1.2.1 minoura -1 /* ia_dma */
190 1.1.2.4 minoura -1, /* ia_dmaintr */
191 1.1.2.1 minoura };
192 1.1.2.1 minoura
193 1.1.2.1 minoura static void
194 1.1.2.1 minoura intio_attach(parent, self, aux)
195 1.1.2.1 minoura struct device *parent, *self;
196 1.1.2.1 minoura void *aux; /* NULL */
197 1.1.2.1 minoura {
198 1.1.2.1 minoura struct intio_softc *sc = (struct intio_softc *)self;
199 1.1.2.1 minoura struct intio_attach_args ia;
200 1.1.2.1 minoura
201 1.1.2.1 minoura if (self == NULL) {
202 1.1.2.1 minoura /* console only init */
203 1.1.2.1 minoura x68k_config_found(cfdata_intiobus, NULL, &initial_ia, NULL);
204 1.1.2.1 minoura return;
205 1.1.2.1 minoura }
206 1.1.2.1 minoura
207 1.1.2.3 minoura printf (" mapped at %08p\n", intiobase);
208 1.1.2.1 minoura
209 1.1.2.1 minoura sc->sc_map = extent_create("intiomap",
210 1.1.2.1 minoura PHYS_INTIODEV,
211 1.1.2.1 minoura PHYS_INTIODEV + 0x400000,
212 1.1.2.1 minoura M_DEVBUF, NULL, NULL, EX_NOWAIT);
213 1.1.2.1 minoura intio_alloc_system_ports (sc);
214 1.1.2.1 minoura
215 1.1.2.1 minoura sc->sc_bst = &intio_bus;
216 1.1.2.1 minoura sc->sc_bst->x68k_bus_device = self;
217 1.1.2.3 minoura sc->sc_dmat = &intio_bus_dma;
218 1.1.2.3 minoura sc->sc_dmac = 0;
219 1.1.2.3 minoura
220 1.1.2.1 minoura bzero(iiv, sizeof (struct intio_interrupt_vector) * 256);
221 1.1.2.1 minoura
222 1.1.2.1 minoura ia.ia_bst = sc->sc_bst;
223 1.1.2.1 minoura ia.ia_dmat = sc->sc_dmat;
224 1.1.2.1 minoura
225 1.1.2.1 minoura config_search (intio_search, self, &ia);
226 1.1.2.1 minoura }
227 1.1.2.1 minoura
228 1.1.2.1 minoura static int
229 1.1.2.1 minoura intio_search(parent, cf, aux)
230 1.1.2.1 minoura struct device *parent;
231 1.1.2.1 minoura struct cfdata *cf;
232 1.1.2.1 minoura void *aux;
233 1.1.2.1 minoura {
234 1.1.2.1 minoura struct intio_attach_args *ia = aux;
235 1.1.2.1 minoura struct intio_softc *sc = (struct intio_softc *)parent;
236 1.1.2.1 minoura
237 1.1.2.1 minoura ia->ia_bst = sc->sc_bst;
238 1.1.2.1 minoura ia->ia_dmat = sc->sc_dmat;
239 1.1.2.2 minoura ia->ia_name = cf->cf_driver->cd_name;
240 1.1.2.1 minoura ia->ia_addr = cf->cf_addr;
241 1.1.2.1 minoura ia->ia_intr = cf->cf_intr;
242 1.1.2.1 minoura ia->ia_dma = cf->cf_dma;
243 1.1.2.4 minoura ia->ia_dmaintr = cf->cf_dmaintr;
244 1.1.2.1 minoura
245 1.1.2.1 minoura if ((*cf->cf_attach->ca_match)(parent, cf, ia) > 0)
246 1.1.2.1 minoura config_attach(parent, cf, ia, intio_print);
247 1.1.2.1 minoura
248 1.1.2.1 minoura return (0);
249 1.1.2.1 minoura }
250 1.1.2.1 minoura
251 1.1.2.1 minoura static int
252 1.1.2.1 minoura intio_print(aux, name)
253 1.1.2.1 minoura void *aux;
254 1.1.2.1 minoura const char *name;
255 1.1.2.1 minoura {
256 1.1.2.1 minoura struct intio_attach_args *ia = aux;
257 1.1.2.1 minoura
258 1.1.2.1 minoura /* if (ia->ia_addr > 0) */
259 1.1.2.1 minoura printf (" addr 0x%06x", ia->ia_addr);
260 1.1.2.4 minoura if (ia->ia_intr > 0)
261 1.1.2.5 minoura printf (" intr 0x%02x", ia->ia_intr);
262 1.1.2.4 minoura if (ia->ia_dma >= 0) {
263 1.1.2.1 minoura printf (" using DMA ch%d", ia->ia_dma);
264 1.1.2.4 minoura if (ia->ia_dmaintr > 0)
265 1.1.2.5 minoura printf (" intr 0x%02x and 0x%02x",
266 1.1.2.4 minoura ia->ia_dmaintr, ia->ia_dmaintr+1);
267 1.1.2.4 minoura }
268 1.1.2.1 minoura
269 1.1.2.1 minoura return (QUIET);
270 1.1.2.1 minoura }
271 1.1.2.1 minoura
272 1.1.2.1 minoura /*
273 1.1.2.1 minoura * intio memory map manager
274 1.1.2.1 minoura */
275 1.1.2.1 minoura
276 1.1.2.1 minoura int
277 1.1.2.1 minoura intio_map_allocate_region(parent, ia, flag)
278 1.1.2.1 minoura struct device *parent;
279 1.1.2.1 minoura struct intio_attach_args *ia;
280 1.1.2.1 minoura enum intio_map_flag flag; /* INTIO_MAP_TESTONLY or INTIO_MAP_ALLOCATE */
281 1.1.2.1 minoura {
282 1.1.2.1 minoura struct intio_softc *sc = (struct intio_softc*) parent;
283 1.1.2.1 minoura struct extent *map = sc->sc_map;
284 1.1.2.1 minoura int r;
285 1.1.2.1 minoura
286 1.1.2.1 minoura r = extent_alloc_region (map, ia->ia_addr, ia->ia_size, 0);
287 1.1.2.1 minoura #ifdef DEBUG
288 1.1.2.1 minoura extent_print (map);
289 1.1.2.1 minoura #endif
290 1.1.2.1 minoura if (r == 0) {
291 1.1.2.1 minoura if (flag != INTIO_MAP_ALLOCATE)
292 1.1.2.1 minoura extent_free (map, ia->ia_addr, ia->ia_size, 0);
293 1.1.2.1 minoura return 0;
294 1.1.2.1 minoura }
295 1.1.2.1 minoura
296 1.1.2.1 minoura return -1;
297 1.1.2.1 minoura }
298 1.1.2.1 minoura
299 1.1.2.1 minoura int
300 1.1.2.1 minoura intio_map_free_region(parent, ia)
301 1.1.2.1 minoura struct device *parent;
302 1.1.2.1 minoura struct intio_attach_args *ia;
303 1.1.2.1 minoura {
304 1.1.2.1 minoura struct intio_softc *sc = (struct intio_softc*) parent;
305 1.1.2.1 minoura struct extent *map = sc->sc_map;
306 1.1.2.1 minoura
307 1.1.2.1 minoura extent_free (map, ia->ia_addr, ia->ia_size, 0);
308 1.1.2.1 minoura #ifdef DEBUG
309 1.1.2.1 minoura extent_print (map);
310 1.1.2.1 minoura #endif
311 1.1.2.1 minoura return 0;
312 1.1.2.1 minoura }
313 1.1.2.1 minoura
314 1.1.2.1 minoura void
315 1.1.2.1 minoura intio_alloc_system_ports(sc)
316 1.1.2.1 minoura struct intio_softc *sc;
317 1.1.2.1 minoura {
318 1.1.2.1 minoura extent_alloc_region (sc->sc_map, INTIO_SYSPORT, 16, 0);
319 1.1.2.5 minoura extent_alloc_region (sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
320 1.1.2.1 minoura }
321 1.1.2.1 minoura
322 1.1.2.1 minoura
323 1.1.2.1 minoura /*
324 1.1.2.1 minoura * intio bus space stuff.
325 1.1.2.1 minoura */
326 1.1.2.1 minoura static int
327 1.1.2.1 minoura intio_bus_space_map(t, bpa, size, flags, bshp)
328 1.1.2.1 minoura bus_space_tag_t t;
329 1.1.2.1 minoura bus_addr_t bpa;
330 1.1.2.1 minoura bus_size_t size;
331 1.1.2.1 minoura int flags;
332 1.1.2.1 minoura bus_space_handle_t *bshp;
333 1.1.2.1 minoura {
334 1.1.2.1 minoura /*
335 1.1.2.1 minoura * Intio bus is mapped permanently.
336 1.1.2.1 minoura */
337 1.1.2.1 minoura *bshp = (bus_space_handle_t)
338 1.1.2.1 minoura ((u_int) bpa - PHYS_INTIODEV + intiobase);
339 1.1.2.6 minoura /*
340 1.1.2.6 minoura * Some devices are mapped on odd addresses only.
341 1.1.2.6 minoura */
342 1.1.2.6 minoura if (flags & BUS_SPACE_MAP_SHIFTED)
343 1.1.2.6 minoura *bshp += 0x80000001;
344 1.1.2.1 minoura
345 1.1.2.1 minoura return (0);
346 1.1.2.1 minoura }
347 1.1.2.1 minoura
348 1.1.2.1 minoura static void
349 1.1.2.1 minoura intio_bus_space_unmap(t, bsh, size)
350 1.1.2.1 minoura bus_space_tag_t t;
351 1.1.2.1 minoura bus_space_handle_t bsh;
352 1.1.2.1 minoura bus_size_t size;
353 1.1.2.1 minoura {
354 1.1.2.1 minoura return;
355 1.1.2.1 minoura }
356 1.1.2.1 minoura
357 1.1.2.1 minoura static int
358 1.1.2.1 minoura intio_bus_space_subregion(t, bsh, offset, size, nbshp)
359 1.1.2.1 minoura bus_space_tag_t t;
360 1.1.2.1 minoura bus_space_handle_t bsh;
361 1.1.2.1 minoura bus_size_t offset, size;
362 1.1.2.1 minoura bus_space_handle_t *nbshp;
363 1.1.2.1 minoura {
364 1.1.2.1 minoura
365 1.1.2.1 minoura *nbshp = bsh + offset;
366 1.1.2.1 minoura return (0);
367 1.1.2.1 minoura }
368 1.1.2.1 minoura
369 1.1.2.1 minoura
370 1.1.2.1 minoura /*
371 1.1.2.1 minoura * interrupt handler
372 1.1.2.1 minoura */
373 1.1.2.1 minoura int
374 1.1.2.1 minoura intio_intr_establish (vector, name, handler, arg)
375 1.1.2.1 minoura int vector;
376 1.1.2.1 minoura const char *name; /* XXX */
377 1.1.2.1 minoura intio_intr_handler_t handler;
378 1.1.2.1 minoura void *arg;
379 1.1.2.1 minoura {
380 1.1.2.1 minoura if (vector < 16)
381 1.1.2.1 minoura panic ("Invalid interrupt vector");
382 1.1.2.1 minoura if (iiv[vector].iiv_handler)
383 1.1.2.1 minoura return EBUSY;
384 1.1.2.1 minoura iiv[vector].iiv_handler = handler;
385 1.1.2.1 minoura iiv[vector].iiv_arg = arg;
386 1.1.2.7 minoura iiv[vector].iiv_intrcntoff = scan_intrnames(name);
387 1.1.2.1 minoura
388 1.1.2.1 minoura return 0;
389 1.1.2.1 minoura }
390 1.1.2.1 minoura
391 1.1.2.7 minoura static int
392 1.1.2.7 minoura scan_intrnames (name)
393 1.1.2.7 minoura const char *name;
394 1.1.2.7 minoura {
395 1.1.2.7 minoura extern char intrnames[];
396 1.1.2.7 minoura extern char eintrnames[];
397 1.1.2.7 minoura int r = 0;
398 1.1.2.7 minoura char *p = &intrnames[0];
399 1.1.2.7 minoura
400 1.1.2.7 minoura for (;;) {
401 1.1.2.7 minoura if (*p == 0) { /* new intr */
402 1.1.2.7 minoura if (p + strlen(name) >= eintrnames)
403 1.1.2.7 minoura panic ("Interrupt statics buffer overrun.");
404 1.1.2.7 minoura strcpy (p, name);
405 1.1.2.7 minoura break;
406 1.1.2.7 minoura }
407 1.1.2.7 minoura if (strcmp(p, name) == 0)
408 1.1.2.7 minoura break;
409 1.1.2.7 minoura r++;
410 1.1.2.7 minoura while (*p++ != 0);
411 1.1.2.7 minoura }
412 1.1.2.7 minoura
413 1.1.2.7 minoura return r;
414 1.1.2.7 minoura }
415 1.1.2.7 minoura
416 1.1.2.1 minoura int
417 1.1.2.1 minoura intio_intr_disestablish (vector, arg)
418 1.1.2.1 minoura int vector;
419 1.1.2.1 minoura void *arg;
420 1.1.2.1 minoura {
421 1.1.2.1 minoura if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
422 1.1.2.1 minoura return EINVAL;
423 1.1.2.1 minoura iiv[vector].iiv_handler = 0;
424 1.1.2.1 minoura iiv[vector].iiv_arg = 0;
425 1.1.2.1 minoura
426 1.1.2.1 minoura return 0;
427 1.1.2.1 minoura }
428 1.1.2.1 minoura
429 1.1.2.1 minoura int
430 1.1.2.1 minoura intio_intr (frame)
431 1.1.2.1 minoura struct frame *frame;
432 1.1.2.1 minoura {
433 1.1.2.1 minoura int vector = frame->f_vector / 4;
434 1.1.2.7 minoura extern int intrcnt[];
435 1.1.2.1 minoura
436 1.1.2.7 minoura #if 0 /* this is not correct now */
437 1.1.2.1 minoura /* CAUTION: HERE WE ARE IN SPLHIGH() */
438 1.1.2.1 minoura /* LOWER TO APPROPRIATE IPL AT VERY FIRST IN THE HANDLER!! */
439 1.1.2.7 minoura #endif
440 1.1.2.1 minoura if (iiv[vector].iiv_handler == 0) {
441 1.1.2.1 minoura printf ("Stray interrupt: %d type %x\n", vector, frame->f_format);
442 1.1.2.1 minoura return 0;
443 1.1.2.1 minoura }
444 1.1.2.1 minoura
445 1.1.2.7 minoura intrcnt[iiv[vector].iiv_intrcntoff]++;
446 1.1.2.3 minoura
447 1.1.2.1 minoura return (*(iiv[vector].iiv_handler)) (iiv[vector].iiv_arg);
448 1.1.2.3 minoura }
449 1.1.2.3 minoura
450 1.1.2.5 minoura /*
451 1.1.2.5 minoura * Intio I/O controler interrupt
452 1.1.2.5 minoura */
453 1.1.2.5 minoura static intio_ivec = 0;
454 1.1.2.5 minoura void
455 1.1.2.5 minoura intio_set_ivec (vec)
456 1.1.2.5 minoura int vec;
457 1.1.2.5 minoura {
458 1.1.2.5 minoura vec &= 0xfc;
459 1.1.2.5 minoura
460 1.1.2.5 minoura if (intio_ivec && intio_ivec != (vec & 0xfc))
461 1.1.2.5 minoura panic ("Wrong interrupt vector for Sicilian.");
462 1.1.2.5 minoura
463 1.1.2.5 minoura intio_ivec = vec;
464 1.1.2.5 minoura intio_set_sicilian_ivec(vec);
465 1.1.2.5 minoura }
466 1.1.2.3 minoura
467 1.1.2.3 minoura
468 1.1.2.3 minoura /*
469 1.1.2.3 minoura * intio bus dma stuff. stolen from arch/i386/isa/isa_machdep.c
470 1.1.2.3 minoura */
471 1.1.2.3 minoura
472 1.1.2.3 minoura /*
473 1.1.2.3 minoura * Create an INTIO DMA map.
474 1.1.2.3 minoura */
475 1.1.2.3 minoura int
476 1.1.2.3 minoura _intio_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
477 1.1.2.3 minoura bus_dma_tag_t t;
478 1.1.2.3 minoura bus_size_t size;
479 1.1.2.3 minoura int nsegments;
480 1.1.2.3 minoura bus_size_t maxsegsz;
481 1.1.2.3 minoura bus_size_t boundary;
482 1.1.2.3 minoura int flags;
483 1.1.2.3 minoura bus_dmamap_t *dmamp;
484 1.1.2.3 minoura {
485 1.1.2.3 minoura struct intio_dma_cookie *cookie;
486 1.1.2.3 minoura bus_dmamap_t map;
487 1.1.2.3 minoura int error, cookieflags;
488 1.1.2.3 minoura void *cookiestore;
489 1.1.2.3 minoura size_t cookiesize;
490 1.1.2.3 minoura extern paddr_t avail_end;
491 1.1.2.3 minoura
492 1.1.2.3 minoura /* Call common function to create the basic map. */
493 1.1.2.3 minoura error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
494 1.1.2.3 minoura flags, dmamp);
495 1.1.2.3 minoura if (error)
496 1.1.2.3 minoura return (error);
497 1.1.2.3 minoura
498 1.1.2.3 minoura map = *dmamp;
499 1.1.2.3 minoura map->x68k_dm_cookie = NULL;
500 1.1.2.3 minoura
501 1.1.2.3 minoura cookiesize = sizeof(struct intio_dma_cookie);
502 1.1.2.3 minoura
503 1.1.2.3 minoura /*
504 1.1.2.3 minoura * INTIO only has 24-bits of address space. This means
505 1.1.2.3 minoura * we can't DMA to pages over 16M. In order to DMA to
506 1.1.2.3 minoura * arbitrary buffers, we use "bounce buffers" - pages
507 1.1.2.3 minoura * in memory below the 16M boundary. On DMA reads,
508 1.1.2.3 minoura * DMA happens to the bounce buffers, and is copied into
509 1.1.2.3 minoura * the caller's buffer. On writes, data is copied into
510 1.1.2.3 minoura * but bounce buffer, and the DMA happens from those
511 1.1.2.3 minoura * pages. To software using the DMA mapping interface,
512 1.1.2.3 minoura * this looks simply like a data cache.
513 1.1.2.3 minoura *
514 1.1.2.3 minoura * If we have more than 16M of RAM in the system, we may
515 1.1.2.3 minoura * need bounce buffers. We check and remember that here.
516 1.1.2.3 minoura *
517 1.1.2.3 minoura * ...or, there is an opposite case. The most segments
518 1.1.2.3 minoura * a transfer will require is (maxxfer / NBPG) + 1. If
519 1.1.2.3 minoura * the caller can't handle that many segments (e.g. the
520 1.1.2.3 minoura * DMAC), we may have to bounce it as well.
521 1.1.2.3 minoura */
522 1.1.2.3 minoura if (avail_end <= t->_bounce_thresh)
523 1.1.2.3 minoura /* Bouncing not necessary due to memory size. */
524 1.1.2.3 minoura map->x68k_dm_bounce_thresh = 0;
525 1.1.2.3 minoura cookieflags = 0;
526 1.1.2.3 minoura if (map->x68k_dm_bounce_thresh != 0 ||
527 1.1.2.3 minoura ((map->x68k_dm_size / NBPG) + 1) > map->x68k_dm_segcnt) {
528 1.1.2.3 minoura cookieflags |= ID_MIGHT_NEED_BOUNCE;
529 1.1.2.3 minoura cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
530 1.1.2.3 minoura }
531 1.1.2.3 minoura
532 1.1.2.3 minoura /*
533 1.1.2.3 minoura * Allocate our cookie.
534 1.1.2.3 minoura */
535 1.1.2.3 minoura if ((cookiestore = malloc(cookiesize, M_DMAMAP,
536 1.1.2.3 minoura (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
537 1.1.2.3 minoura error = ENOMEM;
538 1.1.2.3 minoura goto out;
539 1.1.2.3 minoura }
540 1.1.2.3 minoura memset(cookiestore, 0, cookiesize);
541 1.1.2.3 minoura cookie = (struct intio_dma_cookie *)cookiestore;
542 1.1.2.3 minoura cookie->id_flags = cookieflags;
543 1.1.2.3 minoura map->x68k_dm_cookie = cookie;
544 1.1.2.3 minoura
545 1.1.2.3 minoura if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
546 1.1.2.3 minoura /*
547 1.1.2.3 minoura * Allocate the bounce pages now if the caller
548 1.1.2.3 minoura * wishes us to do so.
549 1.1.2.3 minoura */
550 1.1.2.3 minoura if ((flags & BUS_DMA_ALLOCNOW) == 0)
551 1.1.2.3 minoura goto out;
552 1.1.2.3 minoura
553 1.1.2.3 minoura error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
554 1.1.2.3 minoura }
555 1.1.2.3 minoura
556 1.1.2.3 minoura out:
557 1.1.2.3 minoura if (error) {
558 1.1.2.3 minoura if (map->x68k_dm_cookie != NULL)
559 1.1.2.3 minoura free(map->x68k_dm_cookie, M_DMAMAP);
560 1.1.2.3 minoura x68k_bus_dmamap_destroy(t, map);
561 1.1.2.3 minoura }
562 1.1.2.3 minoura return (error);
563 1.1.2.3 minoura }
564 1.1.2.3 minoura
565 1.1.2.3 minoura /*
566 1.1.2.3 minoura * Destroy an INTIO DMA map.
567 1.1.2.3 minoura */
568 1.1.2.3 minoura void
569 1.1.2.3 minoura _intio_bus_dmamap_destroy(t, map)
570 1.1.2.3 minoura bus_dma_tag_t t;
571 1.1.2.3 minoura bus_dmamap_t map;
572 1.1.2.3 minoura {
573 1.1.2.3 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
574 1.1.2.3 minoura
575 1.1.2.3 minoura /*
576 1.1.2.3 minoura * Free any bounce pages this map might hold.
577 1.1.2.3 minoura */
578 1.1.2.3 minoura if (cookie->id_flags & ID_HAS_BOUNCE)
579 1.1.2.3 minoura _intio_dma_free_bouncebuf(t, map);
580 1.1.2.3 minoura
581 1.1.2.3 minoura free(cookie, M_DMAMAP);
582 1.1.2.3 minoura x68k_bus_dmamap_destroy(t, map);
583 1.1.2.3 minoura }
584 1.1.2.3 minoura
585 1.1.2.3 minoura /*
586 1.1.2.3 minoura * Load an INTIO DMA map with a linear buffer.
587 1.1.2.3 minoura */
588 1.1.2.3 minoura int
589 1.1.2.3 minoura _intio_bus_dmamap_load(t, map, buf, buflen, p, flags)
590 1.1.2.3 minoura bus_dma_tag_t t;
591 1.1.2.3 minoura bus_dmamap_t map;
592 1.1.2.3 minoura void *buf;
593 1.1.2.3 minoura bus_size_t buflen;
594 1.1.2.3 minoura struct proc *p;
595 1.1.2.3 minoura int flags;
596 1.1.2.3 minoura {
597 1.1.2.3 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
598 1.1.2.3 minoura int error;
599 1.1.2.3 minoura
600 1.1.2.3 minoura /*
601 1.1.2.3 minoura * Make sure that on error condition we return "no valid mappings."
602 1.1.2.3 minoura */
603 1.1.2.3 minoura map->dm_mapsize = 0;
604 1.1.2.3 minoura map->dm_nsegs = 0;
605 1.1.2.3 minoura
606 1.1.2.3 minoura /*
607 1.1.2.3 minoura * Try to load the map the normal way. If this errors out,
608 1.1.2.3 minoura * and we can bounce, we will.
609 1.1.2.3 minoura */
610 1.1.2.3 minoura error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
611 1.1.2.3 minoura if (error == 0 ||
612 1.1.2.3 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
613 1.1.2.3 minoura return (error);
614 1.1.2.3 minoura
615 1.1.2.3 minoura /*
616 1.1.2.3 minoura * Allocate bounce pages, if necessary.
617 1.1.2.3 minoura */
618 1.1.2.3 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
619 1.1.2.3 minoura error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
620 1.1.2.3 minoura if (error)
621 1.1.2.3 minoura return (error);
622 1.1.2.3 minoura }
623 1.1.2.3 minoura
624 1.1.2.3 minoura /*
625 1.1.2.3 minoura * Cache a pointer to the caller's buffer and load the DMA map
626 1.1.2.3 minoura * with the bounce buffer.
627 1.1.2.3 minoura */
628 1.1.2.3 minoura cookie->id_origbuf = buf;
629 1.1.2.3 minoura cookie->id_origbuflen = buflen;
630 1.1.2.3 minoura cookie->id_buftype = ID_BUFTYPE_LINEAR;
631 1.1.2.3 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
632 1.1.2.3 minoura p, flags);
633 1.1.2.3 minoura if (error) {
634 1.1.2.3 minoura /*
635 1.1.2.3 minoura * Free the bounce pages, unless our resources
636 1.1.2.3 minoura * are reserved for our exclusive use.
637 1.1.2.3 minoura */
638 1.1.2.3 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
639 1.1.2.3 minoura _intio_dma_free_bouncebuf(t, map);
640 1.1.2.3 minoura return (error);
641 1.1.2.3 minoura }
642 1.1.2.3 minoura
643 1.1.2.3 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
644 1.1.2.3 minoura cookie->id_flags |= ID_IS_BOUNCING;
645 1.1.2.3 minoura return (0);
646 1.1.2.3 minoura }
647 1.1.2.3 minoura
648 1.1.2.3 minoura /*
649 1.1.2.3 minoura * Like _intio_bus_dmamap_load(), but for mbufs.
650 1.1.2.3 minoura */
651 1.1.2.3 minoura int
652 1.1.2.3 minoura _intio_bus_dmamap_load_mbuf(t, map, m0, flags)
653 1.1.2.3 minoura bus_dma_tag_t t;
654 1.1.2.3 minoura bus_dmamap_t map;
655 1.1.2.3 minoura struct mbuf *m0;
656 1.1.2.3 minoura int flags;
657 1.1.2.3 minoura {
658 1.1.2.3 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
659 1.1.2.3 minoura int error;
660 1.1.2.3 minoura
661 1.1.2.3 minoura /*
662 1.1.2.3 minoura * Make sure on error condition we return "no valid mappings."
663 1.1.2.3 minoura */
664 1.1.2.3 minoura map->dm_mapsize = 0;
665 1.1.2.3 minoura map->dm_nsegs = 0;
666 1.1.2.3 minoura
667 1.1.2.3 minoura #ifdef DIAGNOSTIC
668 1.1.2.3 minoura if ((m0->m_flags & M_PKTHDR) == 0)
669 1.1.2.3 minoura panic("_intio_bus_dmamap_load_mbuf: no packet header");
670 1.1.2.3 minoura #endif
671 1.1.2.3 minoura
672 1.1.2.3 minoura if (m0->m_pkthdr.len > map->x68k_dm_size)
673 1.1.2.3 minoura return (EINVAL);
674 1.1.2.3 minoura
675 1.1.2.3 minoura /*
676 1.1.2.3 minoura * Try to load the map the normal way. If this errors out,
677 1.1.2.3 minoura * and we can bounce, we will.
678 1.1.2.3 minoura */
679 1.1.2.3 minoura error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
680 1.1.2.3 minoura if (error == 0 ||
681 1.1.2.3 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
682 1.1.2.3 minoura return (error);
683 1.1.2.3 minoura
684 1.1.2.3 minoura /*
685 1.1.2.3 minoura * Allocate bounce pages, if necessary.
686 1.1.2.3 minoura */
687 1.1.2.3 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
688 1.1.2.3 minoura error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
689 1.1.2.3 minoura flags);
690 1.1.2.3 minoura if (error)
691 1.1.2.3 minoura return (error);
692 1.1.2.3 minoura }
693 1.1.2.3 minoura
694 1.1.2.3 minoura /*
695 1.1.2.3 minoura * Cache a pointer to the caller's buffer and load the DMA map
696 1.1.2.3 minoura * with the bounce buffer.
697 1.1.2.3 minoura */
698 1.1.2.3 minoura cookie->id_origbuf = m0;
699 1.1.2.3 minoura cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
700 1.1.2.3 minoura cookie->id_buftype = ID_BUFTYPE_MBUF;
701 1.1.2.3 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
702 1.1.2.3 minoura m0->m_pkthdr.len, NULL, flags);
703 1.1.2.3 minoura if (error) {
704 1.1.2.3 minoura /*
705 1.1.2.3 minoura * Free the bounce pages, unless our resources
706 1.1.2.3 minoura * are reserved for our exclusive use.
707 1.1.2.3 minoura */
708 1.1.2.3 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
709 1.1.2.3 minoura _intio_dma_free_bouncebuf(t, map);
710 1.1.2.3 minoura return (error);
711 1.1.2.3 minoura }
712 1.1.2.3 minoura
713 1.1.2.3 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
714 1.1.2.3 minoura cookie->id_flags |= ID_IS_BOUNCING;
715 1.1.2.3 minoura return (0);
716 1.1.2.3 minoura }
717 1.1.2.3 minoura
718 1.1.2.3 minoura /*
719 1.1.2.3 minoura * Like _intio_bus_dmamap_load(), but for uios.
720 1.1.2.3 minoura */
721 1.1.2.3 minoura int
722 1.1.2.3 minoura _intio_bus_dmamap_load_uio(t, map, uio, flags)
723 1.1.2.3 minoura bus_dma_tag_t t;
724 1.1.2.3 minoura bus_dmamap_t map;
725 1.1.2.3 minoura struct uio *uio;
726 1.1.2.3 minoura int flags;
727 1.1.2.3 minoura {
728 1.1.2.3 minoura panic("_intio_bus_dmamap_load_uio: not implemented");
729 1.1.2.3 minoura }
730 1.1.2.3 minoura
731 1.1.2.3 minoura /*
732 1.1.2.3 minoura * Like _intio_bus_dmamap_load(), but for raw memory allocated with
733 1.1.2.3 minoura * bus_dmamem_alloc().
734 1.1.2.3 minoura */
735 1.1.2.3 minoura int
736 1.1.2.3 minoura _intio_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
737 1.1.2.3 minoura bus_dma_tag_t t;
738 1.1.2.3 minoura bus_dmamap_t map;
739 1.1.2.3 minoura bus_dma_segment_t *segs;
740 1.1.2.3 minoura int nsegs;
741 1.1.2.3 minoura bus_size_t size;
742 1.1.2.3 minoura int flags;
743 1.1.2.3 minoura {
744 1.1.2.3 minoura
745 1.1.2.3 minoura panic("_intio_bus_dmamap_load_raw: not implemented");
746 1.1.2.3 minoura }
747 1.1.2.3 minoura
748 1.1.2.3 minoura /*
749 1.1.2.3 minoura * Unload an INTIO DMA map.
750 1.1.2.3 minoura */
751 1.1.2.3 minoura void
752 1.1.2.3 minoura _intio_bus_dmamap_unload(t, map)
753 1.1.2.3 minoura bus_dma_tag_t t;
754 1.1.2.3 minoura bus_dmamap_t map;
755 1.1.2.3 minoura {
756 1.1.2.3 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
757 1.1.2.3 minoura
758 1.1.2.3 minoura /*
759 1.1.2.3 minoura * If we have bounce pages, free them, unless they're
760 1.1.2.3 minoura * reserved for our exclusive use.
761 1.1.2.3 minoura */
762 1.1.2.3 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) &&
763 1.1.2.3 minoura (map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
764 1.1.2.3 minoura _intio_dma_free_bouncebuf(t, map);
765 1.1.2.3 minoura
766 1.1.2.3 minoura cookie->id_flags &= ~ID_IS_BOUNCING;
767 1.1.2.3 minoura cookie->id_buftype = ID_BUFTYPE_INVALID;
768 1.1.2.3 minoura
769 1.1.2.3 minoura /*
770 1.1.2.3 minoura * Do the generic bits of the unload.
771 1.1.2.3 minoura */
772 1.1.2.3 minoura x68k_bus_dmamap_unload(t, map);
773 1.1.2.3 minoura }
774 1.1.2.3 minoura
775 1.1.2.3 minoura /*
776 1.1.2.3 minoura * Synchronize an INTIO DMA map.
777 1.1.2.3 minoura */
778 1.1.2.3 minoura void
779 1.1.2.3 minoura _intio_bus_dmamap_sync(t, map, offset, len, ops)
780 1.1.2.3 minoura bus_dma_tag_t t;
781 1.1.2.3 minoura bus_dmamap_t map;
782 1.1.2.3 minoura bus_addr_t offset;
783 1.1.2.3 minoura bus_size_t len;
784 1.1.2.3 minoura int ops;
785 1.1.2.3 minoura {
786 1.1.2.3 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
787 1.1.2.3 minoura
788 1.1.2.3 minoura /*
789 1.1.2.3 minoura * Mixing PRE and POST operations is not allowed.
790 1.1.2.3 minoura */
791 1.1.2.3 minoura if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
792 1.1.2.3 minoura (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
793 1.1.2.3 minoura panic("_intio_bus_dmamap_sync: mix PRE and POST");
794 1.1.2.3 minoura
795 1.1.2.3 minoura #ifdef DIAGNOSTIC
796 1.1.2.3 minoura if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
797 1.1.2.3 minoura if (offset >= map->dm_mapsize)
798 1.1.2.3 minoura panic("_intio_bus_dmamap_sync: bad offset");
799 1.1.2.3 minoura if (len == 0 || (offset + len) > map->dm_mapsize)
800 1.1.2.3 minoura panic("_intio_bus_dmamap_sync: bad length");
801 1.1.2.3 minoura }
802 1.1.2.3 minoura #endif
803 1.1.2.3 minoura
804 1.1.2.3 minoura /*
805 1.1.2.3 minoura * If we're not bouncing, just return; nothing to do.
806 1.1.2.3 minoura */
807 1.1.2.3 minoura if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
808 1.1.2.3 minoura return;
809 1.1.2.3 minoura
810 1.1.2.3 minoura switch (cookie->id_buftype) {
811 1.1.2.3 minoura case ID_BUFTYPE_LINEAR:
812 1.1.2.3 minoura /*
813 1.1.2.3 minoura * Nothing to do for pre-read.
814 1.1.2.3 minoura */
815 1.1.2.3 minoura
816 1.1.2.3 minoura if (ops & BUS_DMASYNC_PREWRITE) {
817 1.1.2.3 minoura /*
818 1.1.2.3 minoura * Copy the caller's buffer to the bounce buffer.
819 1.1.2.3 minoura */
820 1.1.2.3 minoura memcpy((char *)cookie->id_bouncebuf + offset,
821 1.1.2.3 minoura (char *)cookie->id_origbuf + offset, len);
822 1.1.2.3 minoura }
823 1.1.2.3 minoura
824 1.1.2.3 minoura if (ops & BUS_DMASYNC_POSTREAD) {
825 1.1.2.3 minoura /*
826 1.1.2.3 minoura * Copy the bounce buffer to the caller's buffer.
827 1.1.2.3 minoura */
828 1.1.2.3 minoura memcpy((char *)cookie->id_origbuf + offset,
829 1.1.2.3 minoura (char *)cookie->id_bouncebuf + offset, len);
830 1.1.2.3 minoura }
831 1.1.2.3 minoura
832 1.1.2.3 minoura /*
833 1.1.2.3 minoura * Nothing to do for post-write.
834 1.1.2.3 minoura */
835 1.1.2.3 minoura break;
836 1.1.2.3 minoura
837 1.1.2.3 minoura case ID_BUFTYPE_MBUF:
838 1.1.2.3 minoura {
839 1.1.2.3 minoura struct mbuf *m, *m0 = cookie->id_origbuf;
840 1.1.2.3 minoura bus_size_t minlen, moff;
841 1.1.2.3 minoura
842 1.1.2.3 minoura /*
843 1.1.2.3 minoura * Nothing to do for pre-read.
844 1.1.2.3 minoura */
845 1.1.2.3 minoura
846 1.1.2.3 minoura if (ops & BUS_DMASYNC_PREWRITE) {
847 1.1.2.3 minoura /*
848 1.1.2.3 minoura * Copy the caller's buffer to the bounce buffer.
849 1.1.2.3 minoura */
850 1.1.2.3 minoura m_copydata(m0, offset, len,
851 1.1.2.3 minoura (char *)cookie->id_bouncebuf + offset);
852 1.1.2.3 minoura }
853 1.1.2.3 minoura
854 1.1.2.3 minoura if (ops & BUS_DMASYNC_POSTREAD) {
855 1.1.2.3 minoura /*
856 1.1.2.3 minoura * Copy the bounce buffer to the caller's buffer.
857 1.1.2.3 minoura */
858 1.1.2.3 minoura for (moff = offset, m = m0; m != NULL && len != 0;
859 1.1.2.3 minoura m = m->m_next) {
860 1.1.2.3 minoura /* Find the beginning mbuf. */
861 1.1.2.3 minoura if (moff >= m->m_len) {
862 1.1.2.3 minoura moff -= m->m_len;
863 1.1.2.3 minoura continue;
864 1.1.2.3 minoura }
865 1.1.2.3 minoura
866 1.1.2.3 minoura /*
867 1.1.2.3 minoura * Now at the first mbuf to sync; nail
868 1.1.2.3 minoura * each one until we have exhausted the
869 1.1.2.3 minoura * length.
870 1.1.2.3 minoura */
871 1.1.2.3 minoura minlen = len < m->m_len - moff ?
872 1.1.2.3 minoura len : m->m_len - moff;
873 1.1.2.3 minoura
874 1.1.2.3 minoura memcpy(mtod(m, caddr_t) + moff,
875 1.1.2.3 minoura (char *)cookie->id_bouncebuf + offset,
876 1.1.2.3 minoura minlen);
877 1.1.2.3 minoura
878 1.1.2.3 minoura moff = 0;
879 1.1.2.3 minoura len -= minlen;
880 1.1.2.3 minoura offset += minlen;
881 1.1.2.3 minoura }
882 1.1.2.3 minoura }
883 1.1.2.3 minoura
884 1.1.2.3 minoura /*
885 1.1.2.3 minoura * Nothing to do for post-write.
886 1.1.2.3 minoura */
887 1.1.2.3 minoura break;
888 1.1.2.3 minoura }
889 1.1.2.3 minoura
890 1.1.2.3 minoura case ID_BUFTYPE_UIO:
891 1.1.2.3 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
892 1.1.2.3 minoura break;
893 1.1.2.3 minoura
894 1.1.2.3 minoura case ID_BUFTYPE_RAW:
895 1.1.2.3 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
896 1.1.2.3 minoura break;
897 1.1.2.3 minoura
898 1.1.2.3 minoura case ID_BUFTYPE_INVALID:
899 1.1.2.3 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
900 1.1.2.3 minoura break;
901 1.1.2.3 minoura
902 1.1.2.3 minoura default:
903 1.1.2.3 minoura printf("unknown buffer type %d\n", cookie->id_buftype);
904 1.1.2.3 minoura panic("_intio_bus_dmamap_sync");
905 1.1.2.3 minoura }
906 1.1.2.3 minoura }
907 1.1.2.3 minoura
908 1.1.2.3 minoura /*
909 1.1.2.3 minoura * Allocate memory safe for INTIO DMA.
910 1.1.2.3 minoura */
911 1.1.2.3 minoura int
912 1.1.2.3 minoura _intio_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
913 1.1.2.3 minoura bus_dma_tag_t t;
914 1.1.2.3 minoura bus_size_t size, alignment, boundary;
915 1.1.2.3 minoura bus_dma_segment_t *segs;
916 1.1.2.3 minoura int nsegs;
917 1.1.2.3 minoura int *rsegs;
918 1.1.2.3 minoura int flags;
919 1.1.2.3 minoura {
920 1.1.2.3 minoura paddr_t high;
921 1.1.2.3 minoura extern paddr_t avail_end;
922 1.1.2.3 minoura
923 1.1.2.3 minoura if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
924 1.1.2.3 minoura high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
925 1.1.2.3 minoura else
926 1.1.2.3 minoura high = trunc_page(avail_end);
927 1.1.2.3 minoura
928 1.1.2.3 minoura return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
929 1.1.2.3 minoura segs, nsegs, rsegs, flags, 0, high));
930 1.1.2.3 minoura }
931 1.1.2.3 minoura
932 1.1.2.3 minoura /**********************************************************************
933 1.1.2.3 minoura * INTIO DMA utility functions
934 1.1.2.3 minoura **********************************************************************/
935 1.1.2.3 minoura
936 1.1.2.3 minoura int
937 1.1.2.3 minoura _intio_dma_alloc_bouncebuf(t, map, size, flags)
938 1.1.2.3 minoura bus_dma_tag_t t;
939 1.1.2.3 minoura bus_dmamap_t map;
940 1.1.2.3 minoura bus_size_t size;
941 1.1.2.3 minoura int flags;
942 1.1.2.3 minoura {
943 1.1.2.3 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
944 1.1.2.3 minoura int error = 0;
945 1.1.2.3 minoura
946 1.1.2.3 minoura cookie->id_bouncebuflen = round_page(size);
947 1.1.2.3 minoura error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
948 1.1.2.3 minoura NBPG, map->x68k_dm_boundary, cookie->id_bouncesegs,
949 1.1.2.3 minoura map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
950 1.1.2.3 minoura if (error)
951 1.1.2.3 minoura goto out;
952 1.1.2.3 minoura error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
953 1.1.2.3 minoura cookie->id_nbouncesegs, cookie->id_bouncebuflen,
954 1.1.2.3 minoura (caddr_t *)&cookie->id_bouncebuf, flags);
955 1.1.2.3 minoura
956 1.1.2.3 minoura out:
957 1.1.2.3 minoura if (error) {
958 1.1.2.3 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
959 1.1.2.3 minoura cookie->id_nbouncesegs);
960 1.1.2.3 minoura cookie->id_bouncebuflen = 0;
961 1.1.2.3 minoura cookie->id_nbouncesegs = 0;
962 1.1.2.3 minoura } else {
963 1.1.2.3 minoura cookie->id_flags |= ID_HAS_BOUNCE;
964 1.1.2.3 minoura }
965 1.1.2.3 minoura
966 1.1.2.3 minoura return (error);
967 1.1.2.3 minoura }
968 1.1.2.3 minoura
969 1.1.2.3 minoura void
970 1.1.2.3 minoura _intio_dma_free_bouncebuf(t, map)
971 1.1.2.3 minoura bus_dma_tag_t t;
972 1.1.2.3 minoura bus_dmamap_t map;
973 1.1.2.3 minoura {
974 1.1.2.3 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
975 1.1.2.3 minoura
976 1.1.2.3 minoura x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
977 1.1.2.3 minoura cookie->id_bouncebuflen);
978 1.1.2.3 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
979 1.1.2.3 minoura cookie->id_nbouncesegs);
980 1.1.2.3 minoura cookie->id_bouncebuflen = 0;
981 1.1.2.3 minoura cookie->id_nbouncesegs = 0;
982 1.1.2.3 minoura cookie->id_flags &= ~ID_HAS_BOUNCE;
983 1.1.2.1 minoura }
984