intio.c revision 1.13 1 1.13 thorpej /* $NetBSD: intio.c,v 1.13 2002/09/27 03:18:09 thorpej Exp $ */
2 1.2 minoura
3 1.7 minoura /*-
4 1.2 minoura * Copyright (c) 1998 NetBSD Foundation, Inc.
5 1.2 minoura * All rights reserved.
6 1.2 minoura *
7 1.2 minoura * Redistribution and use in source and binary forms, with or without
8 1.2 minoura * modification, are permitted provided that the following conditions
9 1.2 minoura * are met:
10 1.2 minoura * 1. Redistributions of source code must retain the above copyright
11 1.2 minoura * notice, this list of conditions and the following disclaimer.
12 1.2 minoura * 2. Redistributions in binary form must reproduce the above copyright
13 1.2 minoura * notice, this list of conditions and the following disclaimer in the
14 1.2 minoura * documentation and/or other materials provided with the distribution.
15 1.2 minoura * 3. All advertising materials mentioning features or use of this software
16 1.2 minoura * must display the following acknowledgement:
17 1.7 minoura * This product includes software developed by the NetBSD
18 1.7 minoura * Foundation, Inc. and its contributors.
19 1.7 minoura * 4. Neither the name of The NetBSD Foundation nor the names of its
20 1.7 minoura * contributors may be used to endorse or promote products derived
21 1.7 minoura * from this software without specific prior written permission.
22 1.2 minoura *
23 1.7 minoura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.7 minoura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.7 minoura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.7 minoura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.7 minoura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.7 minoura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.7 minoura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.7 minoura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.7 minoura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.7 minoura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.7 minoura * POSSIBILITY OF SUCH DAMAGE.
34 1.2 minoura */
35 1.2 minoura
36 1.2 minoura /*
37 1.2 minoura * NetBSD/x68k internal I/O virtual bus.
38 1.2 minoura */
39 1.2 minoura
40 1.2 minoura #include <sys/param.h>
41 1.2 minoura #include <sys/systm.h>
42 1.2 minoura #include <sys/device.h>
43 1.2 minoura #include <sys/malloc.h>
44 1.2 minoura #include <sys/mbuf.h>
45 1.2 minoura #include <sys/extent.h>
46 1.9 mrg #include <uvm/uvm_extern.h>
47 1.2 minoura
48 1.2 minoura #include <machine/bus.h>
49 1.2 minoura #include <machine/cpu.h>
50 1.2 minoura #include <machine/frame.h>
51 1.2 minoura
52 1.2 minoura #include <arch/x68k/dev/intiovar.h>
53 1.2 minoura #include <arch/x68k/dev/mfp.h>
54 1.2 minoura
55 1.2 minoura
56 1.2 minoura /*
57 1.2 minoura * bus_space(9) interface
58 1.2 minoura */
59 1.2 minoura static int intio_bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *));
60 1.2 minoura static void intio_bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
61 1.2 minoura static int intio_bus_space_subregion __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *));
62 1.2 minoura
63 1.2 minoura static struct x68k_bus_space intio_bus = {
64 1.2 minoura #if 0
65 1.2 minoura X68K_INTIO_BUS,
66 1.2 minoura #endif
67 1.2 minoura intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
68 1.2 minoura x68k_bus_space_alloc, x68k_bus_space_free,
69 1.2 minoura #if 0
70 1.2 minoura x68k_bus_space_barrier,
71 1.2 minoura #endif
72 1.2 minoura
73 1.2 minoura 0
74 1.2 minoura };
75 1.2 minoura
76 1.2 minoura /*
77 1.2 minoura * bus_dma(9) interface
78 1.2 minoura */
79 1.2 minoura #define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
80 1.2 minoura int _intio_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int,
81 1.2 minoura bus_size_t, bus_size_t, int, bus_dmamap_t *));
82 1.2 minoura void _intio_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
83 1.2 minoura int _intio_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
84 1.2 minoura bus_size_t, struct proc *, int));
85 1.2 minoura int _intio_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
86 1.2 minoura struct mbuf *, int));
87 1.2 minoura int _intio_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
88 1.2 minoura struct uio *, int));
89 1.2 minoura int _intio_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
90 1.2 minoura bus_dma_segment_t *, int, bus_size_t, int));
91 1.2 minoura void _intio_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
92 1.2 minoura void _intio_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
93 1.2 minoura bus_addr_t, bus_size_t, int));
94 1.2 minoura
95 1.2 minoura int _intio_bus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
96 1.2 minoura bus_size_t, bus_dma_segment_t *, int, int *, int));
97 1.2 minoura
98 1.2 minoura int _intio_dma_alloc_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t,
99 1.2 minoura bus_size_t, int));
100 1.2 minoura void _intio_dma_free_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t));
101 1.2 minoura
102 1.2 minoura struct x68k_bus_dma intio_bus_dma = {
103 1.2 minoura INTIO_DMA_BOUNCE_THRESHOLD,
104 1.2 minoura _intio_bus_dmamap_create,
105 1.2 minoura _intio_bus_dmamap_destroy,
106 1.2 minoura _intio_bus_dmamap_load,
107 1.2 minoura _intio_bus_dmamap_load_mbuf,
108 1.2 minoura _intio_bus_dmamap_load_uio,
109 1.2 minoura _intio_bus_dmamap_load_raw,
110 1.2 minoura _intio_bus_dmamap_unload,
111 1.2 minoura _intio_bus_dmamap_sync,
112 1.2 minoura _intio_bus_dmamem_alloc,
113 1.2 minoura x68k_bus_dmamem_free,
114 1.2 minoura x68k_bus_dmamem_map,
115 1.2 minoura x68k_bus_dmamem_unmap,
116 1.2 minoura x68k_bus_dmamem_mmap,
117 1.2 minoura };
118 1.2 minoura
119 1.2 minoura /*
120 1.2 minoura * autoconf stuff
121 1.2 minoura */
122 1.2 minoura static int intio_match __P((struct device *, struct cfdata *, void *));
123 1.2 minoura static void intio_attach __P((struct device *, struct device *, void *));
124 1.2 minoura static int intio_search __P((struct device *, struct cfdata *cf, void *));
125 1.2 minoura static int intio_print __P((void *, const char *));
126 1.2 minoura static void intio_alloc_system_ports __P((struct intio_softc*));
127 1.2 minoura
128 1.2 minoura struct cfattach intio_ca = {
129 1.2 minoura sizeof(struct intio_softc), intio_match, intio_attach
130 1.2 minoura };
131 1.2 minoura
132 1.2 minoura static struct intio_interrupt_vector {
133 1.2 minoura intio_intr_handler_t iiv_handler;
134 1.2 minoura void *iiv_arg;
135 1.2 minoura int iiv_intrcntoff;
136 1.5 minoura } iiv[256] = {{0,},};
137 1.2 minoura
138 1.2 minoura extern struct cfdriver intio_cd;
139 1.2 minoura
140 1.2 minoura /* used in console initialization */
141 1.2 minoura extern int x68k_realconfig;
142 1.2 minoura int x68k_config_found __P((struct cfdata *, struct device *,
143 1.2 minoura void *, cfprint_t));
144 1.2 minoura static struct cfdata *cfdata_intiobus = NULL;
145 1.2 minoura
146 1.2 minoura /* other static functions */
147 1.2 minoura static int scan_intrnames __P((const char *));
148 1.4 minoura #ifdef DEBUG
149 1.4 minoura int intio_debug = 0;
150 1.4 minoura #endif
151 1.2 minoura
152 1.2 minoura static int
153 1.2 minoura intio_match(parent, cf, aux)
154 1.2 minoura struct device *parent;
155 1.2 minoura struct cfdata *cf;
156 1.2 minoura void *aux; /* NULL */
157 1.2 minoura {
158 1.2 minoura if (strcmp(aux, intio_cd.cd_name) != 0)
159 1.2 minoura return (0);
160 1.2 minoura if (cf->cf_unit != 0)
161 1.2 minoura return (0);
162 1.2 minoura if (x68k_realconfig == 0)
163 1.2 minoura cfdata_intiobus = cf; /* XXX */
164 1.2 minoura
165 1.2 minoura return (1);
166 1.2 minoura }
167 1.2 minoura
168 1.2 minoura
169 1.2 minoura /* used in console initialization: configure only MFP */
170 1.2 minoura static struct intio_attach_args initial_ia = {
171 1.2 minoura &intio_bus,
172 1.2 minoura 0/*XXX*/,
173 1.2 minoura
174 1.2 minoura "mfp", /* ia_name */
175 1.2 minoura MFP_ADDR, /* ia_addr */
176 1.6 minoura 0x30, /* ia_size */
177 1.2 minoura MFP_INTR, /* ia_intr */
178 1.2 minoura -1 /* ia_dma */
179 1.2 minoura -1, /* ia_dmaintr */
180 1.2 minoura };
181 1.2 minoura
182 1.2 minoura static void
183 1.2 minoura intio_attach(parent, self, aux)
184 1.2 minoura struct device *parent, *self;
185 1.2 minoura void *aux; /* NULL */
186 1.2 minoura {
187 1.2 minoura struct intio_softc *sc = (struct intio_softc *)self;
188 1.2 minoura struct intio_attach_args ia;
189 1.2 minoura
190 1.2 minoura if (self == NULL) {
191 1.2 minoura /* console only init */
192 1.2 minoura x68k_config_found(cfdata_intiobus, NULL, &initial_ia, NULL);
193 1.2 minoura return;
194 1.2 minoura }
195 1.2 minoura
196 1.3 minoura printf (" mapped at %8p\n", intiobase);
197 1.2 minoura
198 1.2 minoura sc->sc_map = extent_create("intiomap",
199 1.2 minoura PHYS_INTIODEV,
200 1.2 minoura PHYS_INTIODEV + 0x400000,
201 1.2 minoura M_DEVBUF, NULL, NULL, EX_NOWAIT);
202 1.2 minoura intio_alloc_system_ports (sc);
203 1.2 minoura
204 1.2 minoura sc->sc_bst = &intio_bus;
205 1.2 minoura sc->sc_bst->x68k_bus_device = self;
206 1.2 minoura sc->sc_dmat = &intio_bus_dma;
207 1.2 minoura sc->sc_dmac = 0;
208 1.2 minoura
209 1.11 wiz memset(iiv, 0, sizeof (struct intio_interrupt_vector) * 256);
210 1.2 minoura
211 1.2 minoura ia.ia_bst = sc->sc_bst;
212 1.2 minoura ia.ia_dmat = sc->sc_dmat;
213 1.2 minoura
214 1.2 minoura config_search (intio_search, self, &ia);
215 1.2 minoura }
216 1.2 minoura
217 1.2 minoura static int
218 1.2 minoura intio_search(parent, cf, aux)
219 1.2 minoura struct device *parent;
220 1.2 minoura struct cfdata *cf;
221 1.2 minoura void *aux;
222 1.2 minoura {
223 1.2 minoura struct intio_attach_args *ia = aux;
224 1.2 minoura struct intio_softc *sc = (struct intio_softc *)parent;
225 1.2 minoura
226 1.2 minoura ia->ia_bst = sc->sc_bst;
227 1.2 minoura ia->ia_dmat = sc->sc_dmat;
228 1.12 thorpej ia->ia_name = cf->cf_name;
229 1.2 minoura ia->ia_addr = cf->cf_addr;
230 1.2 minoura ia->ia_intr = cf->cf_intr;
231 1.2 minoura ia->ia_dma = cf->cf_dma;
232 1.2 minoura ia->ia_dmaintr = cf->cf_dmaintr;
233 1.2 minoura
234 1.13 thorpej if (config_match(parent, cf, ia) > 0)
235 1.2 minoura config_attach(parent, cf, ia, intio_print);
236 1.2 minoura
237 1.2 minoura return (0);
238 1.2 minoura }
239 1.2 minoura
240 1.2 minoura static int
241 1.2 minoura intio_print(aux, name)
242 1.2 minoura void *aux;
243 1.2 minoura const char *name;
244 1.2 minoura {
245 1.2 minoura struct intio_attach_args *ia = aux;
246 1.2 minoura
247 1.2 minoura /* if (ia->ia_addr > 0) */
248 1.2 minoura printf (" addr 0x%06x", ia->ia_addr);
249 1.2 minoura if (ia->ia_intr > 0)
250 1.2 minoura printf (" intr 0x%02x", ia->ia_intr);
251 1.2 minoura if (ia->ia_dma >= 0) {
252 1.2 minoura printf (" using DMA ch%d", ia->ia_dma);
253 1.2 minoura if (ia->ia_dmaintr > 0)
254 1.2 minoura printf (" intr 0x%02x and 0x%02x",
255 1.2 minoura ia->ia_dmaintr, ia->ia_dmaintr+1);
256 1.2 minoura }
257 1.2 minoura
258 1.2 minoura return (QUIET);
259 1.2 minoura }
260 1.2 minoura
261 1.2 minoura /*
262 1.2 minoura * intio memory map manager
263 1.2 minoura */
264 1.2 minoura
265 1.2 minoura int
266 1.2 minoura intio_map_allocate_region(parent, ia, flag)
267 1.2 minoura struct device *parent;
268 1.2 minoura struct intio_attach_args *ia;
269 1.2 minoura enum intio_map_flag flag; /* INTIO_MAP_TESTONLY or INTIO_MAP_ALLOCATE */
270 1.2 minoura {
271 1.2 minoura struct intio_softc *sc = (struct intio_softc*) parent;
272 1.2 minoura struct extent *map = sc->sc_map;
273 1.2 minoura int r;
274 1.2 minoura
275 1.2 minoura r = extent_alloc_region (map, ia->ia_addr, ia->ia_size, 0);
276 1.2 minoura #ifdef DEBUG
277 1.4 minoura if (intio_debug)
278 1.4 minoura extent_print (map);
279 1.2 minoura #endif
280 1.2 minoura if (r == 0) {
281 1.2 minoura if (flag != INTIO_MAP_ALLOCATE)
282 1.2 minoura extent_free (map, ia->ia_addr, ia->ia_size, 0);
283 1.2 minoura return 0;
284 1.2 minoura }
285 1.2 minoura
286 1.2 minoura return -1;
287 1.2 minoura }
288 1.2 minoura
289 1.2 minoura int
290 1.2 minoura intio_map_free_region(parent, ia)
291 1.2 minoura struct device *parent;
292 1.2 minoura struct intio_attach_args *ia;
293 1.2 minoura {
294 1.2 minoura struct intio_softc *sc = (struct intio_softc*) parent;
295 1.2 minoura struct extent *map = sc->sc_map;
296 1.2 minoura
297 1.2 minoura extent_free (map, ia->ia_addr, ia->ia_size, 0);
298 1.2 minoura #ifdef DEBUG
299 1.4 minoura if (intio_debug)
300 1.4 minoura extent_print (map);
301 1.2 minoura #endif
302 1.2 minoura return 0;
303 1.2 minoura }
304 1.2 minoura
305 1.2 minoura void
306 1.2 minoura intio_alloc_system_ports(sc)
307 1.2 minoura struct intio_softc *sc;
308 1.2 minoura {
309 1.2 minoura extent_alloc_region (sc->sc_map, INTIO_SYSPORT, 16, 0);
310 1.2 minoura extent_alloc_region (sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
311 1.2 minoura }
312 1.2 minoura
313 1.2 minoura
314 1.2 minoura /*
315 1.2 minoura * intio bus space stuff.
316 1.2 minoura */
317 1.2 minoura static int
318 1.2 minoura intio_bus_space_map(t, bpa, size, flags, bshp)
319 1.2 minoura bus_space_tag_t t;
320 1.2 minoura bus_addr_t bpa;
321 1.2 minoura bus_size_t size;
322 1.2 minoura int flags;
323 1.2 minoura bus_space_handle_t *bshp;
324 1.2 minoura {
325 1.2 minoura /*
326 1.2 minoura * Intio bus is mapped permanently.
327 1.2 minoura */
328 1.2 minoura *bshp = (bus_space_handle_t)
329 1.2 minoura ((u_int) bpa - PHYS_INTIODEV + intiobase);
330 1.2 minoura /*
331 1.10 isaki * Some devices are mapped on odd or even addresses only.
332 1.2 minoura */
333 1.10 isaki if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_ODD)
334 1.2 minoura *bshp += 0x80000001;
335 1.10 isaki if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_EVEN)
336 1.10 isaki *bshp += 0x80000000;
337 1.2 minoura
338 1.2 minoura return (0);
339 1.2 minoura }
340 1.2 minoura
341 1.2 minoura static void
342 1.2 minoura intio_bus_space_unmap(t, bsh, size)
343 1.2 minoura bus_space_tag_t t;
344 1.2 minoura bus_space_handle_t bsh;
345 1.2 minoura bus_size_t size;
346 1.2 minoura {
347 1.2 minoura return;
348 1.2 minoura }
349 1.2 minoura
350 1.2 minoura static int
351 1.2 minoura intio_bus_space_subregion(t, bsh, offset, size, nbshp)
352 1.2 minoura bus_space_tag_t t;
353 1.2 minoura bus_space_handle_t bsh;
354 1.2 minoura bus_size_t offset, size;
355 1.2 minoura bus_space_handle_t *nbshp;
356 1.2 minoura {
357 1.2 minoura
358 1.2 minoura *nbshp = bsh + offset;
359 1.2 minoura return (0);
360 1.2 minoura }
361 1.2 minoura
362 1.2 minoura
363 1.2 minoura /*
364 1.2 minoura * interrupt handler
365 1.2 minoura */
366 1.2 minoura int
367 1.2 minoura intio_intr_establish (vector, name, handler, arg)
368 1.2 minoura int vector;
369 1.2 minoura const char *name; /* XXX */
370 1.2 minoura intio_intr_handler_t handler;
371 1.2 minoura void *arg;
372 1.2 minoura {
373 1.2 minoura if (vector < 16)
374 1.2 minoura panic ("Invalid interrupt vector");
375 1.2 minoura if (iiv[vector].iiv_handler)
376 1.2 minoura return EBUSY;
377 1.2 minoura iiv[vector].iiv_handler = handler;
378 1.2 minoura iiv[vector].iiv_arg = arg;
379 1.2 minoura iiv[vector].iiv_intrcntoff = scan_intrnames(name);
380 1.2 minoura
381 1.2 minoura return 0;
382 1.2 minoura }
383 1.2 minoura
384 1.2 minoura static int
385 1.2 minoura scan_intrnames (name)
386 1.2 minoura const char *name;
387 1.2 minoura {
388 1.2 minoura extern char intrnames[];
389 1.2 minoura extern char eintrnames[];
390 1.2 minoura int r = 0;
391 1.2 minoura char *p = &intrnames[0];
392 1.2 minoura
393 1.2 minoura for (;;) {
394 1.2 minoura if (*p == 0) { /* new intr */
395 1.2 minoura if (p + strlen(name) >= eintrnames)
396 1.2 minoura panic ("Interrupt statics buffer overrun.");
397 1.2 minoura strcpy (p, name);
398 1.2 minoura break;
399 1.2 minoura }
400 1.2 minoura if (strcmp(p, name) == 0)
401 1.2 minoura break;
402 1.2 minoura r++;
403 1.2 minoura while (*p++ != 0);
404 1.2 minoura }
405 1.2 minoura
406 1.2 minoura return r;
407 1.2 minoura }
408 1.2 minoura
409 1.2 minoura int
410 1.2 minoura intio_intr_disestablish (vector, arg)
411 1.2 minoura int vector;
412 1.2 minoura void *arg;
413 1.2 minoura {
414 1.2 minoura if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
415 1.2 minoura return EINVAL;
416 1.2 minoura iiv[vector].iiv_handler = 0;
417 1.2 minoura iiv[vector].iiv_arg = 0;
418 1.2 minoura
419 1.2 minoura return 0;
420 1.2 minoura }
421 1.2 minoura
422 1.2 minoura int
423 1.2 minoura intio_intr (frame)
424 1.2 minoura struct frame *frame;
425 1.2 minoura {
426 1.2 minoura int vector = frame->f_vector / 4;
427 1.2 minoura extern int intrcnt[];
428 1.2 minoura
429 1.2 minoura #if 0 /* this is not correct now */
430 1.2 minoura /* CAUTION: HERE WE ARE IN SPLHIGH() */
431 1.2 minoura /* LOWER TO APPROPRIATE IPL AT VERY FIRST IN THE HANDLER!! */
432 1.2 minoura #endif
433 1.2 minoura if (iiv[vector].iiv_handler == 0) {
434 1.2 minoura printf ("Stray interrupt: %d type %x\n", vector, frame->f_format);
435 1.2 minoura return 0;
436 1.2 minoura }
437 1.2 minoura
438 1.2 minoura intrcnt[iiv[vector].iiv_intrcntoff]++;
439 1.2 minoura
440 1.2 minoura return (*(iiv[vector].iiv_handler)) (iiv[vector].iiv_arg);
441 1.2 minoura }
442 1.2 minoura
443 1.2 minoura /*
444 1.2 minoura * Intio I/O controler interrupt
445 1.2 minoura */
446 1.3 minoura static u_int8_t intio_ivec = 0;
447 1.3 minoura
448 1.2 minoura void
449 1.2 minoura intio_set_ivec (vec)
450 1.2 minoura int vec;
451 1.2 minoura {
452 1.2 minoura vec &= 0xfc;
453 1.2 minoura
454 1.2 minoura if (intio_ivec && intio_ivec != (vec & 0xfc))
455 1.2 minoura panic ("Wrong interrupt vector for Sicilian.");
456 1.2 minoura
457 1.2 minoura intio_ivec = vec;
458 1.2 minoura intio_set_sicilian_ivec(vec);
459 1.2 minoura }
460 1.2 minoura
461 1.2 minoura
462 1.2 minoura /*
463 1.2 minoura * intio bus dma stuff. stolen from arch/i386/isa/isa_machdep.c
464 1.2 minoura */
465 1.2 minoura
466 1.2 minoura /*
467 1.2 minoura * Create an INTIO DMA map.
468 1.2 minoura */
469 1.2 minoura int
470 1.2 minoura _intio_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
471 1.2 minoura bus_dma_tag_t t;
472 1.2 minoura bus_size_t size;
473 1.2 minoura int nsegments;
474 1.2 minoura bus_size_t maxsegsz;
475 1.2 minoura bus_size_t boundary;
476 1.2 minoura int flags;
477 1.2 minoura bus_dmamap_t *dmamp;
478 1.2 minoura {
479 1.2 minoura struct intio_dma_cookie *cookie;
480 1.2 minoura bus_dmamap_t map;
481 1.2 minoura int error, cookieflags;
482 1.2 minoura void *cookiestore;
483 1.2 minoura size_t cookiesize;
484 1.2 minoura extern paddr_t avail_end;
485 1.2 minoura
486 1.2 minoura /* Call common function to create the basic map. */
487 1.2 minoura error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
488 1.2 minoura flags, dmamp);
489 1.2 minoura if (error)
490 1.2 minoura return (error);
491 1.2 minoura
492 1.2 minoura map = *dmamp;
493 1.2 minoura map->x68k_dm_cookie = NULL;
494 1.2 minoura
495 1.2 minoura cookiesize = sizeof(struct intio_dma_cookie);
496 1.2 minoura
497 1.2 minoura /*
498 1.2 minoura * INTIO only has 24-bits of address space. This means
499 1.2 minoura * we can't DMA to pages over 16M. In order to DMA to
500 1.2 minoura * arbitrary buffers, we use "bounce buffers" - pages
501 1.2 minoura * in memory below the 16M boundary. On DMA reads,
502 1.2 minoura * DMA happens to the bounce buffers, and is copied into
503 1.2 minoura * the caller's buffer. On writes, data is copied into
504 1.2 minoura * but bounce buffer, and the DMA happens from those
505 1.2 minoura * pages. To software using the DMA mapping interface,
506 1.2 minoura * this looks simply like a data cache.
507 1.2 minoura *
508 1.2 minoura * If we have more than 16M of RAM in the system, we may
509 1.2 minoura * need bounce buffers. We check and remember that here.
510 1.2 minoura *
511 1.2 minoura * ...or, there is an opposite case. The most segments
512 1.2 minoura * a transfer will require is (maxxfer / NBPG) + 1. If
513 1.2 minoura * the caller can't handle that many segments (e.g. the
514 1.2 minoura * DMAC), we may have to bounce it as well.
515 1.2 minoura */
516 1.2 minoura if (avail_end <= t->_bounce_thresh)
517 1.2 minoura /* Bouncing not necessary due to memory size. */
518 1.2 minoura map->x68k_dm_bounce_thresh = 0;
519 1.2 minoura cookieflags = 0;
520 1.2 minoura if (map->x68k_dm_bounce_thresh != 0 ||
521 1.2 minoura ((map->x68k_dm_size / NBPG) + 1) > map->x68k_dm_segcnt) {
522 1.2 minoura cookieflags |= ID_MIGHT_NEED_BOUNCE;
523 1.2 minoura cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
524 1.2 minoura }
525 1.2 minoura
526 1.2 minoura /*
527 1.2 minoura * Allocate our cookie.
528 1.2 minoura */
529 1.2 minoura if ((cookiestore = malloc(cookiesize, M_DMAMAP,
530 1.2 minoura (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
531 1.2 minoura error = ENOMEM;
532 1.2 minoura goto out;
533 1.2 minoura }
534 1.2 minoura memset(cookiestore, 0, cookiesize);
535 1.2 minoura cookie = (struct intio_dma_cookie *)cookiestore;
536 1.2 minoura cookie->id_flags = cookieflags;
537 1.2 minoura map->x68k_dm_cookie = cookie;
538 1.2 minoura
539 1.2 minoura if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
540 1.2 minoura /*
541 1.2 minoura * Allocate the bounce pages now if the caller
542 1.2 minoura * wishes us to do so.
543 1.2 minoura */
544 1.2 minoura if ((flags & BUS_DMA_ALLOCNOW) == 0)
545 1.2 minoura goto out;
546 1.2 minoura
547 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
548 1.2 minoura }
549 1.2 minoura
550 1.2 minoura out:
551 1.2 minoura if (error) {
552 1.2 minoura if (map->x68k_dm_cookie != NULL)
553 1.2 minoura free(map->x68k_dm_cookie, M_DMAMAP);
554 1.2 minoura x68k_bus_dmamap_destroy(t, map);
555 1.2 minoura }
556 1.2 minoura return (error);
557 1.2 minoura }
558 1.2 minoura
559 1.2 minoura /*
560 1.2 minoura * Destroy an INTIO DMA map.
561 1.2 minoura */
562 1.2 minoura void
563 1.2 minoura _intio_bus_dmamap_destroy(t, map)
564 1.2 minoura bus_dma_tag_t t;
565 1.2 minoura bus_dmamap_t map;
566 1.2 minoura {
567 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
568 1.2 minoura
569 1.2 minoura /*
570 1.2 minoura * Free any bounce pages this map might hold.
571 1.2 minoura */
572 1.2 minoura if (cookie->id_flags & ID_HAS_BOUNCE)
573 1.2 minoura _intio_dma_free_bouncebuf(t, map);
574 1.2 minoura
575 1.2 minoura free(cookie, M_DMAMAP);
576 1.2 minoura x68k_bus_dmamap_destroy(t, map);
577 1.2 minoura }
578 1.2 minoura
579 1.2 minoura /*
580 1.2 minoura * Load an INTIO DMA map with a linear buffer.
581 1.2 minoura */
582 1.2 minoura int
583 1.2 minoura _intio_bus_dmamap_load(t, map, buf, buflen, p, flags)
584 1.2 minoura bus_dma_tag_t t;
585 1.2 minoura bus_dmamap_t map;
586 1.2 minoura void *buf;
587 1.2 minoura bus_size_t buflen;
588 1.2 minoura struct proc *p;
589 1.2 minoura int flags;
590 1.2 minoura {
591 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
592 1.2 minoura int error;
593 1.2 minoura
594 1.2 minoura /*
595 1.2 minoura * Make sure that on error condition we return "no valid mappings."
596 1.2 minoura */
597 1.2 minoura map->dm_mapsize = 0;
598 1.2 minoura map->dm_nsegs = 0;
599 1.2 minoura
600 1.2 minoura /*
601 1.2 minoura * Try to load the map the normal way. If this errors out,
602 1.2 minoura * and we can bounce, we will.
603 1.2 minoura */
604 1.2 minoura error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
605 1.2 minoura if (error == 0 ||
606 1.2 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
607 1.2 minoura return (error);
608 1.2 minoura
609 1.2 minoura /*
610 1.2 minoura * Allocate bounce pages, if necessary.
611 1.2 minoura */
612 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
613 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
614 1.2 minoura if (error)
615 1.2 minoura return (error);
616 1.2 minoura }
617 1.2 minoura
618 1.2 minoura /*
619 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
620 1.2 minoura * with the bounce buffer.
621 1.2 minoura */
622 1.2 minoura cookie->id_origbuf = buf;
623 1.2 minoura cookie->id_origbuflen = buflen;
624 1.2 minoura cookie->id_buftype = ID_BUFTYPE_LINEAR;
625 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
626 1.2 minoura p, flags);
627 1.2 minoura if (error) {
628 1.2 minoura /*
629 1.2 minoura * Free the bounce pages, unless our resources
630 1.2 minoura * are reserved for our exclusive use.
631 1.2 minoura */
632 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
633 1.2 minoura _intio_dma_free_bouncebuf(t, map);
634 1.2 minoura return (error);
635 1.2 minoura }
636 1.2 minoura
637 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
638 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
639 1.2 minoura return (0);
640 1.2 minoura }
641 1.2 minoura
642 1.2 minoura /*
643 1.2 minoura * Like _intio_bus_dmamap_load(), but for mbufs.
644 1.2 minoura */
645 1.2 minoura int
646 1.2 minoura _intio_bus_dmamap_load_mbuf(t, map, m0, flags)
647 1.2 minoura bus_dma_tag_t t;
648 1.2 minoura bus_dmamap_t map;
649 1.2 minoura struct mbuf *m0;
650 1.2 minoura int flags;
651 1.2 minoura {
652 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
653 1.2 minoura int error;
654 1.2 minoura
655 1.2 minoura /*
656 1.2 minoura * Make sure on error condition we return "no valid mappings."
657 1.2 minoura */
658 1.2 minoura map->dm_mapsize = 0;
659 1.2 minoura map->dm_nsegs = 0;
660 1.2 minoura
661 1.2 minoura #ifdef DIAGNOSTIC
662 1.2 minoura if ((m0->m_flags & M_PKTHDR) == 0)
663 1.2 minoura panic("_intio_bus_dmamap_load_mbuf: no packet header");
664 1.2 minoura #endif
665 1.2 minoura
666 1.2 minoura if (m0->m_pkthdr.len > map->x68k_dm_size)
667 1.2 minoura return (EINVAL);
668 1.2 minoura
669 1.2 minoura /*
670 1.2 minoura * Try to load the map the normal way. If this errors out,
671 1.2 minoura * and we can bounce, we will.
672 1.2 minoura */
673 1.2 minoura error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
674 1.2 minoura if (error == 0 ||
675 1.2 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
676 1.2 minoura return (error);
677 1.2 minoura
678 1.2 minoura /*
679 1.2 minoura * Allocate bounce pages, if necessary.
680 1.2 minoura */
681 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
682 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
683 1.2 minoura flags);
684 1.2 minoura if (error)
685 1.2 minoura return (error);
686 1.2 minoura }
687 1.2 minoura
688 1.2 minoura /*
689 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
690 1.2 minoura * with the bounce buffer.
691 1.2 minoura */
692 1.2 minoura cookie->id_origbuf = m0;
693 1.2 minoura cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
694 1.2 minoura cookie->id_buftype = ID_BUFTYPE_MBUF;
695 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
696 1.2 minoura m0->m_pkthdr.len, NULL, flags);
697 1.2 minoura if (error) {
698 1.2 minoura /*
699 1.2 minoura * Free the bounce pages, unless our resources
700 1.2 minoura * are reserved for our exclusive use.
701 1.2 minoura */
702 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
703 1.2 minoura _intio_dma_free_bouncebuf(t, map);
704 1.2 minoura return (error);
705 1.2 minoura }
706 1.2 minoura
707 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
708 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
709 1.2 minoura return (0);
710 1.2 minoura }
711 1.2 minoura
712 1.2 minoura /*
713 1.2 minoura * Like _intio_bus_dmamap_load(), but for uios.
714 1.2 minoura */
715 1.2 minoura int
716 1.2 minoura _intio_bus_dmamap_load_uio(t, map, uio, flags)
717 1.2 minoura bus_dma_tag_t t;
718 1.2 minoura bus_dmamap_t map;
719 1.2 minoura struct uio *uio;
720 1.2 minoura int flags;
721 1.2 minoura {
722 1.2 minoura panic("_intio_bus_dmamap_load_uio: not implemented");
723 1.2 minoura }
724 1.2 minoura
725 1.2 minoura /*
726 1.2 minoura * Like _intio_bus_dmamap_load(), but for raw memory allocated with
727 1.2 minoura * bus_dmamem_alloc().
728 1.2 minoura */
729 1.2 minoura int
730 1.2 minoura _intio_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
731 1.2 minoura bus_dma_tag_t t;
732 1.2 minoura bus_dmamap_t map;
733 1.2 minoura bus_dma_segment_t *segs;
734 1.2 minoura int nsegs;
735 1.2 minoura bus_size_t size;
736 1.2 minoura int flags;
737 1.2 minoura {
738 1.2 minoura
739 1.2 minoura panic("_intio_bus_dmamap_load_raw: not implemented");
740 1.2 minoura }
741 1.2 minoura
742 1.2 minoura /*
743 1.2 minoura * Unload an INTIO DMA map.
744 1.2 minoura */
745 1.2 minoura void
746 1.2 minoura _intio_bus_dmamap_unload(t, map)
747 1.2 minoura bus_dma_tag_t t;
748 1.2 minoura bus_dmamap_t map;
749 1.2 minoura {
750 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
751 1.2 minoura
752 1.2 minoura /*
753 1.2 minoura * If we have bounce pages, free them, unless they're
754 1.2 minoura * reserved for our exclusive use.
755 1.2 minoura */
756 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) &&
757 1.2 minoura (map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
758 1.2 minoura _intio_dma_free_bouncebuf(t, map);
759 1.2 minoura
760 1.2 minoura cookie->id_flags &= ~ID_IS_BOUNCING;
761 1.2 minoura cookie->id_buftype = ID_BUFTYPE_INVALID;
762 1.2 minoura
763 1.2 minoura /*
764 1.2 minoura * Do the generic bits of the unload.
765 1.2 minoura */
766 1.2 minoura x68k_bus_dmamap_unload(t, map);
767 1.2 minoura }
768 1.2 minoura
769 1.2 minoura /*
770 1.2 minoura * Synchronize an INTIO DMA map.
771 1.2 minoura */
772 1.2 minoura void
773 1.2 minoura _intio_bus_dmamap_sync(t, map, offset, len, ops)
774 1.2 minoura bus_dma_tag_t t;
775 1.2 minoura bus_dmamap_t map;
776 1.2 minoura bus_addr_t offset;
777 1.2 minoura bus_size_t len;
778 1.2 minoura int ops;
779 1.2 minoura {
780 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
781 1.2 minoura
782 1.2 minoura /*
783 1.2 minoura * Mixing PRE and POST operations is not allowed.
784 1.2 minoura */
785 1.2 minoura if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
786 1.2 minoura (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
787 1.2 minoura panic("_intio_bus_dmamap_sync: mix PRE and POST");
788 1.2 minoura
789 1.2 minoura #ifdef DIAGNOSTIC
790 1.2 minoura if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
791 1.2 minoura if (offset >= map->dm_mapsize)
792 1.2 minoura panic("_intio_bus_dmamap_sync: bad offset");
793 1.2 minoura if (len == 0 || (offset + len) > map->dm_mapsize)
794 1.2 minoura panic("_intio_bus_dmamap_sync: bad length");
795 1.2 minoura }
796 1.2 minoura #endif
797 1.2 minoura
798 1.2 minoura /*
799 1.2 minoura * If we're not bouncing, just return; nothing to do.
800 1.2 minoura */
801 1.2 minoura if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
802 1.2 minoura return;
803 1.2 minoura
804 1.2 minoura switch (cookie->id_buftype) {
805 1.2 minoura case ID_BUFTYPE_LINEAR:
806 1.2 minoura /*
807 1.2 minoura * Nothing to do for pre-read.
808 1.2 minoura */
809 1.2 minoura
810 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
811 1.2 minoura /*
812 1.2 minoura * Copy the caller's buffer to the bounce buffer.
813 1.2 minoura */
814 1.2 minoura memcpy((char *)cookie->id_bouncebuf + offset,
815 1.2 minoura (char *)cookie->id_origbuf + offset, len);
816 1.2 minoura }
817 1.2 minoura
818 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
819 1.2 minoura /*
820 1.2 minoura * Copy the bounce buffer to the caller's buffer.
821 1.2 minoura */
822 1.2 minoura memcpy((char *)cookie->id_origbuf + offset,
823 1.2 minoura (char *)cookie->id_bouncebuf + offset, len);
824 1.2 minoura }
825 1.2 minoura
826 1.2 minoura /*
827 1.2 minoura * Nothing to do for post-write.
828 1.2 minoura */
829 1.2 minoura break;
830 1.2 minoura
831 1.2 minoura case ID_BUFTYPE_MBUF:
832 1.2 minoura {
833 1.2 minoura struct mbuf *m, *m0 = cookie->id_origbuf;
834 1.2 minoura bus_size_t minlen, moff;
835 1.2 minoura
836 1.2 minoura /*
837 1.2 minoura * Nothing to do for pre-read.
838 1.2 minoura */
839 1.2 minoura
840 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
841 1.2 minoura /*
842 1.2 minoura * Copy the caller's buffer to the bounce buffer.
843 1.2 minoura */
844 1.2 minoura m_copydata(m0, offset, len,
845 1.2 minoura (char *)cookie->id_bouncebuf + offset);
846 1.2 minoura }
847 1.2 minoura
848 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
849 1.2 minoura /*
850 1.2 minoura * Copy the bounce buffer to the caller's buffer.
851 1.2 minoura */
852 1.2 minoura for (moff = offset, m = m0; m != NULL && len != 0;
853 1.2 minoura m = m->m_next) {
854 1.2 minoura /* Find the beginning mbuf. */
855 1.2 minoura if (moff >= m->m_len) {
856 1.2 minoura moff -= m->m_len;
857 1.2 minoura continue;
858 1.2 minoura }
859 1.2 minoura
860 1.2 minoura /*
861 1.2 minoura * Now at the first mbuf to sync; nail
862 1.2 minoura * each one until we have exhausted the
863 1.2 minoura * length.
864 1.2 minoura */
865 1.2 minoura minlen = len < m->m_len - moff ?
866 1.2 minoura len : m->m_len - moff;
867 1.2 minoura
868 1.2 minoura memcpy(mtod(m, caddr_t) + moff,
869 1.2 minoura (char *)cookie->id_bouncebuf + offset,
870 1.2 minoura minlen);
871 1.2 minoura
872 1.2 minoura moff = 0;
873 1.2 minoura len -= minlen;
874 1.2 minoura offset += minlen;
875 1.2 minoura }
876 1.2 minoura }
877 1.2 minoura
878 1.2 minoura /*
879 1.2 minoura * Nothing to do for post-write.
880 1.2 minoura */
881 1.2 minoura break;
882 1.2 minoura }
883 1.2 minoura
884 1.2 minoura case ID_BUFTYPE_UIO:
885 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
886 1.2 minoura break;
887 1.2 minoura
888 1.2 minoura case ID_BUFTYPE_RAW:
889 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
890 1.2 minoura break;
891 1.2 minoura
892 1.2 minoura case ID_BUFTYPE_INVALID:
893 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
894 1.2 minoura break;
895 1.2 minoura
896 1.2 minoura default:
897 1.2 minoura printf("unknown buffer type %d\n", cookie->id_buftype);
898 1.2 minoura panic("_intio_bus_dmamap_sync");
899 1.2 minoura }
900 1.2 minoura }
901 1.2 minoura
902 1.2 minoura /*
903 1.2 minoura * Allocate memory safe for INTIO DMA.
904 1.2 minoura */
905 1.2 minoura int
906 1.2 minoura _intio_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
907 1.2 minoura bus_dma_tag_t t;
908 1.2 minoura bus_size_t size, alignment, boundary;
909 1.2 minoura bus_dma_segment_t *segs;
910 1.2 minoura int nsegs;
911 1.2 minoura int *rsegs;
912 1.2 minoura int flags;
913 1.2 minoura {
914 1.2 minoura paddr_t high;
915 1.2 minoura extern paddr_t avail_end;
916 1.2 minoura
917 1.2 minoura if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
918 1.2 minoura high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
919 1.2 minoura else
920 1.2 minoura high = trunc_page(avail_end);
921 1.2 minoura
922 1.2 minoura return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
923 1.2 minoura segs, nsegs, rsegs, flags, 0, high));
924 1.2 minoura }
925 1.2 minoura
926 1.2 minoura /**********************************************************************
927 1.2 minoura * INTIO DMA utility functions
928 1.2 minoura **********************************************************************/
929 1.2 minoura
930 1.2 minoura int
931 1.2 minoura _intio_dma_alloc_bouncebuf(t, map, size, flags)
932 1.2 minoura bus_dma_tag_t t;
933 1.2 minoura bus_dmamap_t map;
934 1.2 minoura bus_size_t size;
935 1.2 minoura int flags;
936 1.2 minoura {
937 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
938 1.2 minoura int error = 0;
939 1.2 minoura
940 1.2 minoura cookie->id_bouncebuflen = round_page(size);
941 1.2 minoura error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
942 1.2 minoura NBPG, map->x68k_dm_boundary, cookie->id_bouncesegs,
943 1.2 minoura map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
944 1.2 minoura if (error)
945 1.2 minoura goto out;
946 1.2 minoura error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
947 1.2 minoura cookie->id_nbouncesegs, cookie->id_bouncebuflen,
948 1.2 minoura (caddr_t *)&cookie->id_bouncebuf, flags);
949 1.2 minoura
950 1.2 minoura out:
951 1.2 minoura if (error) {
952 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
953 1.2 minoura cookie->id_nbouncesegs);
954 1.2 minoura cookie->id_bouncebuflen = 0;
955 1.2 minoura cookie->id_nbouncesegs = 0;
956 1.2 minoura } else {
957 1.2 minoura cookie->id_flags |= ID_HAS_BOUNCE;
958 1.2 minoura }
959 1.2 minoura
960 1.2 minoura return (error);
961 1.2 minoura }
962 1.2 minoura
963 1.2 minoura void
964 1.2 minoura _intio_dma_free_bouncebuf(t, map)
965 1.2 minoura bus_dma_tag_t t;
966 1.2 minoura bus_dmamap_t map;
967 1.2 minoura {
968 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
969 1.2 minoura
970 1.2 minoura x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
971 1.2 minoura cookie->id_bouncebuflen);
972 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
973 1.2 minoura cookie->id_nbouncesegs);
974 1.2 minoura cookie->id_bouncebuflen = 0;
975 1.2 minoura cookie->id_nbouncesegs = 0;
976 1.2 minoura cookie->id_flags &= ~ID_HAS_BOUNCE;
977 1.2 minoura }
978