intio.c revision 1.32 1 1.32 isaki /* $NetBSD: intio.c,v 1.32 2007/05/12 06:31:18 isaki Exp $ */
2 1.2 minoura
3 1.7 minoura /*-
4 1.2 minoura * Copyright (c) 1998 NetBSD Foundation, Inc.
5 1.2 minoura * All rights reserved.
6 1.2 minoura *
7 1.2 minoura * Redistribution and use in source and binary forms, with or without
8 1.2 minoura * modification, are permitted provided that the following conditions
9 1.2 minoura * are met:
10 1.2 minoura * 1. Redistributions of source code must retain the above copyright
11 1.2 minoura * notice, this list of conditions and the following disclaimer.
12 1.2 minoura * 2. Redistributions in binary form must reproduce the above copyright
13 1.2 minoura * notice, this list of conditions and the following disclaimer in the
14 1.2 minoura * documentation and/or other materials provided with the distribution.
15 1.2 minoura * 3. All advertising materials mentioning features or use of this software
16 1.2 minoura * must display the following acknowledgement:
17 1.7 minoura * This product includes software developed by the NetBSD
18 1.7 minoura * Foundation, Inc. and its contributors.
19 1.7 minoura * 4. Neither the name of The NetBSD Foundation nor the names of its
20 1.7 minoura * contributors may be used to endorse or promote products derived
21 1.7 minoura * from this software without specific prior written permission.
22 1.2 minoura *
23 1.7 minoura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.7 minoura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.7 minoura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.7 minoura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.7 minoura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.7 minoura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.7 minoura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.7 minoura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.7 minoura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.7 minoura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.7 minoura * POSSIBILITY OF SUCH DAMAGE.
34 1.2 minoura */
35 1.2 minoura
36 1.2 minoura /*
37 1.2 minoura * NetBSD/x68k internal I/O virtual bus.
38 1.2 minoura */
39 1.20 lukem
40 1.20 lukem #include <sys/cdefs.h>
41 1.32 isaki __KERNEL_RCSID(0, "$NetBSD: intio.c,v 1.32 2007/05/12 06:31:18 isaki Exp $");
42 1.2 minoura
43 1.2 minoura #include <sys/param.h>
44 1.2 minoura #include <sys/systm.h>
45 1.2 minoura #include <sys/device.h>
46 1.2 minoura #include <sys/malloc.h>
47 1.2 minoura #include <sys/mbuf.h>
48 1.2 minoura #include <sys/extent.h>
49 1.9 mrg #include <uvm/uvm_extern.h>
50 1.2 minoura
51 1.2 minoura #include <machine/bus.h>
52 1.2 minoura #include <machine/cpu.h>
53 1.2 minoura #include <machine/frame.h>
54 1.2 minoura
55 1.2 minoura #include <arch/x68k/dev/intiovar.h>
56 1.2 minoura #include <arch/x68k/dev/mfp.h>
57 1.2 minoura
58 1.2 minoura
59 1.2 minoura /*
60 1.2 minoura * bus_space(9) interface
61 1.2 minoura */
62 1.25 chs static int intio_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
63 1.25 chs static void intio_bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
64 1.25 chs static int intio_bus_space_subregion(bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *);
65 1.2 minoura
66 1.2 minoura static struct x68k_bus_space intio_bus = {
67 1.2 minoura #if 0
68 1.2 minoura X68K_INTIO_BUS,
69 1.2 minoura #endif
70 1.2 minoura intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
71 1.2 minoura x68k_bus_space_alloc, x68k_bus_space_free,
72 1.2 minoura #if 0
73 1.2 minoura x68k_bus_space_barrier,
74 1.2 minoura #endif
75 1.2 minoura
76 1.2 minoura 0
77 1.2 minoura };
78 1.2 minoura
79 1.2 minoura /*
80 1.2 minoura * bus_dma(9) interface
81 1.2 minoura */
82 1.2 minoura #define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
83 1.25 chs int _intio_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int,
84 1.25 chs bus_size_t, bus_size_t, int, bus_dmamap_t *);
85 1.25 chs void _intio_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
86 1.25 chs int _intio_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
87 1.25 chs bus_size_t, struct proc *, int);
88 1.25 chs int _intio_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
89 1.25 chs struct mbuf *, int);
90 1.25 chs int _intio_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
91 1.25 chs struct uio *, int);
92 1.25 chs int _intio_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
93 1.25 chs bus_dma_segment_t *, int, bus_size_t, int);
94 1.25 chs void _intio_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
95 1.25 chs void _intio_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
96 1.25 chs bus_addr_t, bus_size_t, int);
97 1.25 chs
98 1.25 chs int _intio_bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
99 1.25 chs bus_size_t, bus_dma_segment_t *, int, int *, int);
100 1.25 chs
101 1.25 chs int _intio_dma_alloc_bouncebuf(bus_dma_tag_t, bus_dmamap_t,
102 1.25 chs bus_size_t, int);
103 1.25 chs void _intio_dma_free_bouncebuf(bus_dma_tag_t, bus_dmamap_t);
104 1.2 minoura
105 1.2 minoura struct x68k_bus_dma intio_bus_dma = {
106 1.2 minoura INTIO_DMA_BOUNCE_THRESHOLD,
107 1.2 minoura _intio_bus_dmamap_create,
108 1.2 minoura _intio_bus_dmamap_destroy,
109 1.2 minoura _intio_bus_dmamap_load,
110 1.2 minoura _intio_bus_dmamap_load_mbuf,
111 1.2 minoura _intio_bus_dmamap_load_uio,
112 1.2 minoura _intio_bus_dmamap_load_raw,
113 1.2 minoura _intio_bus_dmamap_unload,
114 1.2 minoura _intio_bus_dmamap_sync,
115 1.2 minoura _intio_bus_dmamem_alloc,
116 1.2 minoura x68k_bus_dmamem_free,
117 1.2 minoura x68k_bus_dmamem_map,
118 1.2 minoura x68k_bus_dmamem_unmap,
119 1.2 minoura x68k_bus_dmamem_mmap,
120 1.2 minoura };
121 1.2 minoura
122 1.2 minoura /*
123 1.2 minoura * autoconf stuff
124 1.2 minoura */
125 1.25 chs static int intio_match(struct device *, struct cfdata *, void *);
126 1.25 chs static void intio_attach(struct device *, struct device *, void *);
127 1.26 drochner static int intio_search(struct device *, struct cfdata *cf,
128 1.27 drochner const int *, void *);
129 1.25 chs static int intio_print(void *, const char *);
130 1.25 chs static void intio_alloc_system_ports(struct intio_softc*);
131 1.2 minoura
132 1.15 thorpej CFATTACH_DECL(intio, sizeof(struct intio_softc),
133 1.16 thorpej intio_match, intio_attach, NULL, NULL);
134 1.2 minoura
135 1.24 chs extern struct cfdriver intio_cd;
136 1.24 chs
137 1.24 chs static int intio_attached;
138 1.24 chs
139 1.2 minoura static struct intio_interrupt_vector {
140 1.2 minoura intio_intr_handler_t iiv_handler;
141 1.2 minoura void *iiv_arg;
142 1.2 minoura int iiv_intrcntoff;
143 1.5 minoura } iiv[256] = {{0,},};
144 1.2 minoura
145 1.2 minoura /* used in console initialization */
146 1.2 minoura extern int x68k_realconfig;
147 1.25 chs int x68k_config_found(struct cfdata *, struct device *, void *, cfprint_t);
148 1.2 minoura static struct cfdata *cfdata_intiobus = NULL;
149 1.2 minoura
150 1.2 minoura /* other static functions */
151 1.25 chs static int scan_intrnames(const char *);
152 1.4 minoura #ifdef DEBUG
153 1.4 minoura int intio_debug = 0;
154 1.4 minoura #endif
155 1.2 minoura
156 1.2 minoura static int
157 1.25 chs intio_match(struct device *parent, struct cfdata *cf, void *aux)
158 1.2 minoura {
159 1.25 chs
160 1.2 minoura if (strcmp(aux, intio_cd.cd_name) != 0)
161 1.2 minoura return (0);
162 1.24 chs if (intio_attached)
163 1.2 minoura return (0);
164 1.2 minoura if (x68k_realconfig == 0)
165 1.2 minoura cfdata_intiobus = cf; /* XXX */
166 1.2 minoura
167 1.2 minoura return (1);
168 1.2 minoura }
169 1.2 minoura
170 1.2 minoura
171 1.2 minoura /* used in console initialization: configure only MFP */
172 1.2 minoura static struct intio_attach_args initial_ia = {
173 1.2 minoura &intio_bus,
174 1.2 minoura 0/*XXX*/,
175 1.2 minoura
176 1.2 minoura "mfp", /* ia_name */
177 1.2 minoura MFP_ADDR, /* ia_addr */
178 1.6 minoura 0x30, /* ia_size */
179 1.2 minoura MFP_INTR, /* ia_intr */
180 1.2 minoura -1 /* ia_dma */
181 1.2 minoura -1, /* ia_dmaintr */
182 1.2 minoura };
183 1.2 minoura
184 1.2 minoura static void
185 1.25 chs intio_attach(struct device *parent, struct device *self, void *aux)
186 1.2 minoura {
187 1.2 minoura struct intio_softc *sc = (struct intio_softc *)self;
188 1.2 minoura struct intio_attach_args ia;
189 1.2 minoura
190 1.2 minoura if (self == NULL) {
191 1.2 minoura /* console only init */
192 1.2 minoura x68k_config_found(cfdata_intiobus, NULL, &initial_ia, NULL);
193 1.2 minoura return;
194 1.2 minoura }
195 1.2 minoura
196 1.24 chs intio_attached = 1;
197 1.24 chs
198 1.31 isaki printf(" mapped at %8p\n", intiobase);
199 1.2 minoura
200 1.2 minoura sc->sc_map = extent_create("intiomap",
201 1.2 minoura PHYS_INTIODEV,
202 1.2 minoura PHYS_INTIODEV + 0x400000,
203 1.22 jdolecek M_DEVBUF, NULL, 0, EX_NOWAIT);
204 1.25 chs intio_alloc_system_ports(sc);
205 1.2 minoura
206 1.2 minoura sc->sc_bst = &intio_bus;
207 1.2 minoura sc->sc_bst->x68k_bus_device = self;
208 1.2 minoura sc->sc_dmat = &intio_bus_dma;
209 1.2 minoura sc->sc_dmac = 0;
210 1.2 minoura
211 1.31 isaki memset(iiv, 0, sizeof(struct intio_interrupt_vector) * 256);
212 1.2 minoura
213 1.2 minoura ia.ia_bst = sc->sc_bst;
214 1.2 minoura ia.ia_dmat = sc->sc_dmat;
215 1.2 minoura
216 1.26 drochner config_search_ia(intio_search, self, "intio", &ia);
217 1.2 minoura }
218 1.2 minoura
219 1.2 minoura static int
220 1.26 drochner intio_search(struct device *parent, struct cfdata *cf,
221 1.27 drochner const int *ldesc, void *aux)
222 1.2 minoura {
223 1.2 minoura struct intio_attach_args *ia = aux;
224 1.2 minoura struct intio_softc *sc = (struct intio_softc *)parent;
225 1.2 minoura
226 1.2 minoura ia->ia_bst = sc->sc_bst;
227 1.2 minoura ia->ia_dmat = sc->sc_dmat;
228 1.12 thorpej ia->ia_name = cf->cf_name;
229 1.2 minoura ia->ia_addr = cf->cf_addr;
230 1.2 minoura ia->ia_intr = cf->cf_intr;
231 1.2 minoura ia->ia_dma = cf->cf_dma;
232 1.2 minoura ia->ia_dmaintr = cf->cf_dmaintr;
233 1.2 minoura
234 1.13 thorpej if (config_match(parent, cf, ia) > 0)
235 1.2 minoura config_attach(parent, cf, ia, intio_print);
236 1.2 minoura
237 1.2 minoura return (0);
238 1.2 minoura }
239 1.2 minoura
240 1.2 minoura static int
241 1.25 chs intio_print(void *aux, const char *name)
242 1.2 minoura {
243 1.2 minoura struct intio_attach_args *ia = aux;
244 1.2 minoura
245 1.2 minoura /* if (ia->ia_addr > 0) */
246 1.31 isaki aprint_normal(" addr 0x%06x", ia->ia_addr);
247 1.2 minoura if (ia->ia_intr > 0)
248 1.31 isaki aprint_normal(" intr 0x%02x", ia->ia_intr);
249 1.2 minoura if (ia->ia_dma >= 0) {
250 1.31 isaki aprint_normal(" using DMA ch%d", ia->ia_dma);
251 1.2 minoura if (ia->ia_dmaintr > 0)
252 1.31 isaki aprint_normal(" intr 0x%02x and 0x%02x",
253 1.2 minoura ia->ia_dmaintr, ia->ia_dmaintr+1);
254 1.2 minoura }
255 1.2 minoura
256 1.2 minoura return (QUIET);
257 1.2 minoura }
258 1.2 minoura
259 1.2 minoura /*
260 1.2 minoura * intio memory map manager
261 1.2 minoura */
262 1.2 minoura
263 1.2 minoura int
264 1.25 chs intio_map_allocate_region(struct device *parent, struct intio_attach_args *ia,
265 1.25 chs enum intio_map_flag flag)
266 1.2 minoura {
267 1.25 chs struct intio_softc *sc = (struct intio_softc *)parent;
268 1.2 minoura struct extent *map = sc->sc_map;
269 1.2 minoura int r;
270 1.2 minoura
271 1.31 isaki r = extent_alloc_region(map, ia->ia_addr, ia->ia_size, 0);
272 1.2 minoura #ifdef DEBUG
273 1.4 minoura if (intio_debug)
274 1.31 isaki extent_print(map);
275 1.2 minoura #endif
276 1.2 minoura if (r == 0) {
277 1.2 minoura if (flag != INTIO_MAP_ALLOCATE)
278 1.31 isaki extent_free(map, ia->ia_addr, ia->ia_size, 0);
279 1.2 minoura return 0;
280 1.32 isaki }
281 1.2 minoura
282 1.2 minoura return -1;
283 1.2 minoura }
284 1.2 minoura
285 1.2 minoura int
286 1.25 chs intio_map_free_region(struct device *parent, struct intio_attach_args *ia)
287 1.2 minoura {
288 1.2 minoura struct intio_softc *sc = (struct intio_softc*) parent;
289 1.2 minoura struct extent *map = sc->sc_map;
290 1.2 minoura
291 1.31 isaki extent_free(map, ia->ia_addr, ia->ia_size, 0);
292 1.2 minoura #ifdef DEBUG
293 1.4 minoura if (intio_debug)
294 1.31 isaki extent_print(map);
295 1.2 minoura #endif
296 1.2 minoura return 0;
297 1.2 minoura }
298 1.2 minoura
299 1.2 minoura void
300 1.25 chs intio_alloc_system_ports(struct intio_softc *sc)
301 1.2 minoura {
302 1.31 isaki extent_alloc_region(sc->sc_map, INTIO_SYSPORT, 16, 0);
303 1.31 isaki extent_alloc_region(sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
304 1.2 minoura }
305 1.2 minoura
306 1.2 minoura
307 1.2 minoura /*
308 1.2 minoura * intio bus space stuff.
309 1.2 minoura */
310 1.2 minoura static int
311 1.25 chs intio_bus_space_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size,
312 1.25 chs int flags, bus_space_handle_t *bshp)
313 1.2 minoura {
314 1.2 minoura /*
315 1.2 minoura * Intio bus is mapped permanently.
316 1.2 minoura */
317 1.2 minoura *bshp = (bus_space_handle_t)
318 1.2 minoura ((u_int) bpa - PHYS_INTIODEV + intiobase);
319 1.2 minoura /*
320 1.10 isaki * Some devices are mapped on odd or even addresses only.
321 1.2 minoura */
322 1.10 isaki if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_ODD)
323 1.2 minoura *bshp += 0x80000001;
324 1.10 isaki if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_EVEN)
325 1.10 isaki *bshp += 0x80000000;
326 1.2 minoura
327 1.2 minoura return (0);
328 1.2 minoura }
329 1.2 minoura
330 1.2 minoura static void
331 1.25 chs intio_bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
332 1.25 chs bus_size_t size)
333 1.2 minoura {
334 1.2 minoura return;
335 1.2 minoura }
336 1.2 minoura
337 1.2 minoura static int
338 1.25 chs intio_bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
339 1.25 chs bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
340 1.2 minoura {
341 1.2 minoura
342 1.2 minoura *nbshp = bsh + offset;
343 1.2 minoura return (0);
344 1.2 minoura }
345 1.2 minoura
346 1.2 minoura
347 1.2 minoura /*
348 1.2 minoura * interrupt handler
349 1.2 minoura */
350 1.2 minoura int
351 1.25 chs intio_intr_establish(int vector, const char *name, intio_intr_handler_t handler,
352 1.25 chs void *arg)
353 1.2 minoura {
354 1.2 minoura if (vector < 16)
355 1.31 isaki panic("Invalid interrupt vector");
356 1.2 minoura if (iiv[vector].iiv_handler)
357 1.2 minoura return EBUSY;
358 1.2 minoura iiv[vector].iiv_handler = handler;
359 1.2 minoura iiv[vector].iiv_arg = arg;
360 1.2 minoura iiv[vector].iiv_intrcntoff = scan_intrnames(name);
361 1.2 minoura
362 1.2 minoura return 0;
363 1.2 minoura }
364 1.2 minoura
365 1.2 minoura static int
366 1.25 chs scan_intrnames(const char *name)
367 1.2 minoura {
368 1.2 minoura extern char intrnames[];
369 1.2 minoura extern char eintrnames[];
370 1.2 minoura int r = 0;
371 1.2 minoura char *p = &intrnames[0];
372 1.2 minoura
373 1.2 minoura for (;;) {
374 1.2 minoura if (*p == 0) { /* new intr */
375 1.2 minoura if (p + strlen(name) >= eintrnames)
376 1.31 isaki panic("Interrupt statics buffer overrun.");
377 1.31 isaki strcpy(p, name);
378 1.2 minoura break;
379 1.2 minoura }
380 1.2 minoura if (strcmp(p, name) == 0)
381 1.2 minoura break;
382 1.2 minoura r++;
383 1.2 minoura while (*p++ != 0);
384 1.2 minoura }
385 1.2 minoura
386 1.2 minoura return r;
387 1.2 minoura }
388 1.2 minoura
389 1.2 minoura int
390 1.25 chs intio_intr_disestablish(int vector, void *arg)
391 1.2 minoura {
392 1.2 minoura if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
393 1.2 minoura return EINVAL;
394 1.2 minoura iiv[vector].iiv_handler = 0;
395 1.2 minoura iiv[vector].iiv_arg = 0;
396 1.2 minoura
397 1.2 minoura return 0;
398 1.2 minoura }
399 1.2 minoura
400 1.2 minoura int
401 1.25 chs intio_intr(struct frame *frame)
402 1.2 minoura {
403 1.2 minoura int vector = frame->f_vector / 4;
404 1.2 minoura extern int intrcnt[];
405 1.2 minoura
406 1.2 minoura #if 0 /* this is not correct now */
407 1.2 minoura /* CAUTION: HERE WE ARE IN SPLHIGH() */
408 1.2 minoura /* LOWER TO APPROPRIATE IPL AT VERY FIRST IN THE HANDLER!! */
409 1.2 minoura #endif
410 1.2 minoura if (iiv[vector].iiv_handler == 0) {
411 1.31 isaki printf("Stray interrupt: %d type %x, pc %x\n",
412 1.21 nsmrtks vector, frame->f_format, frame->f_pc);
413 1.2 minoura return 0;
414 1.2 minoura }
415 1.2 minoura
416 1.2 minoura intrcnt[iiv[vector].iiv_intrcntoff]++;
417 1.2 minoura
418 1.31 isaki return (*(iiv[vector].iiv_handler))(iiv[vector].iiv_arg);
419 1.2 minoura }
420 1.2 minoura
421 1.2 minoura /*
422 1.23 wiz * Intio I/O controller interrupt
423 1.2 minoura */
424 1.3 minoura static u_int8_t intio_ivec = 0;
425 1.3 minoura
426 1.2 minoura void
427 1.25 chs intio_set_ivec(int vec)
428 1.2 minoura {
429 1.2 minoura vec &= 0xfc;
430 1.2 minoura
431 1.2 minoura if (intio_ivec && intio_ivec != (vec & 0xfc))
432 1.31 isaki panic("Wrong interrupt vector for Sicilian.");
433 1.2 minoura
434 1.2 minoura intio_ivec = vec;
435 1.2 minoura intio_set_sicilian_ivec(vec);
436 1.2 minoura }
437 1.2 minoura
438 1.2 minoura
439 1.2 minoura /*
440 1.19 wiz * intio bus DMA stuff. stolen from arch/i386/isa/isa_machdep.c
441 1.2 minoura */
442 1.2 minoura
443 1.2 minoura /*
444 1.2 minoura * Create an INTIO DMA map.
445 1.2 minoura */
446 1.2 minoura int
447 1.25 chs _intio_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
448 1.25 chs bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
449 1.2 minoura {
450 1.2 minoura struct intio_dma_cookie *cookie;
451 1.2 minoura bus_dmamap_t map;
452 1.2 minoura int error, cookieflags;
453 1.2 minoura void *cookiestore;
454 1.2 minoura size_t cookiesize;
455 1.2 minoura extern paddr_t avail_end;
456 1.2 minoura
457 1.2 minoura /* Call common function to create the basic map. */
458 1.2 minoura error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
459 1.2 minoura flags, dmamp);
460 1.2 minoura if (error)
461 1.2 minoura return (error);
462 1.2 minoura
463 1.2 minoura map = *dmamp;
464 1.2 minoura map->x68k_dm_cookie = NULL;
465 1.2 minoura
466 1.2 minoura cookiesize = sizeof(struct intio_dma_cookie);
467 1.2 minoura
468 1.2 minoura /*
469 1.2 minoura * INTIO only has 24-bits of address space. This means
470 1.2 minoura * we can't DMA to pages over 16M. In order to DMA to
471 1.2 minoura * arbitrary buffers, we use "bounce buffers" - pages
472 1.2 minoura * in memory below the 16M boundary. On DMA reads,
473 1.2 minoura * DMA happens to the bounce buffers, and is copied into
474 1.2 minoura * the caller's buffer. On writes, data is copied into
475 1.2 minoura * but bounce buffer, and the DMA happens from those
476 1.2 minoura * pages. To software using the DMA mapping interface,
477 1.2 minoura * this looks simply like a data cache.
478 1.2 minoura *
479 1.2 minoura * If we have more than 16M of RAM in the system, we may
480 1.2 minoura * need bounce buffers. We check and remember that here.
481 1.2 minoura *
482 1.2 minoura * ...or, there is an opposite case. The most segments
483 1.18 thorpej * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
484 1.2 minoura * the caller can't handle that many segments (e.g. the
485 1.2 minoura * DMAC), we may have to bounce it as well.
486 1.2 minoura */
487 1.2 minoura if (avail_end <= t->_bounce_thresh)
488 1.32 isaki /* Bouncing not necessary due to memory size. */
489 1.2 minoura map->x68k_dm_bounce_thresh = 0;
490 1.2 minoura cookieflags = 0;
491 1.2 minoura if (map->x68k_dm_bounce_thresh != 0 ||
492 1.18 thorpej ((map->x68k_dm_size / PAGE_SIZE) + 1) > map->x68k_dm_segcnt) {
493 1.2 minoura cookieflags |= ID_MIGHT_NEED_BOUNCE;
494 1.2 minoura cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
495 1.2 minoura }
496 1.2 minoura
497 1.2 minoura /*
498 1.2 minoura * Allocate our cookie.
499 1.2 minoura */
500 1.2 minoura if ((cookiestore = malloc(cookiesize, M_DMAMAP,
501 1.2 minoura (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
502 1.2 minoura error = ENOMEM;
503 1.2 minoura goto out;
504 1.2 minoura }
505 1.2 minoura memset(cookiestore, 0, cookiesize);
506 1.2 minoura cookie = (struct intio_dma_cookie *)cookiestore;
507 1.2 minoura cookie->id_flags = cookieflags;
508 1.2 minoura map->x68k_dm_cookie = cookie;
509 1.2 minoura
510 1.2 minoura if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
511 1.2 minoura /*
512 1.2 minoura * Allocate the bounce pages now if the caller
513 1.2 minoura * wishes us to do so.
514 1.2 minoura */
515 1.2 minoura if ((flags & BUS_DMA_ALLOCNOW) == 0)
516 1.2 minoura goto out;
517 1.2 minoura
518 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
519 1.2 minoura }
520 1.2 minoura
521 1.2 minoura out:
522 1.2 minoura if (error) {
523 1.2 minoura if (map->x68k_dm_cookie != NULL)
524 1.2 minoura free(map->x68k_dm_cookie, M_DMAMAP);
525 1.2 minoura x68k_bus_dmamap_destroy(t, map);
526 1.2 minoura }
527 1.2 minoura return (error);
528 1.2 minoura }
529 1.2 minoura
530 1.2 minoura /*
531 1.2 minoura * Destroy an INTIO DMA map.
532 1.2 minoura */
533 1.2 minoura void
534 1.25 chs _intio_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
535 1.2 minoura {
536 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
537 1.2 minoura
538 1.2 minoura /*
539 1.2 minoura * Free any bounce pages this map might hold.
540 1.2 minoura */
541 1.2 minoura if (cookie->id_flags & ID_HAS_BOUNCE)
542 1.2 minoura _intio_dma_free_bouncebuf(t, map);
543 1.2 minoura
544 1.2 minoura free(cookie, M_DMAMAP);
545 1.2 minoura x68k_bus_dmamap_destroy(t, map);
546 1.2 minoura }
547 1.2 minoura
548 1.2 minoura /*
549 1.2 minoura * Load an INTIO DMA map with a linear buffer.
550 1.2 minoura */
551 1.2 minoura int
552 1.25 chs _intio_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
553 1.25 chs bus_size_t buflen, struct proc *p, int flags)
554 1.2 minoura {
555 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
556 1.2 minoura int error;
557 1.2 minoura
558 1.2 minoura /*
559 1.2 minoura * Make sure that on error condition we return "no valid mappings."
560 1.2 minoura */
561 1.2 minoura map->dm_mapsize = 0;
562 1.2 minoura map->dm_nsegs = 0;
563 1.2 minoura
564 1.2 minoura /*
565 1.2 minoura * Try to load the map the normal way. If this errors out,
566 1.2 minoura * and we can bounce, we will.
567 1.2 minoura */
568 1.2 minoura error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
569 1.2 minoura if (error == 0 ||
570 1.2 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
571 1.2 minoura return (error);
572 1.2 minoura
573 1.2 minoura /*
574 1.2 minoura * Allocate bounce pages, if necessary.
575 1.2 minoura */
576 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
577 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
578 1.2 minoura if (error)
579 1.2 minoura return (error);
580 1.2 minoura }
581 1.2 minoura
582 1.2 minoura /*
583 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
584 1.2 minoura * with the bounce buffer.
585 1.2 minoura */
586 1.2 minoura cookie->id_origbuf = buf;
587 1.2 minoura cookie->id_origbuflen = buflen;
588 1.2 minoura cookie->id_buftype = ID_BUFTYPE_LINEAR;
589 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
590 1.2 minoura p, flags);
591 1.2 minoura if (error) {
592 1.2 minoura /*
593 1.2 minoura * Free the bounce pages, unless our resources
594 1.2 minoura * are reserved for our exclusive use.
595 1.2 minoura */
596 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
597 1.2 minoura _intio_dma_free_bouncebuf(t, map);
598 1.2 minoura return (error);
599 1.2 minoura }
600 1.2 minoura
601 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
602 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
603 1.2 minoura return (0);
604 1.2 minoura }
605 1.2 minoura
606 1.2 minoura /*
607 1.2 minoura * Like _intio_bus_dmamap_load(), but for mbufs.
608 1.2 minoura */
609 1.2 minoura int
610 1.25 chs _intio_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
611 1.25 chs int flags)
612 1.2 minoura {
613 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
614 1.2 minoura int error;
615 1.2 minoura
616 1.2 minoura /*
617 1.2 minoura * Make sure on error condition we return "no valid mappings."
618 1.2 minoura */
619 1.2 minoura map->dm_mapsize = 0;
620 1.2 minoura map->dm_nsegs = 0;
621 1.2 minoura
622 1.2 minoura #ifdef DIAGNOSTIC
623 1.2 minoura if ((m0->m_flags & M_PKTHDR) == 0)
624 1.2 minoura panic("_intio_bus_dmamap_load_mbuf: no packet header");
625 1.2 minoura #endif
626 1.2 minoura
627 1.2 minoura if (m0->m_pkthdr.len > map->x68k_dm_size)
628 1.2 minoura return (EINVAL);
629 1.2 minoura
630 1.2 minoura /*
631 1.2 minoura * Try to load the map the normal way. If this errors out,
632 1.2 minoura * and we can bounce, we will.
633 1.2 minoura */
634 1.2 minoura error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
635 1.2 minoura if (error == 0 ||
636 1.2 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
637 1.2 minoura return (error);
638 1.2 minoura
639 1.2 minoura /*
640 1.2 minoura * Allocate bounce pages, if necessary.
641 1.2 minoura */
642 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
643 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
644 1.2 minoura flags);
645 1.2 minoura if (error)
646 1.2 minoura return (error);
647 1.2 minoura }
648 1.2 minoura
649 1.2 minoura /*
650 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
651 1.2 minoura * with the bounce buffer.
652 1.2 minoura */
653 1.2 minoura cookie->id_origbuf = m0;
654 1.2 minoura cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
655 1.2 minoura cookie->id_buftype = ID_BUFTYPE_MBUF;
656 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
657 1.2 minoura m0->m_pkthdr.len, NULL, flags);
658 1.2 minoura if (error) {
659 1.2 minoura /*
660 1.2 minoura * Free the bounce pages, unless our resources
661 1.2 minoura * are reserved for our exclusive use.
662 1.2 minoura */
663 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
664 1.2 minoura _intio_dma_free_bouncebuf(t, map);
665 1.2 minoura return (error);
666 1.2 minoura }
667 1.2 minoura
668 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
669 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
670 1.2 minoura return (0);
671 1.2 minoura }
672 1.2 minoura
673 1.2 minoura /*
674 1.2 minoura * Like _intio_bus_dmamap_load(), but for uios.
675 1.2 minoura */
676 1.2 minoura int
677 1.25 chs _intio_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
678 1.25 chs int flags)
679 1.2 minoura {
680 1.2 minoura panic("_intio_bus_dmamap_load_uio: not implemented");
681 1.2 minoura }
682 1.2 minoura
683 1.2 minoura /*
684 1.2 minoura * Like _intio_bus_dmamap_load(), but for raw memory allocated with
685 1.2 minoura * bus_dmamem_alloc().
686 1.2 minoura */
687 1.2 minoura int
688 1.25 chs _intio_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
689 1.25 chs bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
690 1.2 minoura {
691 1.2 minoura
692 1.2 minoura panic("_intio_bus_dmamap_load_raw: not implemented");
693 1.2 minoura }
694 1.2 minoura
695 1.2 minoura /*
696 1.2 minoura * Unload an INTIO DMA map.
697 1.2 minoura */
698 1.2 minoura void
699 1.25 chs _intio_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
700 1.2 minoura {
701 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
702 1.2 minoura
703 1.2 minoura /*
704 1.2 minoura * If we have bounce pages, free them, unless they're
705 1.2 minoura * reserved for our exclusive use.
706 1.2 minoura */
707 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) &&
708 1.2 minoura (map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
709 1.2 minoura _intio_dma_free_bouncebuf(t, map);
710 1.2 minoura
711 1.2 minoura cookie->id_flags &= ~ID_IS_BOUNCING;
712 1.2 minoura cookie->id_buftype = ID_BUFTYPE_INVALID;
713 1.2 minoura
714 1.2 minoura /*
715 1.2 minoura * Do the generic bits of the unload.
716 1.2 minoura */
717 1.2 minoura x68k_bus_dmamap_unload(t, map);
718 1.2 minoura }
719 1.2 minoura
720 1.2 minoura /*
721 1.2 minoura * Synchronize an INTIO DMA map.
722 1.2 minoura */
723 1.2 minoura void
724 1.25 chs _intio_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
725 1.25 chs bus_size_t len, int ops)
726 1.2 minoura {
727 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
728 1.2 minoura
729 1.2 minoura /*
730 1.2 minoura * Mixing PRE and POST operations is not allowed.
731 1.2 minoura */
732 1.2 minoura if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
733 1.2 minoura (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
734 1.2 minoura panic("_intio_bus_dmamap_sync: mix PRE and POST");
735 1.2 minoura
736 1.2 minoura #ifdef DIAGNOSTIC
737 1.2 minoura if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
738 1.2 minoura if (offset >= map->dm_mapsize)
739 1.2 minoura panic("_intio_bus_dmamap_sync: bad offset");
740 1.2 minoura if (len == 0 || (offset + len) > map->dm_mapsize)
741 1.2 minoura panic("_intio_bus_dmamap_sync: bad length");
742 1.2 minoura }
743 1.2 minoura #endif
744 1.2 minoura
745 1.2 minoura /*
746 1.2 minoura * If we're not bouncing, just return; nothing to do.
747 1.2 minoura */
748 1.2 minoura if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
749 1.2 minoura return;
750 1.2 minoura
751 1.2 minoura switch (cookie->id_buftype) {
752 1.2 minoura case ID_BUFTYPE_LINEAR:
753 1.2 minoura /*
754 1.2 minoura * Nothing to do for pre-read.
755 1.2 minoura */
756 1.2 minoura
757 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
758 1.2 minoura /*
759 1.2 minoura * Copy the caller's buffer to the bounce buffer.
760 1.2 minoura */
761 1.2 minoura memcpy((char *)cookie->id_bouncebuf + offset,
762 1.2 minoura (char *)cookie->id_origbuf + offset, len);
763 1.2 minoura }
764 1.2 minoura
765 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
766 1.2 minoura /*
767 1.2 minoura * Copy the bounce buffer to the caller's buffer.
768 1.2 minoura */
769 1.2 minoura memcpy((char *)cookie->id_origbuf + offset,
770 1.2 minoura (char *)cookie->id_bouncebuf + offset, len);
771 1.2 minoura }
772 1.2 minoura
773 1.2 minoura /*
774 1.2 minoura * Nothing to do for post-write.
775 1.2 minoura */
776 1.2 minoura break;
777 1.2 minoura
778 1.2 minoura case ID_BUFTYPE_MBUF:
779 1.2 minoura {
780 1.2 minoura struct mbuf *m, *m0 = cookie->id_origbuf;
781 1.2 minoura bus_size_t minlen, moff;
782 1.2 minoura
783 1.2 minoura /*
784 1.2 minoura * Nothing to do for pre-read.
785 1.2 minoura */
786 1.2 minoura
787 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
788 1.2 minoura /*
789 1.2 minoura * Copy the caller's buffer to the bounce buffer.
790 1.2 minoura */
791 1.2 minoura m_copydata(m0, offset, len,
792 1.2 minoura (char *)cookie->id_bouncebuf + offset);
793 1.2 minoura }
794 1.2 minoura
795 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
796 1.2 minoura /*
797 1.2 minoura * Copy the bounce buffer to the caller's buffer.
798 1.2 minoura */
799 1.2 minoura for (moff = offset, m = m0; m != NULL && len != 0;
800 1.2 minoura m = m->m_next) {
801 1.2 minoura /* Find the beginning mbuf. */
802 1.2 minoura if (moff >= m->m_len) {
803 1.2 minoura moff -= m->m_len;
804 1.2 minoura continue;
805 1.2 minoura }
806 1.2 minoura
807 1.2 minoura /*
808 1.2 minoura * Now at the first mbuf to sync; nail
809 1.2 minoura * each one until we have exhausted the
810 1.2 minoura * length.
811 1.2 minoura */
812 1.2 minoura minlen = len < m->m_len - moff ?
813 1.2 minoura len : m->m_len - moff;
814 1.2 minoura
815 1.30 he memcpy(mtod(m, char *) + moff,
816 1.2 minoura (char *)cookie->id_bouncebuf + offset,
817 1.2 minoura minlen);
818 1.2 minoura
819 1.2 minoura moff = 0;
820 1.2 minoura len -= minlen;
821 1.2 minoura offset += minlen;
822 1.2 minoura }
823 1.2 minoura }
824 1.2 minoura
825 1.2 minoura /*
826 1.2 minoura * Nothing to do for post-write.
827 1.2 minoura */
828 1.2 minoura break;
829 1.2 minoura }
830 1.2 minoura
831 1.2 minoura case ID_BUFTYPE_UIO:
832 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
833 1.2 minoura break;
834 1.2 minoura
835 1.2 minoura case ID_BUFTYPE_RAW:
836 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
837 1.2 minoura break;
838 1.2 minoura
839 1.2 minoura case ID_BUFTYPE_INVALID:
840 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
841 1.2 minoura break;
842 1.2 minoura
843 1.2 minoura default:
844 1.2 minoura printf("unknown buffer type %d\n", cookie->id_buftype);
845 1.2 minoura panic("_intio_bus_dmamap_sync");
846 1.2 minoura }
847 1.2 minoura }
848 1.2 minoura
849 1.2 minoura /*
850 1.2 minoura * Allocate memory safe for INTIO DMA.
851 1.2 minoura */
852 1.2 minoura int
853 1.25 chs _intio_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
854 1.25 chs bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
855 1.25 chs int flags)
856 1.2 minoura {
857 1.2 minoura paddr_t high;
858 1.2 minoura extern paddr_t avail_end;
859 1.2 minoura
860 1.2 minoura if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
861 1.2 minoura high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
862 1.2 minoura else
863 1.2 minoura high = trunc_page(avail_end);
864 1.2 minoura
865 1.2 minoura return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
866 1.2 minoura segs, nsegs, rsegs, flags, 0, high));
867 1.2 minoura }
868 1.2 minoura
869 1.2 minoura /**********************************************************************
870 1.2 minoura * INTIO DMA utility functions
871 1.2 minoura **********************************************************************/
872 1.2 minoura
873 1.2 minoura int
874 1.25 chs _intio_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, bus_size_t size,
875 1.25 chs int flags)
876 1.2 minoura {
877 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
878 1.2 minoura int error = 0;
879 1.2 minoura
880 1.2 minoura cookie->id_bouncebuflen = round_page(size);
881 1.2 minoura error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
882 1.18 thorpej PAGE_SIZE, map->x68k_dm_boundary, cookie->id_bouncesegs,
883 1.2 minoura map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
884 1.2 minoura if (error)
885 1.2 minoura goto out;
886 1.2 minoura error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
887 1.2 minoura cookie->id_nbouncesegs, cookie->id_bouncebuflen,
888 1.29 christos (void **)&cookie->id_bouncebuf, flags);
889 1.2 minoura
890 1.2 minoura out:
891 1.2 minoura if (error) {
892 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
893 1.2 minoura cookie->id_nbouncesegs);
894 1.2 minoura cookie->id_bouncebuflen = 0;
895 1.2 minoura cookie->id_nbouncesegs = 0;
896 1.2 minoura } else {
897 1.2 minoura cookie->id_flags |= ID_HAS_BOUNCE;
898 1.2 minoura }
899 1.2 minoura
900 1.2 minoura return (error);
901 1.2 minoura }
902 1.2 minoura
903 1.2 minoura void
904 1.25 chs _intio_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map)
905 1.2 minoura {
906 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
907 1.2 minoura
908 1.2 minoura x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
909 1.2 minoura cookie->id_bouncebuflen);
910 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
911 1.2 minoura cookie->id_nbouncesegs);
912 1.2 minoura cookie->id_bouncebuflen = 0;
913 1.2 minoura cookie->id_nbouncesegs = 0;
914 1.2 minoura cookie->id_flags &= ~ID_HAS_BOUNCE;
915 1.2 minoura }
916