intio.c revision 1.36 1 1.36 isaki /* $NetBSD: intio.c,v 1.36 2008/06/23 08:33:38 isaki Exp $ */
2 1.2 minoura
3 1.7 minoura /*-
4 1.35 martin * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.2 minoura * All rights reserved.
6 1.2 minoura *
7 1.2 minoura * Redistribution and use in source and binary forms, with or without
8 1.2 minoura * modification, are permitted provided that the following conditions
9 1.2 minoura * are met:
10 1.2 minoura * 1. Redistributions of source code must retain the above copyright
11 1.2 minoura * notice, this list of conditions and the following disclaimer.
12 1.2 minoura * 2. Redistributions in binary form must reproduce the above copyright
13 1.2 minoura * notice, this list of conditions and the following disclaimer in the
14 1.2 minoura * documentation and/or other materials provided with the distribution.
15 1.2 minoura *
16 1.7 minoura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.7 minoura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.7 minoura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.7 minoura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.7 minoura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.7 minoura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.7 minoura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.7 minoura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.7 minoura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.7 minoura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.7 minoura * POSSIBILITY OF SUCH DAMAGE.
27 1.2 minoura */
28 1.2 minoura
29 1.2 minoura /*
30 1.2 minoura * NetBSD/x68k internal I/O virtual bus.
31 1.2 minoura */
32 1.20 lukem
33 1.20 lukem #include <sys/cdefs.h>
34 1.36 isaki __KERNEL_RCSID(0, "$NetBSD: intio.c,v 1.36 2008/06/23 08:33:38 isaki Exp $");
35 1.2 minoura
36 1.2 minoura #include <sys/param.h>
37 1.2 minoura #include <sys/systm.h>
38 1.2 minoura #include <sys/device.h>
39 1.2 minoura #include <sys/malloc.h>
40 1.2 minoura #include <sys/mbuf.h>
41 1.2 minoura #include <sys/extent.h>
42 1.9 mrg #include <uvm/uvm_extern.h>
43 1.2 minoura
44 1.2 minoura #include <machine/bus.h>
45 1.2 minoura #include <machine/cpu.h>
46 1.2 minoura #include <machine/frame.h>
47 1.2 minoura
48 1.2 minoura #include <arch/x68k/dev/intiovar.h>
49 1.2 minoura #include <arch/x68k/dev/mfp.h>
50 1.2 minoura
51 1.2 minoura
52 1.2 minoura /*
53 1.2 minoura * bus_space(9) interface
54 1.2 minoura */
55 1.25 chs static int intio_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
56 1.25 chs static void intio_bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
57 1.25 chs static int intio_bus_space_subregion(bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *);
58 1.2 minoura
59 1.2 minoura static struct x68k_bus_space intio_bus = {
60 1.2 minoura #if 0
61 1.2 minoura X68K_INTIO_BUS,
62 1.2 minoura #endif
63 1.2 minoura intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
64 1.2 minoura x68k_bus_space_alloc, x68k_bus_space_free,
65 1.2 minoura #if 0
66 1.2 minoura x68k_bus_space_barrier,
67 1.2 minoura #endif
68 1.2 minoura
69 1.2 minoura 0
70 1.2 minoura };
71 1.2 minoura
72 1.2 minoura /*
73 1.2 minoura * bus_dma(9) interface
74 1.2 minoura */
75 1.2 minoura #define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
76 1.25 chs int _intio_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int,
77 1.25 chs bus_size_t, bus_size_t, int, bus_dmamap_t *);
78 1.25 chs void _intio_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
79 1.25 chs int _intio_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
80 1.25 chs bus_size_t, struct proc *, int);
81 1.25 chs int _intio_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
82 1.25 chs struct mbuf *, int);
83 1.25 chs int _intio_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
84 1.25 chs struct uio *, int);
85 1.25 chs int _intio_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
86 1.25 chs bus_dma_segment_t *, int, bus_size_t, int);
87 1.25 chs void _intio_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
88 1.25 chs void _intio_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
89 1.25 chs bus_addr_t, bus_size_t, int);
90 1.25 chs
91 1.25 chs int _intio_bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
92 1.25 chs bus_size_t, bus_dma_segment_t *, int, int *, int);
93 1.25 chs
94 1.25 chs int _intio_dma_alloc_bouncebuf(bus_dma_tag_t, bus_dmamap_t,
95 1.25 chs bus_size_t, int);
96 1.25 chs void _intio_dma_free_bouncebuf(bus_dma_tag_t, bus_dmamap_t);
97 1.2 minoura
98 1.2 minoura struct x68k_bus_dma intio_bus_dma = {
99 1.2 minoura INTIO_DMA_BOUNCE_THRESHOLD,
100 1.2 minoura _intio_bus_dmamap_create,
101 1.2 minoura _intio_bus_dmamap_destroy,
102 1.2 minoura _intio_bus_dmamap_load,
103 1.2 minoura _intio_bus_dmamap_load_mbuf,
104 1.2 minoura _intio_bus_dmamap_load_uio,
105 1.2 minoura _intio_bus_dmamap_load_raw,
106 1.2 minoura _intio_bus_dmamap_unload,
107 1.2 minoura _intio_bus_dmamap_sync,
108 1.2 minoura _intio_bus_dmamem_alloc,
109 1.2 minoura x68k_bus_dmamem_free,
110 1.2 minoura x68k_bus_dmamem_map,
111 1.2 minoura x68k_bus_dmamem_unmap,
112 1.2 minoura x68k_bus_dmamem_mmap,
113 1.2 minoura };
114 1.2 minoura
115 1.2 minoura /*
116 1.2 minoura * autoconf stuff
117 1.2 minoura */
118 1.25 chs static int intio_match(struct device *, struct cfdata *, void *);
119 1.25 chs static void intio_attach(struct device *, struct device *, void *);
120 1.26 drochner static int intio_search(struct device *, struct cfdata *cf,
121 1.27 drochner const int *, void *);
122 1.25 chs static int intio_print(void *, const char *);
123 1.25 chs static void intio_alloc_system_ports(struct intio_softc*);
124 1.2 minoura
125 1.15 thorpej CFATTACH_DECL(intio, sizeof(struct intio_softc),
126 1.16 thorpej intio_match, intio_attach, NULL, NULL);
127 1.2 minoura
128 1.24 chs extern struct cfdriver intio_cd;
129 1.24 chs
130 1.24 chs static int intio_attached;
131 1.24 chs
132 1.2 minoura static struct intio_interrupt_vector {
133 1.2 minoura intio_intr_handler_t iiv_handler;
134 1.2 minoura void *iiv_arg;
135 1.36 isaki struct evcnt *iiv_evcnt;
136 1.5 minoura } iiv[256] = {{0,},};
137 1.2 minoura
138 1.2 minoura /* used in console initialization */
139 1.2 minoura extern int x68k_realconfig;
140 1.25 chs int x68k_config_found(struct cfdata *, struct device *, void *, cfprint_t);
141 1.2 minoura static struct cfdata *cfdata_intiobus = NULL;
142 1.2 minoura
143 1.4 minoura #ifdef DEBUG
144 1.4 minoura int intio_debug = 0;
145 1.4 minoura #endif
146 1.2 minoura
147 1.2 minoura static int
148 1.25 chs intio_match(struct device *parent, struct cfdata *cf, void *aux)
149 1.2 minoura {
150 1.25 chs
151 1.2 minoura if (strcmp(aux, intio_cd.cd_name) != 0)
152 1.2 minoura return (0);
153 1.24 chs if (intio_attached)
154 1.2 minoura return (0);
155 1.2 minoura if (x68k_realconfig == 0)
156 1.2 minoura cfdata_intiobus = cf; /* XXX */
157 1.2 minoura
158 1.2 minoura return (1);
159 1.2 minoura }
160 1.2 minoura
161 1.2 minoura
162 1.2 minoura /* used in console initialization: configure only MFP */
163 1.2 minoura static struct intio_attach_args initial_ia = {
164 1.2 minoura &intio_bus,
165 1.2 minoura 0/*XXX*/,
166 1.2 minoura
167 1.2 minoura "mfp", /* ia_name */
168 1.2 minoura MFP_ADDR, /* ia_addr */
169 1.6 minoura 0x30, /* ia_size */
170 1.2 minoura MFP_INTR, /* ia_intr */
171 1.2 minoura -1 /* ia_dma */
172 1.2 minoura -1, /* ia_dmaintr */
173 1.2 minoura };
174 1.2 minoura
175 1.2 minoura static void
176 1.25 chs intio_attach(struct device *parent, struct device *self, void *aux)
177 1.2 minoura {
178 1.2 minoura struct intio_softc *sc = (struct intio_softc *)self;
179 1.2 minoura struct intio_attach_args ia;
180 1.2 minoura
181 1.2 minoura if (self == NULL) {
182 1.2 minoura /* console only init */
183 1.2 minoura x68k_config_found(cfdata_intiobus, NULL, &initial_ia, NULL);
184 1.2 minoura return;
185 1.2 minoura }
186 1.2 minoura
187 1.24 chs intio_attached = 1;
188 1.24 chs
189 1.31 isaki printf(" mapped at %8p\n", intiobase);
190 1.2 minoura
191 1.2 minoura sc->sc_map = extent_create("intiomap",
192 1.2 minoura PHYS_INTIODEV,
193 1.2 minoura PHYS_INTIODEV + 0x400000,
194 1.22 jdolecek M_DEVBUF, NULL, 0, EX_NOWAIT);
195 1.25 chs intio_alloc_system_ports(sc);
196 1.2 minoura
197 1.2 minoura sc->sc_bst = &intio_bus;
198 1.2 minoura sc->sc_bst->x68k_bus_device = self;
199 1.2 minoura sc->sc_dmat = &intio_bus_dma;
200 1.2 minoura sc->sc_dmac = 0;
201 1.2 minoura
202 1.31 isaki memset(iiv, 0, sizeof(struct intio_interrupt_vector) * 256);
203 1.2 minoura
204 1.2 minoura ia.ia_bst = sc->sc_bst;
205 1.2 minoura ia.ia_dmat = sc->sc_dmat;
206 1.2 minoura
207 1.26 drochner config_search_ia(intio_search, self, "intio", &ia);
208 1.2 minoura }
209 1.2 minoura
210 1.2 minoura static int
211 1.26 drochner intio_search(struct device *parent, struct cfdata *cf,
212 1.27 drochner const int *ldesc, void *aux)
213 1.2 minoura {
214 1.2 minoura struct intio_attach_args *ia = aux;
215 1.2 minoura struct intio_softc *sc = (struct intio_softc *)parent;
216 1.2 minoura
217 1.2 minoura ia->ia_bst = sc->sc_bst;
218 1.2 minoura ia->ia_dmat = sc->sc_dmat;
219 1.12 thorpej ia->ia_name = cf->cf_name;
220 1.2 minoura ia->ia_addr = cf->cf_addr;
221 1.2 minoura ia->ia_intr = cf->cf_intr;
222 1.2 minoura ia->ia_dma = cf->cf_dma;
223 1.2 minoura ia->ia_dmaintr = cf->cf_dmaintr;
224 1.2 minoura
225 1.13 thorpej if (config_match(parent, cf, ia) > 0)
226 1.2 minoura config_attach(parent, cf, ia, intio_print);
227 1.2 minoura
228 1.2 minoura return (0);
229 1.2 minoura }
230 1.2 minoura
231 1.2 minoura static int
232 1.25 chs intio_print(void *aux, const char *name)
233 1.2 minoura {
234 1.2 minoura struct intio_attach_args *ia = aux;
235 1.2 minoura
236 1.2 minoura /* if (ia->ia_addr > 0) */
237 1.31 isaki aprint_normal(" addr 0x%06x", ia->ia_addr);
238 1.2 minoura if (ia->ia_intr > 0)
239 1.31 isaki aprint_normal(" intr 0x%02x", ia->ia_intr);
240 1.2 minoura if (ia->ia_dma >= 0) {
241 1.31 isaki aprint_normal(" using DMA ch%d", ia->ia_dma);
242 1.2 minoura if (ia->ia_dmaintr > 0)
243 1.31 isaki aprint_normal(" intr 0x%02x and 0x%02x",
244 1.2 minoura ia->ia_dmaintr, ia->ia_dmaintr+1);
245 1.2 minoura }
246 1.2 minoura
247 1.2 minoura return (QUIET);
248 1.2 minoura }
249 1.2 minoura
250 1.2 minoura /*
251 1.2 minoura * intio memory map manager
252 1.2 minoura */
253 1.2 minoura
254 1.2 minoura int
255 1.25 chs intio_map_allocate_region(struct device *parent, struct intio_attach_args *ia,
256 1.25 chs enum intio_map_flag flag)
257 1.2 minoura {
258 1.25 chs struct intio_softc *sc = (struct intio_softc *)parent;
259 1.2 minoura struct extent *map = sc->sc_map;
260 1.2 minoura int r;
261 1.2 minoura
262 1.31 isaki r = extent_alloc_region(map, ia->ia_addr, ia->ia_size, 0);
263 1.2 minoura #ifdef DEBUG
264 1.4 minoura if (intio_debug)
265 1.31 isaki extent_print(map);
266 1.2 minoura #endif
267 1.2 minoura if (r == 0) {
268 1.2 minoura if (flag != INTIO_MAP_ALLOCATE)
269 1.31 isaki extent_free(map, ia->ia_addr, ia->ia_size, 0);
270 1.2 minoura return 0;
271 1.32 isaki }
272 1.2 minoura
273 1.2 minoura return -1;
274 1.2 minoura }
275 1.2 minoura
276 1.2 minoura int
277 1.25 chs intio_map_free_region(struct device *parent, struct intio_attach_args *ia)
278 1.2 minoura {
279 1.2 minoura struct intio_softc *sc = (struct intio_softc*) parent;
280 1.2 minoura struct extent *map = sc->sc_map;
281 1.2 minoura
282 1.31 isaki extent_free(map, ia->ia_addr, ia->ia_size, 0);
283 1.2 minoura #ifdef DEBUG
284 1.4 minoura if (intio_debug)
285 1.31 isaki extent_print(map);
286 1.2 minoura #endif
287 1.2 minoura return 0;
288 1.2 minoura }
289 1.2 minoura
290 1.2 minoura void
291 1.25 chs intio_alloc_system_ports(struct intio_softc *sc)
292 1.2 minoura {
293 1.31 isaki extent_alloc_region(sc->sc_map, INTIO_SYSPORT, 16, 0);
294 1.31 isaki extent_alloc_region(sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
295 1.2 minoura }
296 1.2 minoura
297 1.2 minoura
298 1.2 minoura /*
299 1.2 minoura * intio bus space stuff.
300 1.2 minoura */
301 1.2 minoura static int
302 1.25 chs intio_bus_space_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size,
303 1.25 chs int flags, bus_space_handle_t *bshp)
304 1.2 minoura {
305 1.2 minoura /*
306 1.2 minoura * Intio bus is mapped permanently.
307 1.2 minoura */
308 1.2 minoura *bshp = (bus_space_handle_t)
309 1.2 minoura ((u_int) bpa - PHYS_INTIODEV + intiobase);
310 1.2 minoura /*
311 1.10 isaki * Some devices are mapped on odd or even addresses only.
312 1.2 minoura */
313 1.10 isaki if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_ODD)
314 1.2 minoura *bshp += 0x80000001;
315 1.10 isaki if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_EVEN)
316 1.10 isaki *bshp += 0x80000000;
317 1.2 minoura
318 1.2 minoura return (0);
319 1.2 minoura }
320 1.2 minoura
321 1.2 minoura static void
322 1.25 chs intio_bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
323 1.25 chs bus_size_t size)
324 1.2 minoura {
325 1.2 minoura return;
326 1.2 minoura }
327 1.2 minoura
328 1.2 minoura static int
329 1.25 chs intio_bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
330 1.25 chs bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
331 1.2 minoura {
332 1.2 minoura
333 1.2 minoura *nbshp = bsh + offset;
334 1.2 minoura return (0);
335 1.2 minoura }
336 1.2 minoura
337 1.2 minoura
338 1.2 minoura /*
339 1.2 minoura * interrupt handler
340 1.2 minoura */
341 1.2 minoura int
342 1.25 chs intio_intr_establish(int vector, const char *name, intio_intr_handler_t handler,
343 1.25 chs void *arg)
344 1.2 minoura {
345 1.36 isaki
346 1.36 isaki return intio_intr_establish_ext(vector, name, "intr", handler, arg);
347 1.36 isaki }
348 1.36 isaki
349 1.36 isaki int
350 1.36 isaki intio_intr_establish_ext(int vector, const char *name1, const char *name2,
351 1.36 isaki intio_intr_handler_t handler, void *arg)
352 1.36 isaki {
353 1.36 isaki struct evcnt *evcnt;
354 1.36 isaki
355 1.2 minoura if (vector < 16)
356 1.31 isaki panic("Invalid interrupt vector");
357 1.2 minoura if (iiv[vector].iiv_handler)
358 1.2 minoura return EBUSY;
359 1.36 isaki
360 1.36 isaki evcnt = malloc(sizeof(*evcnt), M_DEVBUF, M_NOWAIT);
361 1.36 isaki if (evcnt == NULL)
362 1.36 isaki return ENOMEM;
363 1.36 isaki evcnt_attach_dynamic(evcnt, EVCNT_TYPE_INTR, NULL, name1, name2);
364 1.36 isaki
365 1.2 minoura iiv[vector].iiv_handler = handler;
366 1.2 minoura iiv[vector].iiv_arg = arg;
367 1.36 isaki iiv[vector].iiv_evcnt = evcnt;
368 1.2 minoura
369 1.2 minoura return 0;
370 1.2 minoura }
371 1.2 minoura
372 1.2 minoura int
373 1.25 chs intio_intr_disestablish(int vector, void *arg)
374 1.2 minoura {
375 1.2 minoura if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
376 1.2 minoura return EINVAL;
377 1.2 minoura iiv[vector].iiv_handler = 0;
378 1.2 minoura iiv[vector].iiv_arg = 0;
379 1.36 isaki evcnt_detach(iiv[vector].iiv_evcnt);
380 1.36 isaki free(iiv[vector].iiv_evcnt, M_DEVBUF);
381 1.2 minoura
382 1.2 minoura return 0;
383 1.2 minoura }
384 1.2 minoura
385 1.2 minoura int
386 1.25 chs intio_intr(struct frame *frame)
387 1.2 minoura {
388 1.2 minoura int vector = frame->f_vector / 4;
389 1.2 minoura
390 1.2 minoura #if 0 /* this is not correct now */
391 1.2 minoura /* CAUTION: HERE WE ARE IN SPLHIGH() */
392 1.2 minoura /* LOWER TO APPROPRIATE IPL AT VERY FIRST IN THE HANDLER!! */
393 1.2 minoura #endif
394 1.2 minoura if (iiv[vector].iiv_handler == 0) {
395 1.31 isaki printf("Stray interrupt: %d type %x, pc %x\n",
396 1.21 nsmrtks vector, frame->f_format, frame->f_pc);
397 1.2 minoura return 0;
398 1.2 minoura }
399 1.2 minoura
400 1.36 isaki iiv[vector].iiv_evcnt->ev_count++;
401 1.2 minoura
402 1.31 isaki return (*(iiv[vector].iiv_handler))(iiv[vector].iiv_arg);
403 1.2 minoura }
404 1.2 minoura
405 1.2 minoura /*
406 1.23 wiz * Intio I/O controller interrupt
407 1.2 minoura */
408 1.3 minoura static u_int8_t intio_ivec = 0;
409 1.3 minoura
410 1.2 minoura void
411 1.25 chs intio_set_ivec(int vec)
412 1.2 minoura {
413 1.2 minoura vec &= 0xfc;
414 1.2 minoura
415 1.2 minoura if (intio_ivec && intio_ivec != (vec & 0xfc))
416 1.31 isaki panic("Wrong interrupt vector for Sicilian.");
417 1.2 minoura
418 1.2 minoura intio_ivec = vec;
419 1.2 minoura intio_set_sicilian_ivec(vec);
420 1.2 minoura }
421 1.2 minoura
422 1.2 minoura
423 1.2 minoura /*
424 1.19 wiz * intio bus DMA stuff. stolen from arch/i386/isa/isa_machdep.c
425 1.2 minoura */
426 1.2 minoura
427 1.2 minoura /*
428 1.2 minoura * Create an INTIO DMA map.
429 1.2 minoura */
430 1.2 minoura int
431 1.25 chs _intio_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
432 1.25 chs bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
433 1.2 minoura {
434 1.2 minoura struct intio_dma_cookie *cookie;
435 1.2 minoura bus_dmamap_t map;
436 1.2 minoura int error, cookieflags;
437 1.2 minoura void *cookiestore;
438 1.2 minoura size_t cookiesize;
439 1.2 minoura extern paddr_t avail_end;
440 1.2 minoura
441 1.2 minoura /* Call common function to create the basic map. */
442 1.2 minoura error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
443 1.2 minoura flags, dmamp);
444 1.2 minoura if (error)
445 1.2 minoura return (error);
446 1.2 minoura
447 1.2 minoura map = *dmamp;
448 1.2 minoura map->x68k_dm_cookie = NULL;
449 1.2 minoura
450 1.2 minoura cookiesize = sizeof(struct intio_dma_cookie);
451 1.2 minoura
452 1.2 minoura /*
453 1.2 minoura * INTIO only has 24-bits of address space. This means
454 1.2 minoura * we can't DMA to pages over 16M. In order to DMA to
455 1.2 minoura * arbitrary buffers, we use "bounce buffers" - pages
456 1.2 minoura * in memory below the 16M boundary. On DMA reads,
457 1.2 minoura * DMA happens to the bounce buffers, and is copied into
458 1.2 minoura * the caller's buffer. On writes, data is copied into
459 1.2 minoura * but bounce buffer, and the DMA happens from those
460 1.2 minoura * pages. To software using the DMA mapping interface,
461 1.2 minoura * this looks simply like a data cache.
462 1.2 minoura *
463 1.2 minoura * If we have more than 16M of RAM in the system, we may
464 1.2 minoura * need bounce buffers. We check and remember that here.
465 1.2 minoura *
466 1.2 minoura * ...or, there is an opposite case. The most segments
467 1.18 thorpej * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
468 1.2 minoura * the caller can't handle that many segments (e.g. the
469 1.2 minoura * DMAC), we may have to bounce it as well.
470 1.2 minoura */
471 1.2 minoura if (avail_end <= t->_bounce_thresh)
472 1.32 isaki /* Bouncing not necessary due to memory size. */
473 1.2 minoura map->x68k_dm_bounce_thresh = 0;
474 1.2 minoura cookieflags = 0;
475 1.2 minoura if (map->x68k_dm_bounce_thresh != 0 ||
476 1.18 thorpej ((map->x68k_dm_size / PAGE_SIZE) + 1) > map->x68k_dm_segcnt) {
477 1.2 minoura cookieflags |= ID_MIGHT_NEED_BOUNCE;
478 1.2 minoura cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
479 1.2 minoura }
480 1.2 minoura
481 1.2 minoura /*
482 1.2 minoura * Allocate our cookie.
483 1.2 minoura */
484 1.2 minoura if ((cookiestore = malloc(cookiesize, M_DMAMAP,
485 1.2 minoura (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
486 1.2 minoura error = ENOMEM;
487 1.2 minoura goto out;
488 1.2 minoura }
489 1.2 minoura memset(cookiestore, 0, cookiesize);
490 1.2 minoura cookie = (struct intio_dma_cookie *)cookiestore;
491 1.2 minoura cookie->id_flags = cookieflags;
492 1.2 minoura map->x68k_dm_cookie = cookie;
493 1.2 minoura
494 1.2 minoura if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
495 1.2 minoura /*
496 1.2 minoura * Allocate the bounce pages now if the caller
497 1.2 minoura * wishes us to do so.
498 1.2 minoura */
499 1.2 minoura if ((flags & BUS_DMA_ALLOCNOW) == 0)
500 1.2 minoura goto out;
501 1.2 minoura
502 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
503 1.2 minoura }
504 1.2 minoura
505 1.2 minoura out:
506 1.2 minoura if (error) {
507 1.2 minoura if (map->x68k_dm_cookie != NULL)
508 1.2 minoura free(map->x68k_dm_cookie, M_DMAMAP);
509 1.2 minoura x68k_bus_dmamap_destroy(t, map);
510 1.2 minoura }
511 1.2 minoura return (error);
512 1.2 minoura }
513 1.2 minoura
514 1.2 minoura /*
515 1.2 minoura * Destroy an INTIO DMA map.
516 1.2 minoura */
517 1.2 minoura void
518 1.25 chs _intio_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
519 1.2 minoura {
520 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
521 1.2 minoura
522 1.2 minoura /*
523 1.2 minoura * Free any bounce pages this map might hold.
524 1.2 minoura */
525 1.2 minoura if (cookie->id_flags & ID_HAS_BOUNCE)
526 1.2 minoura _intio_dma_free_bouncebuf(t, map);
527 1.2 minoura
528 1.2 minoura free(cookie, M_DMAMAP);
529 1.2 minoura x68k_bus_dmamap_destroy(t, map);
530 1.2 minoura }
531 1.2 minoura
532 1.2 minoura /*
533 1.2 minoura * Load an INTIO DMA map with a linear buffer.
534 1.2 minoura */
535 1.2 minoura int
536 1.25 chs _intio_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
537 1.25 chs bus_size_t buflen, struct proc *p, int flags)
538 1.2 minoura {
539 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
540 1.2 minoura int error;
541 1.2 minoura
542 1.2 minoura /*
543 1.2 minoura * Make sure that on error condition we return "no valid mappings."
544 1.2 minoura */
545 1.2 minoura map->dm_mapsize = 0;
546 1.2 minoura map->dm_nsegs = 0;
547 1.2 minoura
548 1.2 minoura /*
549 1.2 minoura * Try to load the map the normal way. If this errors out,
550 1.2 minoura * and we can bounce, we will.
551 1.2 minoura */
552 1.2 minoura error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
553 1.2 minoura if (error == 0 ||
554 1.2 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
555 1.2 minoura return (error);
556 1.2 minoura
557 1.2 minoura /*
558 1.2 minoura * Allocate bounce pages, if necessary.
559 1.2 minoura */
560 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
561 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
562 1.2 minoura if (error)
563 1.2 minoura return (error);
564 1.2 minoura }
565 1.2 minoura
566 1.2 minoura /*
567 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
568 1.2 minoura * with the bounce buffer.
569 1.2 minoura */
570 1.2 minoura cookie->id_origbuf = buf;
571 1.2 minoura cookie->id_origbuflen = buflen;
572 1.2 minoura cookie->id_buftype = ID_BUFTYPE_LINEAR;
573 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
574 1.2 minoura p, flags);
575 1.2 minoura if (error) {
576 1.2 minoura /*
577 1.2 minoura * Free the bounce pages, unless our resources
578 1.2 minoura * are reserved for our exclusive use.
579 1.2 minoura */
580 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
581 1.2 minoura _intio_dma_free_bouncebuf(t, map);
582 1.2 minoura return (error);
583 1.2 minoura }
584 1.2 minoura
585 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
586 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
587 1.2 minoura return (0);
588 1.2 minoura }
589 1.2 minoura
590 1.2 minoura /*
591 1.2 minoura * Like _intio_bus_dmamap_load(), but for mbufs.
592 1.2 minoura */
593 1.2 minoura int
594 1.25 chs _intio_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
595 1.25 chs int flags)
596 1.2 minoura {
597 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
598 1.2 minoura int error;
599 1.2 minoura
600 1.2 minoura /*
601 1.2 minoura * Make sure on error condition we return "no valid mappings."
602 1.2 minoura */
603 1.2 minoura map->dm_mapsize = 0;
604 1.2 minoura map->dm_nsegs = 0;
605 1.2 minoura
606 1.2 minoura #ifdef DIAGNOSTIC
607 1.2 minoura if ((m0->m_flags & M_PKTHDR) == 0)
608 1.2 minoura panic("_intio_bus_dmamap_load_mbuf: no packet header");
609 1.2 minoura #endif
610 1.2 minoura
611 1.2 minoura if (m0->m_pkthdr.len > map->x68k_dm_size)
612 1.2 minoura return (EINVAL);
613 1.2 minoura
614 1.2 minoura /*
615 1.2 minoura * Try to load the map the normal way. If this errors out,
616 1.2 minoura * and we can bounce, we will.
617 1.2 minoura */
618 1.2 minoura error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
619 1.2 minoura if (error == 0 ||
620 1.2 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
621 1.2 minoura return (error);
622 1.2 minoura
623 1.2 minoura /*
624 1.2 minoura * Allocate bounce pages, if necessary.
625 1.2 minoura */
626 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
627 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
628 1.2 minoura flags);
629 1.2 minoura if (error)
630 1.2 minoura return (error);
631 1.2 minoura }
632 1.2 minoura
633 1.2 minoura /*
634 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
635 1.2 minoura * with the bounce buffer.
636 1.2 minoura */
637 1.2 minoura cookie->id_origbuf = m0;
638 1.2 minoura cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
639 1.2 minoura cookie->id_buftype = ID_BUFTYPE_MBUF;
640 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
641 1.2 minoura m0->m_pkthdr.len, NULL, flags);
642 1.2 minoura if (error) {
643 1.2 minoura /*
644 1.2 minoura * Free the bounce pages, unless our resources
645 1.2 minoura * are reserved for our exclusive use.
646 1.2 minoura */
647 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
648 1.2 minoura _intio_dma_free_bouncebuf(t, map);
649 1.2 minoura return (error);
650 1.2 minoura }
651 1.2 minoura
652 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
653 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
654 1.2 minoura return (0);
655 1.2 minoura }
656 1.2 minoura
657 1.2 minoura /*
658 1.2 minoura * Like _intio_bus_dmamap_load(), but for uios.
659 1.2 minoura */
660 1.2 minoura int
661 1.25 chs _intio_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
662 1.25 chs int flags)
663 1.2 minoura {
664 1.2 minoura panic("_intio_bus_dmamap_load_uio: not implemented");
665 1.2 minoura }
666 1.2 minoura
667 1.2 minoura /*
668 1.2 minoura * Like _intio_bus_dmamap_load(), but for raw memory allocated with
669 1.2 minoura * bus_dmamem_alloc().
670 1.2 minoura */
671 1.2 minoura int
672 1.25 chs _intio_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
673 1.25 chs bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
674 1.2 minoura {
675 1.2 minoura
676 1.2 minoura panic("_intio_bus_dmamap_load_raw: not implemented");
677 1.2 minoura }
678 1.2 minoura
679 1.2 minoura /*
680 1.2 minoura * Unload an INTIO DMA map.
681 1.2 minoura */
682 1.2 minoura void
683 1.25 chs _intio_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
684 1.2 minoura {
685 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
686 1.2 minoura
687 1.2 minoura /*
688 1.2 minoura * If we have bounce pages, free them, unless they're
689 1.2 minoura * reserved for our exclusive use.
690 1.2 minoura */
691 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) &&
692 1.2 minoura (map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
693 1.2 minoura _intio_dma_free_bouncebuf(t, map);
694 1.2 minoura
695 1.2 minoura cookie->id_flags &= ~ID_IS_BOUNCING;
696 1.2 minoura cookie->id_buftype = ID_BUFTYPE_INVALID;
697 1.2 minoura
698 1.2 minoura /*
699 1.2 minoura * Do the generic bits of the unload.
700 1.2 minoura */
701 1.2 minoura x68k_bus_dmamap_unload(t, map);
702 1.2 minoura }
703 1.2 minoura
704 1.2 minoura /*
705 1.2 minoura * Synchronize an INTIO DMA map.
706 1.2 minoura */
707 1.2 minoura void
708 1.25 chs _intio_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
709 1.25 chs bus_size_t len, int ops)
710 1.2 minoura {
711 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
712 1.2 minoura
713 1.2 minoura /*
714 1.2 minoura * Mixing PRE and POST operations is not allowed.
715 1.2 minoura */
716 1.2 minoura if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
717 1.2 minoura (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
718 1.2 minoura panic("_intio_bus_dmamap_sync: mix PRE and POST");
719 1.2 minoura
720 1.2 minoura #ifdef DIAGNOSTIC
721 1.2 minoura if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
722 1.2 minoura if (offset >= map->dm_mapsize)
723 1.2 minoura panic("_intio_bus_dmamap_sync: bad offset");
724 1.2 minoura if (len == 0 || (offset + len) > map->dm_mapsize)
725 1.2 minoura panic("_intio_bus_dmamap_sync: bad length");
726 1.2 minoura }
727 1.2 minoura #endif
728 1.2 minoura
729 1.2 minoura /*
730 1.2 minoura * If we're not bouncing, just return; nothing to do.
731 1.2 minoura */
732 1.2 minoura if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
733 1.2 minoura return;
734 1.2 minoura
735 1.2 minoura switch (cookie->id_buftype) {
736 1.2 minoura case ID_BUFTYPE_LINEAR:
737 1.2 minoura /*
738 1.2 minoura * Nothing to do for pre-read.
739 1.2 minoura */
740 1.2 minoura
741 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
742 1.2 minoura /*
743 1.2 minoura * Copy the caller's buffer to the bounce buffer.
744 1.2 minoura */
745 1.2 minoura memcpy((char *)cookie->id_bouncebuf + offset,
746 1.2 minoura (char *)cookie->id_origbuf + offset, len);
747 1.2 minoura }
748 1.2 minoura
749 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
750 1.2 minoura /*
751 1.2 minoura * Copy the bounce buffer to the caller's buffer.
752 1.2 minoura */
753 1.2 minoura memcpy((char *)cookie->id_origbuf + offset,
754 1.2 minoura (char *)cookie->id_bouncebuf + offset, len);
755 1.2 minoura }
756 1.2 minoura
757 1.2 minoura /*
758 1.2 minoura * Nothing to do for post-write.
759 1.2 minoura */
760 1.2 minoura break;
761 1.2 minoura
762 1.2 minoura case ID_BUFTYPE_MBUF:
763 1.2 minoura {
764 1.2 minoura struct mbuf *m, *m0 = cookie->id_origbuf;
765 1.2 minoura bus_size_t minlen, moff;
766 1.2 minoura
767 1.2 minoura /*
768 1.2 minoura * Nothing to do for pre-read.
769 1.2 minoura */
770 1.2 minoura
771 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
772 1.2 minoura /*
773 1.2 minoura * Copy the caller's buffer to the bounce buffer.
774 1.2 minoura */
775 1.2 minoura m_copydata(m0, offset, len,
776 1.2 minoura (char *)cookie->id_bouncebuf + offset);
777 1.2 minoura }
778 1.2 minoura
779 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
780 1.2 minoura /*
781 1.2 minoura * Copy the bounce buffer to the caller's buffer.
782 1.2 minoura */
783 1.2 minoura for (moff = offset, m = m0; m != NULL && len != 0;
784 1.2 minoura m = m->m_next) {
785 1.2 minoura /* Find the beginning mbuf. */
786 1.2 minoura if (moff >= m->m_len) {
787 1.2 minoura moff -= m->m_len;
788 1.2 minoura continue;
789 1.2 minoura }
790 1.2 minoura
791 1.2 minoura /*
792 1.2 minoura * Now at the first mbuf to sync; nail
793 1.2 minoura * each one until we have exhausted the
794 1.2 minoura * length.
795 1.2 minoura */
796 1.2 minoura minlen = len < m->m_len - moff ?
797 1.2 minoura len : m->m_len - moff;
798 1.2 minoura
799 1.30 he memcpy(mtod(m, char *) + moff,
800 1.2 minoura (char *)cookie->id_bouncebuf + offset,
801 1.2 minoura minlen);
802 1.2 minoura
803 1.2 minoura moff = 0;
804 1.2 minoura len -= minlen;
805 1.2 minoura offset += minlen;
806 1.2 minoura }
807 1.2 minoura }
808 1.2 minoura
809 1.2 minoura /*
810 1.2 minoura * Nothing to do for post-write.
811 1.2 minoura */
812 1.2 minoura break;
813 1.2 minoura }
814 1.2 minoura
815 1.2 minoura case ID_BUFTYPE_UIO:
816 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
817 1.2 minoura break;
818 1.2 minoura
819 1.2 minoura case ID_BUFTYPE_RAW:
820 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
821 1.2 minoura break;
822 1.2 minoura
823 1.2 minoura case ID_BUFTYPE_INVALID:
824 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
825 1.2 minoura break;
826 1.2 minoura
827 1.2 minoura default:
828 1.2 minoura printf("unknown buffer type %d\n", cookie->id_buftype);
829 1.2 minoura panic("_intio_bus_dmamap_sync");
830 1.2 minoura }
831 1.2 minoura }
832 1.2 minoura
833 1.2 minoura /*
834 1.2 minoura * Allocate memory safe for INTIO DMA.
835 1.2 minoura */
836 1.2 minoura int
837 1.25 chs _intio_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
838 1.25 chs bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
839 1.25 chs int flags)
840 1.2 minoura {
841 1.2 minoura paddr_t high;
842 1.2 minoura extern paddr_t avail_end;
843 1.2 minoura
844 1.2 minoura if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
845 1.2 minoura high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
846 1.2 minoura else
847 1.2 minoura high = trunc_page(avail_end);
848 1.2 minoura
849 1.2 minoura return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
850 1.2 minoura segs, nsegs, rsegs, flags, 0, high));
851 1.2 minoura }
852 1.2 minoura
853 1.2 minoura /**********************************************************************
854 1.2 minoura * INTIO DMA utility functions
855 1.2 minoura **********************************************************************/
856 1.2 minoura
857 1.2 minoura int
858 1.25 chs _intio_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, bus_size_t size,
859 1.25 chs int flags)
860 1.2 minoura {
861 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
862 1.2 minoura int error = 0;
863 1.2 minoura
864 1.2 minoura cookie->id_bouncebuflen = round_page(size);
865 1.2 minoura error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
866 1.18 thorpej PAGE_SIZE, map->x68k_dm_boundary, cookie->id_bouncesegs,
867 1.2 minoura map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
868 1.2 minoura if (error)
869 1.2 minoura goto out;
870 1.2 minoura error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
871 1.2 minoura cookie->id_nbouncesegs, cookie->id_bouncebuflen,
872 1.29 christos (void **)&cookie->id_bouncebuf, flags);
873 1.2 minoura
874 1.2 minoura out:
875 1.2 minoura if (error) {
876 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
877 1.2 minoura cookie->id_nbouncesegs);
878 1.2 minoura cookie->id_bouncebuflen = 0;
879 1.2 minoura cookie->id_nbouncesegs = 0;
880 1.2 minoura } else {
881 1.2 minoura cookie->id_flags |= ID_HAS_BOUNCE;
882 1.2 minoura }
883 1.2 minoura
884 1.2 minoura return (error);
885 1.2 minoura }
886 1.2 minoura
887 1.2 minoura void
888 1.25 chs _intio_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map)
889 1.2 minoura {
890 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
891 1.2 minoura
892 1.2 minoura x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
893 1.2 minoura cookie->id_bouncebuflen);
894 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
895 1.2 minoura cookie->id_nbouncesegs);
896 1.2 minoura cookie->id_bouncebuflen = 0;
897 1.2 minoura cookie->id_nbouncesegs = 0;
898 1.2 minoura cookie->id_flags &= ~ID_HAS_BOUNCE;
899 1.2 minoura }
900