intio.c revision 1.5 1 1.5 minoura /* $NetBSD: intio.c,v 1.5 1999/03/24 14:07:38 minoura Exp $ */
2 1.2 minoura
3 1.2 minoura /*
4 1.2 minoura *
5 1.2 minoura * Copyright (c) 1998 NetBSD Foundation, Inc.
6 1.2 minoura * All rights reserved.
7 1.2 minoura *
8 1.2 minoura * Redistribution and use in source and binary forms, with or without
9 1.2 minoura * modification, are permitted provided that the following conditions
10 1.2 minoura * are met:
11 1.2 minoura * 1. Redistributions of source code must retain the above copyright
12 1.2 minoura * notice, this list of conditions and the following disclaimer.
13 1.2 minoura * 2. Redistributions in binary form must reproduce the above copyright
14 1.2 minoura * notice, this list of conditions and the following disclaimer in the
15 1.2 minoura * documentation and/or other materials provided with the distribution.
16 1.2 minoura * 3. All advertising materials mentioning features or use of this software
17 1.2 minoura * must display the following acknowledgement:
18 1.2 minoura * This product includes software developed by Charles D. Cranor and
19 1.2 minoura * Washington University.
20 1.2 minoura * 4. The name of the author may not be used to endorse or promote products
21 1.2 minoura * derived from this software without specific prior written permission.
22 1.2 minoura *
23 1.2 minoura * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 1.2 minoura * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 1.2 minoura * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 1.2 minoura * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 1.2 minoura * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 1.2 minoura * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 1.2 minoura * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 1.2 minoura * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 1.2 minoura * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 1.2 minoura * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 1.2 minoura */
34 1.2 minoura
35 1.2 minoura /*
36 1.2 minoura * NetBSD/x68k internal I/O virtual bus.
37 1.2 minoura */
38 1.2 minoura
39 1.2 minoura #include <sys/param.h>
40 1.2 minoura #include <sys/systm.h>
41 1.2 minoura #include <sys/device.h>
42 1.2 minoura #include <sys/malloc.h>
43 1.2 minoura #include <sys/mbuf.h>
44 1.2 minoura #include <sys/extent.h>
45 1.2 minoura #include <vm/vm.h>
46 1.2 minoura
47 1.2 minoura #include <machine/bus.h>
48 1.2 minoura #include <machine/cpu.h>
49 1.2 minoura #include <machine/frame.h>
50 1.2 minoura
51 1.2 minoura #include <arch/x68k/dev/intiovar.h>
52 1.2 minoura #include <arch/x68k/dev/mfp.h>
53 1.2 minoura
54 1.2 minoura
55 1.2 minoura /*
56 1.2 minoura * bus_space(9) interface
57 1.2 minoura */
58 1.2 minoura static int intio_bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *));
59 1.2 minoura static void intio_bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
60 1.2 minoura static int intio_bus_space_subregion __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *));
61 1.2 minoura
62 1.2 minoura static struct x68k_bus_space intio_bus = {
63 1.2 minoura #if 0
64 1.2 minoura X68K_INTIO_BUS,
65 1.2 minoura #endif
66 1.2 minoura intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
67 1.2 minoura x68k_bus_space_alloc, x68k_bus_space_free,
68 1.2 minoura #if 0
69 1.2 minoura x68k_bus_space_barrier,
70 1.2 minoura #endif
71 1.2 minoura
72 1.2 minoura 0
73 1.2 minoura };
74 1.2 minoura
75 1.2 minoura /*
76 1.2 minoura * bus_dma(9) interface
77 1.2 minoura */
78 1.2 minoura #define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
79 1.2 minoura int _intio_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int,
80 1.2 minoura bus_size_t, bus_size_t, int, bus_dmamap_t *));
81 1.2 minoura void _intio_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
82 1.2 minoura int _intio_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
83 1.2 minoura bus_size_t, struct proc *, int));
84 1.2 minoura int _intio_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
85 1.2 minoura struct mbuf *, int));
86 1.2 minoura int _intio_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
87 1.2 minoura struct uio *, int));
88 1.2 minoura int _intio_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
89 1.2 minoura bus_dma_segment_t *, int, bus_size_t, int));
90 1.2 minoura void _intio_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
91 1.2 minoura void _intio_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
92 1.2 minoura bus_addr_t, bus_size_t, int));
93 1.2 minoura
94 1.2 minoura int _intio_bus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
95 1.2 minoura bus_size_t, bus_dma_segment_t *, int, int *, int));
96 1.2 minoura
97 1.2 minoura int _intio_dma_alloc_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t,
98 1.2 minoura bus_size_t, int));
99 1.2 minoura void _intio_dma_free_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t));
100 1.2 minoura
101 1.2 minoura struct x68k_bus_dma intio_bus_dma = {
102 1.2 minoura INTIO_DMA_BOUNCE_THRESHOLD,
103 1.2 minoura _intio_bus_dmamap_create,
104 1.2 minoura _intio_bus_dmamap_destroy,
105 1.2 minoura _intio_bus_dmamap_load,
106 1.2 minoura _intio_bus_dmamap_load_mbuf,
107 1.2 minoura _intio_bus_dmamap_load_uio,
108 1.2 minoura _intio_bus_dmamap_load_raw,
109 1.2 minoura _intio_bus_dmamap_unload,
110 1.2 minoura _intio_bus_dmamap_sync,
111 1.2 minoura _intio_bus_dmamem_alloc,
112 1.2 minoura x68k_bus_dmamem_free,
113 1.2 minoura x68k_bus_dmamem_map,
114 1.2 minoura x68k_bus_dmamem_unmap,
115 1.2 minoura x68k_bus_dmamem_mmap,
116 1.2 minoura };
117 1.2 minoura
118 1.2 minoura /*
119 1.2 minoura * autoconf stuff
120 1.2 minoura */
121 1.2 minoura static int intio_match __P((struct device *, struct cfdata *, void *));
122 1.2 minoura static void intio_attach __P((struct device *, struct device *, void *));
123 1.2 minoura static int intio_search __P((struct device *, struct cfdata *cf, void *));
124 1.2 minoura static int intio_print __P((void *, const char *));
125 1.2 minoura static void intio_alloc_system_ports __P((struct intio_softc*));
126 1.2 minoura
127 1.2 minoura struct cfattach intio_ca = {
128 1.2 minoura sizeof(struct intio_softc), intio_match, intio_attach
129 1.2 minoura };
130 1.2 minoura
131 1.2 minoura static struct intio_interrupt_vector {
132 1.2 minoura intio_intr_handler_t iiv_handler;
133 1.2 minoura void *iiv_arg;
134 1.2 minoura int iiv_intrcntoff;
135 1.5 minoura } iiv[256] = {{0,},};
136 1.2 minoura
137 1.2 minoura extern struct cfdriver intio_cd;
138 1.2 minoura
139 1.2 minoura /* used in console initialization */
140 1.2 minoura extern int x68k_realconfig;
141 1.2 minoura int x68k_config_found __P((struct cfdata *, struct device *,
142 1.2 minoura void *, cfprint_t));
143 1.2 minoura static struct cfdata *cfdata_intiobus = NULL;
144 1.2 minoura
145 1.2 minoura /* other static functions */
146 1.2 minoura static int scan_intrnames __P((const char *));
147 1.4 minoura #ifdef DEBUG
148 1.4 minoura int intio_debug = 0;
149 1.4 minoura #endif
150 1.2 minoura
151 1.2 minoura static int
152 1.2 minoura intio_match(parent, cf, aux)
153 1.2 minoura struct device *parent;
154 1.2 minoura struct cfdata *cf;
155 1.2 minoura void *aux; /* NULL */
156 1.2 minoura {
157 1.2 minoura if (strcmp(aux, intio_cd.cd_name) != 0)
158 1.2 minoura return (0);
159 1.2 minoura if (cf->cf_unit != 0)
160 1.2 minoura return (0);
161 1.2 minoura if (x68k_realconfig == 0)
162 1.2 minoura cfdata_intiobus = cf; /* XXX */
163 1.2 minoura
164 1.2 minoura return (1);
165 1.2 minoura }
166 1.2 minoura
167 1.2 minoura
168 1.2 minoura /* used in console initialization: configure only MFP */
169 1.2 minoura static struct intio_attach_args initial_ia = {
170 1.2 minoura &intio_bus,
171 1.2 minoura 0/*XXX*/,
172 1.2 minoura
173 1.2 minoura "mfp", /* ia_name */
174 1.2 minoura MFP_ADDR, /* ia_addr */
175 1.2 minoura MFP_INTR, /* ia_intr */
176 1.2 minoura -1 /* ia_dma */
177 1.2 minoura -1, /* ia_dmaintr */
178 1.2 minoura };
179 1.2 minoura
180 1.2 minoura static void
181 1.2 minoura intio_attach(parent, self, aux)
182 1.2 minoura struct device *parent, *self;
183 1.2 minoura void *aux; /* NULL */
184 1.2 minoura {
185 1.2 minoura struct intio_softc *sc = (struct intio_softc *)self;
186 1.2 minoura struct intio_attach_args ia;
187 1.2 minoura
188 1.2 minoura if (self == NULL) {
189 1.2 minoura /* console only init */
190 1.2 minoura x68k_config_found(cfdata_intiobus, NULL, &initial_ia, NULL);
191 1.2 minoura return;
192 1.2 minoura }
193 1.2 minoura
194 1.3 minoura printf (" mapped at %8p\n", intiobase);
195 1.2 minoura
196 1.2 minoura sc->sc_map = extent_create("intiomap",
197 1.2 minoura PHYS_INTIODEV,
198 1.2 minoura PHYS_INTIODEV + 0x400000,
199 1.2 minoura M_DEVBUF, NULL, NULL, EX_NOWAIT);
200 1.2 minoura intio_alloc_system_ports (sc);
201 1.2 minoura
202 1.2 minoura sc->sc_bst = &intio_bus;
203 1.2 minoura sc->sc_bst->x68k_bus_device = self;
204 1.2 minoura sc->sc_dmat = &intio_bus_dma;
205 1.2 minoura sc->sc_dmac = 0;
206 1.2 minoura
207 1.2 minoura bzero(iiv, sizeof (struct intio_interrupt_vector) * 256);
208 1.2 minoura
209 1.2 minoura ia.ia_bst = sc->sc_bst;
210 1.2 minoura ia.ia_dmat = sc->sc_dmat;
211 1.2 minoura
212 1.2 minoura config_search (intio_search, self, &ia);
213 1.2 minoura }
214 1.2 minoura
215 1.2 minoura static int
216 1.2 minoura intio_search(parent, cf, aux)
217 1.2 minoura struct device *parent;
218 1.2 minoura struct cfdata *cf;
219 1.2 minoura void *aux;
220 1.2 minoura {
221 1.2 minoura struct intio_attach_args *ia = aux;
222 1.2 minoura struct intio_softc *sc = (struct intio_softc *)parent;
223 1.2 minoura
224 1.2 minoura ia->ia_bst = sc->sc_bst;
225 1.2 minoura ia->ia_dmat = sc->sc_dmat;
226 1.2 minoura ia->ia_name = cf->cf_driver->cd_name;
227 1.2 minoura ia->ia_addr = cf->cf_addr;
228 1.2 minoura ia->ia_intr = cf->cf_intr;
229 1.2 minoura ia->ia_dma = cf->cf_dma;
230 1.2 minoura ia->ia_dmaintr = cf->cf_dmaintr;
231 1.2 minoura
232 1.2 minoura if ((*cf->cf_attach->ca_match)(parent, cf, ia) > 0)
233 1.2 minoura config_attach(parent, cf, ia, intio_print);
234 1.2 minoura
235 1.2 minoura return (0);
236 1.2 minoura }
237 1.2 minoura
238 1.2 minoura static int
239 1.2 minoura intio_print(aux, name)
240 1.2 minoura void *aux;
241 1.2 minoura const char *name;
242 1.2 minoura {
243 1.2 minoura struct intio_attach_args *ia = aux;
244 1.2 minoura
245 1.2 minoura /* if (ia->ia_addr > 0) */
246 1.2 minoura printf (" addr 0x%06x", ia->ia_addr);
247 1.2 minoura if (ia->ia_intr > 0)
248 1.2 minoura printf (" intr 0x%02x", ia->ia_intr);
249 1.2 minoura if (ia->ia_dma >= 0) {
250 1.2 minoura printf (" using DMA ch%d", ia->ia_dma);
251 1.2 minoura if (ia->ia_dmaintr > 0)
252 1.2 minoura printf (" intr 0x%02x and 0x%02x",
253 1.2 minoura ia->ia_dmaintr, ia->ia_dmaintr+1);
254 1.2 minoura }
255 1.2 minoura
256 1.2 minoura return (QUIET);
257 1.2 minoura }
258 1.2 minoura
259 1.2 minoura /*
260 1.2 minoura * intio memory map manager
261 1.2 minoura */
262 1.2 minoura
263 1.2 minoura int
264 1.2 minoura intio_map_allocate_region(parent, ia, flag)
265 1.2 minoura struct device *parent;
266 1.2 minoura struct intio_attach_args *ia;
267 1.2 minoura enum intio_map_flag flag; /* INTIO_MAP_TESTONLY or INTIO_MAP_ALLOCATE */
268 1.2 minoura {
269 1.2 minoura struct intio_softc *sc = (struct intio_softc*) parent;
270 1.2 minoura struct extent *map = sc->sc_map;
271 1.2 minoura int r;
272 1.2 minoura
273 1.2 minoura r = extent_alloc_region (map, ia->ia_addr, ia->ia_size, 0);
274 1.2 minoura #ifdef DEBUG
275 1.4 minoura if (intio_debug)
276 1.4 minoura extent_print (map);
277 1.2 minoura #endif
278 1.2 minoura if (r == 0) {
279 1.2 minoura if (flag != INTIO_MAP_ALLOCATE)
280 1.2 minoura extent_free (map, ia->ia_addr, ia->ia_size, 0);
281 1.2 minoura return 0;
282 1.2 minoura }
283 1.2 minoura
284 1.2 minoura return -1;
285 1.2 minoura }
286 1.2 minoura
287 1.2 minoura int
288 1.2 minoura intio_map_free_region(parent, ia)
289 1.2 minoura struct device *parent;
290 1.2 minoura struct intio_attach_args *ia;
291 1.2 minoura {
292 1.2 minoura struct intio_softc *sc = (struct intio_softc*) parent;
293 1.2 minoura struct extent *map = sc->sc_map;
294 1.2 minoura
295 1.2 minoura extent_free (map, ia->ia_addr, ia->ia_size, 0);
296 1.2 minoura #ifdef DEBUG
297 1.4 minoura if (intio_debug)
298 1.4 minoura extent_print (map);
299 1.2 minoura #endif
300 1.2 minoura return 0;
301 1.2 minoura }
302 1.2 minoura
303 1.2 minoura void
304 1.2 minoura intio_alloc_system_ports(sc)
305 1.2 minoura struct intio_softc *sc;
306 1.2 minoura {
307 1.2 minoura extent_alloc_region (sc->sc_map, INTIO_SYSPORT, 16, 0);
308 1.2 minoura extent_alloc_region (sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
309 1.2 minoura }
310 1.2 minoura
311 1.2 minoura
312 1.2 minoura /*
313 1.2 minoura * intio bus space stuff.
314 1.2 minoura */
315 1.2 minoura static int
316 1.2 minoura intio_bus_space_map(t, bpa, size, flags, bshp)
317 1.2 minoura bus_space_tag_t t;
318 1.2 minoura bus_addr_t bpa;
319 1.2 minoura bus_size_t size;
320 1.2 minoura int flags;
321 1.2 minoura bus_space_handle_t *bshp;
322 1.2 minoura {
323 1.2 minoura /*
324 1.2 minoura * Intio bus is mapped permanently.
325 1.2 minoura */
326 1.2 minoura *bshp = (bus_space_handle_t)
327 1.2 minoura ((u_int) bpa - PHYS_INTIODEV + intiobase);
328 1.2 minoura /*
329 1.2 minoura * Some devices are mapped on odd addresses only.
330 1.2 minoura */
331 1.2 minoura if (flags & BUS_SPACE_MAP_SHIFTED)
332 1.2 minoura *bshp += 0x80000001;
333 1.2 minoura
334 1.2 minoura return (0);
335 1.2 minoura }
336 1.2 minoura
337 1.2 minoura static void
338 1.2 minoura intio_bus_space_unmap(t, bsh, size)
339 1.2 minoura bus_space_tag_t t;
340 1.2 minoura bus_space_handle_t bsh;
341 1.2 minoura bus_size_t size;
342 1.2 minoura {
343 1.2 minoura return;
344 1.2 minoura }
345 1.2 minoura
346 1.2 minoura static int
347 1.2 minoura intio_bus_space_subregion(t, bsh, offset, size, nbshp)
348 1.2 minoura bus_space_tag_t t;
349 1.2 minoura bus_space_handle_t bsh;
350 1.2 minoura bus_size_t offset, size;
351 1.2 minoura bus_space_handle_t *nbshp;
352 1.2 minoura {
353 1.2 minoura
354 1.2 minoura *nbshp = bsh + offset;
355 1.2 minoura return (0);
356 1.2 minoura }
357 1.2 minoura
358 1.2 minoura
359 1.2 minoura /*
360 1.2 minoura * interrupt handler
361 1.2 minoura */
362 1.2 minoura int
363 1.2 minoura intio_intr_establish (vector, name, handler, arg)
364 1.2 minoura int vector;
365 1.2 minoura const char *name; /* XXX */
366 1.2 minoura intio_intr_handler_t handler;
367 1.2 minoura void *arg;
368 1.2 minoura {
369 1.2 minoura if (vector < 16)
370 1.2 minoura panic ("Invalid interrupt vector");
371 1.2 minoura if (iiv[vector].iiv_handler)
372 1.2 minoura return EBUSY;
373 1.2 minoura iiv[vector].iiv_handler = handler;
374 1.2 minoura iiv[vector].iiv_arg = arg;
375 1.2 minoura iiv[vector].iiv_intrcntoff = scan_intrnames(name);
376 1.2 minoura
377 1.2 minoura return 0;
378 1.2 minoura }
379 1.2 minoura
380 1.2 minoura static int
381 1.2 minoura scan_intrnames (name)
382 1.2 minoura const char *name;
383 1.2 minoura {
384 1.2 minoura extern char intrnames[];
385 1.2 minoura extern char eintrnames[];
386 1.2 minoura int r = 0;
387 1.2 minoura char *p = &intrnames[0];
388 1.2 minoura
389 1.2 minoura for (;;) {
390 1.2 minoura if (*p == 0) { /* new intr */
391 1.2 minoura if (p + strlen(name) >= eintrnames)
392 1.2 minoura panic ("Interrupt statics buffer overrun.");
393 1.2 minoura strcpy (p, name);
394 1.2 minoura break;
395 1.2 minoura }
396 1.2 minoura if (strcmp(p, name) == 0)
397 1.2 minoura break;
398 1.2 minoura r++;
399 1.2 minoura while (*p++ != 0);
400 1.2 minoura }
401 1.2 minoura
402 1.2 minoura return r;
403 1.2 minoura }
404 1.2 minoura
405 1.2 minoura int
406 1.2 minoura intio_intr_disestablish (vector, arg)
407 1.2 minoura int vector;
408 1.2 minoura void *arg;
409 1.2 minoura {
410 1.2 minoura if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
411 1.2 minoura return EINVAL;
412 1.2 minoura iiv[vector].iiv_handler = 0;
413 1.2 minoura iiv[vector].iiv_arg = 0;
414 1.2 minoura
415 1.2 minoura return 0;
416 1.2 minoura }
417 1.2 minoura
418 1.2 minoura int
419 1.2 minoura intio_intr (frame)
420 1.2 minoura struct frame *frame;
421 1.2 minoura {
422 1.2 minoura int vector = frame->f_vector / 4;
423 1.2 minoura extern int intrcnt[];
424 1.2 minoura
425 1.2 minoura #if 0 /* this is not correct now */
426 1.2 minoura /* CAUTION: HERE WE ARE IN SPLHIGH() */
427 1.2 minoura /* LOWER TO APPROPRIATE IPL AT VERY FIRST IN THE HANDLER!! */
428 1.2 minoura #endif
429 1.2 minoura if (iiv[vector].iiv_handler == 0) {
430 1.2 minoura printf ("Stray interrupt: %d type %x\n", vector, frame->f_format);
431 1.2 minoura return 0;
432 1.2 minoura }
433 1.2 minoura
434 1.2 minoura intrcnt[iiv[vector].iiv_intrcntoff]++;
435 1.2 minoura
436 1.2 minoura return (*(iiv[vector].iiv_handler)) (iiv[vector].iiv_arg);
437 1.2 minoura }
438 1.2 minoura
439 1.2 minoura /*
440 1.2 minoura * Intio I/O controler interrupt
441 1.2 minoura */
442 1.3 minoura static u_int8_t intio_ivec = 0;
443 1.3 minoura
444 1.2 minoura void
445 1.2 minoura intio_set_ivec (vec)
446 1.2 minoura int vec;
447 1.2 minoura {
448 1.2 minoura vec &= 0xfc;
449 1.2 minoura
450 1.2 minoura if (intio_ivec && intio_ivec != (vec & 0xfc))
451 1.2 minoura panic ("Wrong interrupt vector for Sicilian.");
452 1.2 minoura
453 1.2 minoura intio_ivec = vec;
454 1.2 minoura intio_set_sicilian_ivec(vec);
455 1.2 minoura }
456 1.2 minoura
457 1.2 minoura
458 1.2 minoura /*
459 1.2 minoura * intio bus dma stuff. stolen from arch/i386/isa/isa_machdep.c
460 1.2 minoura */
461 1.2 minoura
462 1.2 minoura /*
463 1.2 minoura * Create an INTIO DMA map.
464 1.2 minoura */
465 1.2 minoura int
466 1.2 minoura _intio_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
467 1.2 minoura bus_dma_tag_t t;
468 1.2 minoura bus_size_t size;
469 1.2 minoura int nsegments;
470 1.2 minoura bus_size_t maxsegsz;
471 1.2 minoura bus_size_t boundary;
472 1.2 minoura int flags;
473 1.2 minoura bus_dmamap_t *dmamp;
474 1.2 minoura {
475 1.2 minoura struct intio_dma_cookie *cookie;
476 1.2 minoura bus_dmamap_t map;
477 1.2 minoura int error, cookieflags;
478 1.2 minoura void *cookiestore;
479 1.2 minoura size_t cookiesize;
480 1.2 minoura extern paddr_t avail_end;
481 1.2 minoura
482 1.2 minoura /* Call common function to create the basic map. */
483 1.2 minoura error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
484 1.2 minoura flags, dmamp);
485 1.2 minoura if (error)
486 1.2 minoura return (error);
487 1.2 minoura
488 1.2 minoura map = *dmamp;
489 1.2 minoura map->x68k_dm_cookie = NULL;
490 1.2 minoura
491 1.2 minoura cookiesize = sizeof(struct intio_dma_cookie);
492 1.2 minoura
493 1.2 minoura /*
494 1.2 minoura * INTIO only has 24-bits of address space. This means
495 1.2 minoura * we can't DMA to pages over 16M. In order to DMA to
496 1.2 minoura * arbitrary buffers, we use "bounce buffers" - pages
497 1.2 minoura * in memory below the 16M boundary. On DMA reads,
498 1.2 minoura * DMA happens to the bounce buffers, and is copied into
499 1.2 minoura * the caller's buffer. On writes, data is copied into
500 1.2 minoura * but bounce buffer, and the DMA happens from those
501 1.2 minoura * pages. To software using the DMA mapping interface,
502 1.2 minoura * this looks simply like a data cache.
503 1.2 minoura *
504 1.2 minoura * If we have more than 16M of RAM in the system, we may
505 1.2 minoura * need bounce buffers. We check and remember that here.
506 1.2 minoura *
507 1.2 minoura * ...or, there is an opposite case. The most segments
508 1.2 minoura * a transfer will require is (maxxfer / NBPG) + 1. If
509 1.2 minoura * the caller can't handle that many segments (e.g. the
510 1.2 minoura * DMAC), we may have to bounce it as well.
511 1.2 minoura */
512 1.2 minoura if (avail_end <= t->_bounce_thresh)
513 1.2 minoura /* Bouncing not necessary due to memory size. */
514 1.2 minoura map->x68k_dm_bounce_thresh = 0;
515 1.2 minoura cookieflags = 0;
516 1.2 minoura if (map->x68k_dm_bounce_thresh != 0 ||
517 1.2 minoura ((map->x68k_dm_size / NBPG) + 1) > map->x68k_dm_segcnt) {
518 1.2 minoura cookieflags |= ID_MIGHT_NEED_BOUNCE;
519 1.2 minoura cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
520 1.2 minoura }
521 1.2 minoura
522 1.2 minoura /*
523 1.2 minoura * Allocate our cookie.
524 1.2 minoura */
525 1.2 minoura if ((cookiestore = malloc(cookiesize, M_DMAMAP,
526 1.2 minoura (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
527 1.2 minoura error = ENOMEM;
528 1.2 minoura goto out;
529 1.2 minoura }
530 1.2 minoura memset(cookiestore, 0, cookiesize);
531 1.2 minoura cookie = (struct intio_dma_cookie *)cookiestore;
532 1.2 minoura cookie->id_flags = cookieflags;
533 1.2 minoura map->x68k_dm_cookie = cookie;
534 1.2 minoura
535 1.2 minoura if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
536 1.2 minoura /*
537 1.2 minoura * Allocate the bounce pages now if the caller
538 1.2 minoura * wishes us to do so.
539 1.2 minoura */
540 1.2 minoura if ((flags & BUS_DMA_ALLOCNOW) == 0)
541 1.2 minoura goto out;
542 1.2 minoura
543 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
544 1.2 minoura }
545 1.2 minoura
546 1.2 minoura out:
547 1.2 minoura if (error) {
548 1.2 minoura if (map->x68k_dm_cookie != NULL)
549 1.2 minoura free(map->x68k_dm_cookie, M_DMAMAP);
550 1.2 minoura x68k_bus_dmamap_destroy(t, map);
551 1.2 minoura }
552 1.2 minoura return (error);
553 1.2 minoura }
554 1.2 minoura
555 1.2 minoura /*
556 1.2 minoura * Destroy an INTIO DMA map.
557 1.2 minoura */
558 1.2 minoura void
559 1.2 minoura _intio_bus_dmamap_destroy(t, map)
560 1.2 minoura bus_dma_tag_t t;
561 1.2 minoura bus_dmamap_t map;
562 1.2 minoura {
563 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
564 1.2 minoura
565 1.2 minoura /*
566 1.2 minoura * Free any bounce pages this map might hold.
567 1.2 minoura */
568 1.2 minoura if (cookie->id_flags & ID_HAS_BOUNCE)
569 1.2 minoura _intio_dma_free_bouncebuf(t, map);
570 1.2 minoura
571 1.2 minoura free(cookie, M_DMAMAP);
572 1.2 minoura x68k_bus_dmamap_destroy(t, map);
573 1.2 minoura }
574 1.2 minoura
575 1.2 minoura /*
576 1.2 minoura * Load an INTIO DMA map with a linear buffer.
577 1.2 minoura */
578 1.2 minoura int
579 1.2 minoura _intio_bus_dmamap_load(t, map, buf, buflen, p, flags)
580 1.2 minoura bus_dma_tag_t t;
581 1.2 minoura bus_dmamap_t map;
582 1.2 minoura void *buf;
583 1.2 minoura bus_size_t buflen;
584 1.2 minoura struct proc *p;
585 1.2 minoura int flags;
586 1.2 minoura {
587 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
588 1.2 minoura int error;
589 1.2 minoura
590 1.2 minoura /*
591 1.2 minoura * Make sure that on error condition we return "no valid mappings."
592 1.2 minoura */
593 1.2 minoura map->dm_mapsize = 0;
594 1.2 minoura map->dm_nsegs = 0;
595 1.2 minoura
596 1.2 minoura /*
597 1.2 minoura * Try to load the map the normal way. If this errors out,
598 1.2 minoura * and we can bounce, we will.
599 1.2 minoura */
600 1.2 minoura error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
601 1.2 minoura if (error == 0 ||
602 1.2 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
603 1.2 minoura return (error);
604 1.2 minoura
605 1.2 minoura /*
606 1.2 minoura * Allocate bounce pages, if necessary.
607 1.2 minoura */
608 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
609 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
610 1.2 minoura if (error)
611 1.2 minoura return (error);
612 1.2 minoura }
613 1.2 minoura
614 1.2 minoura /*
615 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
616 1.2 minoura * with the bounce buffer.
617 1.2 minoura */
618 1.2 minoura cookie->id_origbuf = buf;
619 1.2 minoura cookie->id_origbuflen = buflen;
620 1.2 minoura cookie->id_buftype = ID_BUFTYPE_LINEAR;
621 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
622 1.2 minoura p, flags);
623 1.2 minoura if (error) {
624 1.2 minoura /*
625 1.2 minoura * Free the bounce pages, unless our resources
626 1.2 minoura * are reserved for our exclusive use.
627 1.2 minoura */
628 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
629 1.2 minoura _intio_dma_free_bouncebuf(t, map);
630 1.2 minoura return (error);
631 1.2 minoura }
632 1.2 minoura
633 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
634 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
635 1.2 minoura return (0);
636 1.2 minoura }
637 1.2 minoura
638 1.2 minoura /*
639 1.2 minoura * Like _intio_bus_dmamap_load(), but for mbufs.
640 1.2 minoura */
641 1.2 minoura int
642 1.2 minoura _intio_bus_dmamap_load_mbuf(t, map, m0, flags)
643 1.2 minoura bus_dma_tag_t t;
644 1.2 minoura bus_dmamap_t map;
645 1.2 minoura struct mbuf *m0;
646 1.2 minoura int flags;
647 1.2 minoura {
648 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
649 1.2 minoura int error;
650 1.2 minoura
651 1.2 minoura /*
652 1.2 minoura * Make sure on error condition we return "no valid mappings."
653 1.2 minoura */
654 1.2 minoura map->dm_mapsize = 0;
655 1.2 minoura map->dm_nsegs = 0;
656 1.2 minoura
657 1.2 minoura #ifdef DIAGNOSTIC
658 1.2 minoura if ((m0->m_flags & M_PKTHDR) == 0)
659 1.2 minoura panic("_intio_bus_dmamap_load_mbuf: no packet header");
660 1.2 minoura #endif
661 1.2 minoura
662 1.2 minoura if (m0->m_pkthdr.len > map->x68k_dm_size)
663 1.2 minoura return (EINVAL);
664 1.2 minoura
665 1.2 minoura /*
666 1.2 minoura * Try to load the map the normal way. If this errors out,
667 1.2 minoura * and we can bounce, we will.
668 1.2 minoura */
669 1.2 minoura error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
670 1.2 minoura if (error == 0 ||
671 1.2 minoura (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
672 1.2 minoura return (error);
673 1.2 minoura
674 1.2 minoura /*
675 1.2 minoura * Allocate bounce pages, if necessary.
676 1.2 minoura */
677 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
678 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
679 1.2 minoura flags);
680 1.2 minoura if (error)
681 1.2 minoura return (error);
682 1.2 minoura }
683 1.2 minoura
684 1.2 minoura /*
685 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
686 1.2 minoura * with the bounce buffer.
687 1.2 minoura */
688 1.2 minoura cookie->id_origbuf = m0;
689 1.2 minoura cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
690 1.2 minoura cookie->id_buftype = ID_BUFTYPE_MBUF;
691 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
692 1.2 minoura m0->m_pkthdr.len, NULL, flags);
693 1.2 minoura if (error) {
694 1.2 minoura /*
695 1.2 minoura * Free the bounce pages, unless our resources
696 1.2 minoura * are reserved for our exclusive use.
697 1.2 minoura */
698 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
699 1.2 minoura _intio_dma_free_bouncebuf(t, map);
700 1.2 minoura return (error);
701 1.2 minoura }
702 1.2 minoura
703 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
704 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
705 1.2 minoura return (0);
706 1.2 minoura }
707 1.2 minoura
708 1.2 minoura /*
709 1.2 minoura * Like _intio_bus_dmamap_load(), but for uios.
710 1.2 minoura */
711 1.2 minoura int
712 1.2 minoura _intio_bus_dmamap_load_uio(t, map, uio, flags)
713 1.2 minoura bus_dma_tag_t t;
714 1.2 minoura bus_dmamap_t map;
715 1.2 minoura struct uio *uio;
716 1.2 minoura int flags;
717 1.2 minoura {
718 1.2 minoura panic("_intio_bus_dmamap_load_uio: not implemented");
719 1.2 minoura }
720 1.2 minoura
721 1.2 minoura /*
722 1.2 minoura * Like _intio_bus_dmamap_load(), but for raw memory allocated with
723 1.2 minoura * bus_dmamem_alloc().
724 1.2 minoura */
725 1.2 minoura int
726 1.2 minoura _intio_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
727 1.2 minoura bus_dma_tag_t t;
728 1.2 minoura bus_dmamap_t map;
729 1.2 minoura bus_dma_segment_t *segs;
730 1.2 minoura int nsegs;
731 1.2 minoura bus_size_t size;
732 1.2 minoura int flags;
733 1.2 minoura {
734 1.2 minoura
735 1.2 minoura panic("_intio_bus_dmamap_load_raw: not implemented");
736 1.2 minoura }
737 1.2 minoura
738 1.2 minoura /*
739 1.2 minoura * Unload an INTIO DMA map.
740 1.2 minoura */
741 1.2 minoura void
742 1.2 minoura _intio_bus_dmamap_unload(t, map)
743 1.2 minoura bus_dma_tag_t t;
744 1.2 minoura bus_dmamap_t map;
745 1.2 minoura {
746 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
747 1.2 minoura
748 1.2 minoura /*
749 1.2 minoura * If we have bounce pages, free them, unless they're
750 1.2 minoura * reserved for our exclusive use.
751 1.2 minoura */
752 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) &&
753 1.2 minoura (map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
754 1.2 minoura _intio_dma_free_bouncebuf(t, map);
755 1.2 minoura
756 1.2 minoura cookie->id_flags &= ~ID_IS_BOUNCING;
757 1.2 minoura cookie->id_buftype = ID_BUFTYPE_INVALID;
758 1.2 minoura
759 1.2 minoura /*
760 1.2 minoura * Do the generic bits of the unload.
761 1.2 minoura */
762 1.2 minoura x68k_bus_dmamap_unload(t, map);
763 1.2 minoura }
764 1.2 minoura
765 1.2 minoura /*
766 1.2 minoura * Synchronize an INTIO DMA map.
767 1.2 minoura */
768 1.2 minoura void
769 1.2 minoura _intio_bus_dmamap_sync(t, map, offset, len, ops)
770 1.2 minoura bus_dma_tag_t t;
771 1.2 minoura bus_dmamap_t map;
772 1.2 minoura bus_addr_t offset;
773 1.2 minoura bus_size_t len;
774 1.2 minoura int ops;
775 1.2 minoura {
776 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
777 1.2 minoura
778 1.2 minoura /*
779 1.2 minoura * Mixing PRE and POST operations is not allowed.
780 1.2 minoura */
781 1.2 minoura if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
782 1.2 minoura (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
783 1.2 minoura panic("_intio_bus_dmamap_sync: mix PRE and POST");
784 1.2 minoura
785 1.2 minoura #ifdef DIAGNOSTIC
786 1.2 minoura if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
787 1.2 minoura if (offset >= map->dm_mapsize)
788 1.2 minoura panic("_intio_bus_dmamap_sync: bad offset");
789 1.2 minoura if (len == 0 || (offset + len) > map->dm_mapsize)
790 1.2 minoura panic("_intio_bus_dmamap_sync: bad length");
791 1.2 minoura }
792 1.2 minoura #endif
793 1.2 minoura
794 1.2 minoura /*
795 1.2 minoura * If we're not bouncing, just return; nothing to do.
796 1.2 minoura */
797 1.2 minoura if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
798 1.2 minoura return;
799 1.2 minoura
800 1.2 minoura switch (cookie->id_buftype) {
801 1.2 minoura case ID_BUFTYPE_LINEAR:
802 1.2 minoura /*
803 1.2 minoura * Nothing to do for pre-read.
804 1.2 minoura */
805 1.2 minoura
806 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
807 1.2 minoura /*
808 1.2 minoura * Copy the caller's buffer to the bounce buffer.
809 1.2 minoura */
810 1.2 minoura memcpy((char *)cookie->id_bouncebuf + offset,
811 1.2 minoura (char *)cookie->id_origbuf + offset, len);
812 1.2 minoura }
813 1.2 minoura
814 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
815 1.2 minoura /*
816 1.2 minoura * Copy the bounce buffer to the caller's buffer.
817 1.2 minoura */
818 1.2 minoura memcpy((char *)cookie->id_origbuf + offset,
819 1.2 minoura (char *)cookie->id_bouncebuf + offset, len);
820 1.2 minoura }
821 1.2 minoura
822 1.2 minoura /*
823 1.2 minoura * Nothing to do for post-write.
824 1.2 minoura */
825 1.2 minoura break;
826 1.2 minoura
827 1.2 minoura case ID_BUFTYPE_MBUF:
828 1.2 minoura {
829 1.2 minoura struct mbuf *m, *m0 = cookie->id_origbuf;
830 1.2 minoura bus_size_t minlen, moff;
831 1.2 minoura
832 1.2 minoura /*
833 1.2 minoura * Nothing to do for pre-read.
834 1.2 minoura */
835 1.2 minoura
836 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
837 1.2 minoura /*
838 1.2 minoura * Copy the caller's buffer to the bounce buffer.
839 1.2 minoura */
840 1.2 minoura m_copydata(m0, offset, len,
841 1.2 minoura (char *)cookie->id_bouncebuf + offset);
842 1.2 minoura }
843 1.2 minoura
844 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
845 1.2 minoura /*
846 1.2 minoura * Copy the bounce buffer to the caller's buffer.
847 1.2 minoura */
848 1.2 minoura for (moff = offset, m = m0; m != NULL && len != 0;
849 1.2 minoura m = m->m_next) {
850 1.2 minoura /* Find the beginning mbuf. */
851 1.2 minoura if (moff >= m->m_len) {
852 1.2 minoura moff -= m->m_len;
853 1.2 minoura continue;
854 1.2 minoura }
855 1.2 minoura
856 1.2 minoura /*
857 1.2 minoura * Now at the first mbuf to sync; nail
858 1.2 minoura * each one until we have exhausted the
859 1.2 minoura * length.
860 1.2 minoura */
861 1.2 minoura minlen = len < m->m_len - moff ?
862 1.2 minoura len : m->m_len - moff;
863 1.2 minoura
864 1.2 minoura memcpy(mtod(m, caddr_t) + moff,
865 1.2 minoura (char *)cookie->id_bouncebuf + offset,
866 1.2 minoura minlen);
867 1.2 minoura
868 1.2 minoura moff = 0;
869 1.2 minoura len -= minlen;
870 1.2 minoura offset += minlen;
871 1.2 minoura }
872 1.2 minoura }
873 1.2 minoura
874 1.2 minoura /*
875 1.2 minoura * Nothing to do for post-write.
876 1.2 minoura */
877 1.2 minoura break;
878 1.2 minoura }
879 1.2 minoura
880 1.2 minoura case ID_BUFTYPE_UIO:
881 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
882 1.2 minoura break;
883 1.2 minoura
884 1.2 minoura case ID_BUFTYPE_RAW:
885 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
886 1.2 minoura break;
887 1.2 minoura
888 1.2 minoura case ID_BUFTYPE_INVALID:
889 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
890 1.2 minoura break;
891 1.2 minoura
892 1.2 minoura default:
893 1.2 minoura printf("unknown buffer type %d\n", cookie->id_buftype);
894 1.2 minoura panic("_intio_bus_dmamap_sync");
895 1.2 minoura }
896 1.2 minoura }
897 1.2 minoura
898 1.2 minoura /*
899 1.2 minoura * Allocate memory safe for INTIO DMA.
900 1.2 minoura */
901 1.2 minoura int
902 1.2 minoura _intio_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
903 1.2 minoura bus_dma_tag_t t;
904 1.2 minoura bus_size_t size, alignment, boundary;
905 1.2 minoura bus_dma_segment_t *segs;
906 1.2 minoura int nsegs;
907 1.2 minoura int *rsegs;
908 1.2 minoura int flags;
909 1.2 minoura {
910 1.2 minoura paddr_t high;
911 1.2 minoura extern paddr_t avail_end;
912 1.2 minoura
913 1.2 minoura if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
914 1.2 minoura high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
915 1.2 minoura else
916 1.2 minoura high = trunc_page(avail_end);
917 1.2 minoura
918 1.2 minoura return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
919 1.2 minoura segs, nsegs, rsegs, flags, 0, high));
920 1.2 minoura }
921 1.2 minoura
922 1.2 minoura /**********************************************************************
923 1.2 minoura * INTIO DMA utility functions
924 1.2 minoura **********************************************************************/
925 1.2 minoura
926 1.2 minoura int
927 1.2 minoura _intio_dma_alloc_bouncebuf(t, map, size, flags)
928 1.2 minoura bus_dma_tag_t t;
929 1.2 minoura bus_dmamap_t map;
930 1.2 minoura bus_size_t size;
931 1.2 minoura int flags;
932 1.2 minoura {
933 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
934 1.2 minoura int error = 0;
935 1.2 minoura
936 1.2 minoura cookie->id_bouncebuflen = round_page(size);
937 1.2 minoura error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
938 1.2 minoura NBPG, map->x68k_dm_boundary, cookie->id_bouncesegs,
939 1.2 minoura map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
940 1.2 minoura if (error)
941 1.2 minoura goto out;
942 1.2 minoura error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
943 1.2 minoura cookie->id_nbouncesegs, cookie->id_bouncebuflen,
944 1.2 minoura (caddr_t *)&cookie->id_bouncebuf, flags);
945 1.2 minoura
946 1.2 minoura out:
947 1.2 minoura if (error) {
948 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
949 1.2 minoura cookie->id_nbouncesegs);
950 1.2 minoura cookie->id_bouncebuflen = 0;
951 1.2 minoura cookie->id_nbouncesegs = 0;
952 1.2 minoura } else {
953 1.2 minoura cookie->id_flags |= ID_HAS_BOUNCE;
954 1.2 minoura }
955 1.2 minoura
956 1.2 minoura return (error);
957 1.2 minoura }
958 1.2 minoura
959 1.2 minoura void
960 1.2 minoura _intio_dma_free_bouncebuf(t, map)
961 1.2 minoura bus_dma_tag_t t;
962 1.2 minoura bus_dmamap_t map;
963 1.2 minoura {
964 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
965 1.2 minoura
966 1.2 minoura x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
967 1.2 minoura cookie->id_bouncebuflen);
968 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
969 1.2 minoura cookie->id_nbouncesegs);
970 1.2 minoura cookie->id_bouncebuflen = 0;
971 1.2 minoura cookie->id_nbouncesegs = 0;
972 1.2 minoura cookie->id_flags &= ~ID_HAS_BOUNCE;
973 1.2 minoura }
974