intio.c revision 1.52 1 1.52 tsutsui /* $NetBSD: intio.c,v 1.52 2022/05/26 14:33:29 tsutsui Exp $ */
2 1.2 minoura
3 1.7 minoura /*-
4 1.35 martin * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 1.2 minoura * All rights reserved.
6 1.2 minoura *
7 1.2 minoura * Redistribution and use in source and binary forms, with or without
8 1.2 minoura * modification, are permitted provided that the following conditions
9 1.2 minoura * are met:
10 1.2 minoura * 1. Redistributions of source code must retain the above copyright
11 1.2 minoura * notice, this list of conditions and the following disclaimer.
12 1.2 minoura * 2. Redistributions in binary form must reproduce the above copyright
13 1.2 minoura * notice, this list of conditions and the following disclaimer in the
14 1.2 minoura * documentation and/or other materials provided with the distribution.
15 1.2 minoura *
16 1.7 minoura * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
17 1.7 minoura * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.7 minoura * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.7 minoura * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
20 1.7 minoura * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 1.7 minoura * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 1.7 minoura * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 1.7 minoura * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 1.7 minoura * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 1.7 minoura * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 1.7 minoura * POSSIBILITY OF SUCH DAMAGE.
27 1.2 minoura */
28 1.2 minoura
29 1.2 minoura /*
30 1.2 minoura * NetBSD/x68k internal I/O virtual bus.
31 1.2 minoura */
32 1.20 lukem
33 1.20 lukem #include <sys/cdefs.h>
34 1.52 tsutsui __KERNEL_RCSID(0, "$NetBSD: intio.c,v 1.52 2022/05/26 14:33:29 tsutsui Exp $");
35 1.2 minoura
36 1.2 minoura #include <sys/param.h>
37 1.2 minoura #include <sys/systm.h>
38 1.2 minoura #include <sys/device.h>
39 1.2 minoura #include <sys/malloc.h>
40 1.2 minoura #include <sys/mbuf.h>
41 1.2 minoura #include <sys/extent.h>
42 1.9 mrg #include <uvm/uvm_extern.h>
43 1.2 minoura
44 1.2 minoura #include <machine/bus.h>
45 1.2 minoura #include <machine/cpu.h>
46 1.2 minoura #include <machine/frame.h>
47 1.2 minoura
48 1.2 minoura #include <arch/x68k/dev/intiovar.h>
49 1.2 minoura
50 1.52 tsutsui #include "ioconf.h"
51 1.2 minoura
52 1.2 minoura /*
53 1.2 minoura * bus_space(9) interface
54 1.2 minoura */
55 1.25 chs static int intio_bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *);
56 1.25 chs static void intio_bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
57 1.25 chs static int intio_bus_space_subregion(bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *);
58 1.2 minoura
59 1.2 minoura static struct x68k_bus_space intio_bus = {
60 1.2 minoura #if 0
61 1.2 minoura X68K_INTIO_BUS,
62 1.2 minoura #endif
63 1.2 minoura intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
64 1.2 minoura x68k_bus_space_alloc, x68k_bus_space_free,
65 1.2 minoura #if 0
66 1.2 minoura x68k_bus_space_barrier,
67 1.2 minoura #endif
68 1.2 minoura
69 1.2 minoura 0
70 1.2 minoura };
71 1.2 minoura
72 1.2 minoura /*
73 1.2 minoura * bus_dma(9) interface
74 1.2 minoura */
75 1.2 minoura #define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
76 1.25 chs int _intio_bus_dmamap_create(bus_dma_tag_t, bus_size_t, int,
77 1.25 chs bus_size_t, bus_size_t, int, bus_dmamap_t *);
78 1.25 chs void _intio_bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
79 1.25 chs int _intio_bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
80 1.25 chs bus_size_t, struct proc *, int);
81 1.25 chs int _intio_bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
82 1.25 chs struct mbuf *, int);
83 1.25 chs int _intio_bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
84 1.25 chs struct uio *, int);
85 1.25 chs int _intio_bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
86 1.25 chs bus_dma_segment_t *, int, bus_size_t, int);
87 1.25 chs void _intio_bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
88 1.25 chs void _intio_bus_dmamap_sync(bus_dma_tag_t, bus_dmamap_t,
89 1.25 chs bus_addr_t, bus_size_t, int);
90 1.25 chs
91 1.25 chs int _intio_bus_dmamem_alloc(bus_dma_tag_t, bus_size_t, bus_size_t,
92 1.25 chs bus_size_t, bus_dma_segment_t *, int, int *, int);
93 1.25 chs
94 1.25 chs int _intio_dma_alloc_bouncebuf(bus_dma_tag_t, bus_dmamap_t,
95 1.25 chs bus_size_t, int);
96 1.25 chs void _intio_dma_free_bouncebuf(bus_dma_tag_t, bus_dmamap_t);
97 1.2 minoura
98 1.2 minoura struct x68k_bus_dma intio_bus_dma = {
99 1.2 minoura INTIO_DMA_BOUNCE_THRESHOLD,
100 1.2 minoura _intio_bus_dmamap_create,
101 1.2 minoura _intio_bus_dmamap_destroy,
102 1.2 minoura _intio_bus_dmamap_load,
103 1.2 minoura _intio_bus_dmamap_load_mbuf,
104 1.2 minoura _intio_bus_dmamap_load_uio,
105 1.2 minoura _intio_bus_dmamap_load_raw,
106 1.2 minoura _intio_bus_dmamap_unload,
107 1.2 minoura _intio_bus_dmamap_sync,
108 1.2 minoura _intio_bus_dmamem_alloc,
109 1.2 minoura x68k_bus_dmamem_free,
110 1.2 minoura x68k_bus_dmamem_map,
111 1.2 minoura x68k_bus_dmamem_unmap,
112 1.2 minoura x68k_bus_dmamem_mmap,
113 1.2 minoura };
114 1.2 minoura
115 1.2 minoura /*
116 1.2 minoura * autoconf stuff
117 1.2 minoura */
118 1.37 isaki static int intio_match(device_t, cfdata_t, void *);
119 1.37 isaki static void intio_attach(device_t, device_t, void *);
120 1.37 isaki static int intio_search(device_t, cfdata_t, const int *, void *);
121 1.25 chs static int intio_print(void *, const char *);
122 1.25 chs static void intio_alloc_system_ports(struct intio_softc*);
123 1.2 minoura
124 1.37 isaki CFATTACH_DECL_NEW(intio, sizeof(struct intio_softc),
125 1.16 thorpej intio_match, intio_attach, NULL, NULL);
126 1.2 minoura
127 1.24 chs static int intio_attached;
128 1.24 chs
129 1.2 minoura static struct intio_interrupt_vector {
130 1.2 minoura intio_intr_handler_t iiv_handler;
131 1.2 minoura void *iiv_arg;
132 1.36 isaki struct evcnt *iiv_evcnt;
133 1.5 minoura } iiv[256] = {{0,},};
134 1.2 minoura
135 1.4 minoura #ifdef DEBUG
136 1.4 minoura int intio_debug = 0;
137 1.4 minoura #endif
138 1.2 minoura
139 1.2 minoura static int
140 1.37 isaki intio_match(device_t parent, cfdata_t cf, void *aux)
141 1.2 minoura {
142 1.25 chs
143 1.2 minoura if (strcmp(aux, intio_cd.cd_name) != 0)
144 1.2 minoura return (0);
145 1.24 chs if (intio_attached)
146 1.2 minoura return (0);
147 1.2 minoura
148 1.2 minoura return (1);
149 1.2 minoura }
150 1.2 minoura
151 1.2 minoura static void
152 1.37 isaki intio_attach(device_t parent, device_t self, void *aux)
153 1.2 minoura {
154 1.37 isaki struct intio_softc *sc = device_private(self);
155 1.2 minoura struct intio_attach_args ia;
156 1.2 minoura
157 1.24 chs intio_attached = 1;
158 1.24 chs
159 1.37 isaki aprint_normal(" mapped at %8p\n", intiobase);
160 1.2 minoura
161 1.2 minoura sc->sc_map = extent_create("intiomap",
162 1.38 isaki INTIOBASE,
163 1.38 isaki INTIOBASE + 0x400000,
164 1.47 chs NULL, 0, EX_WAITOK);
165 1.25 chs intio_alloc_system_ports(sc);
166 1.2 minoura
167 1.2 minoura sc->sc_bst = &intio_bus;
168 1.2 minoura sc->sc_bst->x68k_bus_device = self;
169 1.2 minoura sc->sc_dmat = &intio_bus_dma;
170 1.2 minoura sc->sc_dmac = 0;
171 1.2 minoura
172 1.31 isaki memset(iiv, 0, sizeof(struct intio_interrupt_vector) * 256);
173 1.2 minoura
174 1.2 minoura ia.ia_bst = sc->sc_bst;
175 1.2 minoura ia.ia_dmat = sc->sc_dmat;
176 1.2 minoura
177 1.48 thorpej config_search(self, &ia,
178 1.49 thorpej CFARGS(.search = intio_search));
179 1.2 minoura }
180 1.2 minoura
181 1.2 minoura static int
182 1.37 isaki intio_search(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
183 1.2 minoura {
184 1.37 isaki struct intio_softc *sc = device_private(parent);
185 1.2 minoura struct intio_attach_args *ia = aux;
186 1.2 minoura
187 1.2 minoura ia->ia_bst = sc->sc_bst;
188 1.2 minoura ia->ia_dmat = sc->sc_dmat;
189 1.12 thorpej ia->ia_name = cf->cf_name;
190 1.2 minoura ia->ia_addr = cf->cf_addr;
191 1.2 minoura ia->ia_intr = cf->cf_intr;
192 1.2 minoura ia->ia_dma = cf->cf_dma;
193 1.2 minoura ia->ia_dmaintr = cf->cf_dmaintr;
194 1.2 minoura
195 1.48 thorpej if (config_probe(parent, cf, ia))
196 1.49 thorpej config_attach(parent, cf, ia, intio_print, CFARGS_NONE);
197 1.2 minoura
198 1.2 minoura return (0);
199 1.2 minoura }
200 1.2 minoura
201 1.2 minoura static int
202 1.25 chs intio_print(void *aux, const char *name)
203 1.2 minoura {
204 1.2 minoura struct intio_attach_args *ia = aux;
205 1.2 minoura
206 1.2 minoura /* if (ia->ia_addr > 0) */
207 1.31 isaki aprint_normal(" addr 0x%06x", ia->ia_addr);
208 1.2 minoura if (ia->ia_intr > 0)
209 1.31 isaki aprint_normal(" intr 0x%02x", ia->ia_intr);
210 1.2 minoura if (ia->ia_dma >= 0) {
211 1.31 isaki aprint_normal(" using DMA ch%d", ia->ia_dma);
212 1.2 minoura if (ia->ia_dmaintr > 0)
213 1.31 isaki aprint_normal(" intr 0x%02x and 0x%02x",
214 1.2 minoura ia->ia_dmaintr, ia->ia_dmaintr+1);
215 1.2 minoura }
216 1.2 minoura
217 1.2 minoura return (QUIET);
218 1.2 minoura }
219 1.2 minoura
220 1.2 minoura /*
221 1.2 minoura * intio memory map manager
222 1.2 minoura */
223 1.2 minoura
224 1.2 minoura int
225 1.37 isaki intio_map_allocate_region(device_t parent, struct intio_attach_args *ia,
226 1.25 chs enum intio_map_flag flag)
227 1.2 minoura {
228 1.37 isaki struct intio_softc *sc = device_private(parent);
229 1.2 minoura struct extent *map = sc->sc_map;
230 1.2 minoura int r;
231 1.2 minoura
232 1.31 isaki r = extent_alloc_region(map, ia->ia_addr, ia->ia_size, 0);
233 1.2 minoura #ifdef DEBUG
234 1.4 minoura if (intio_debug)
235 1.31 isaki extent_print(map);
236 1.2 minoura #endif
237 1.2 minoura if (r == 0) {
238 1.2 minoura if (flag != INTIO_MAP_ALLOCATE)
239 1.45 dholland extent_free(map, ia->ia_addr, ia->ia_size, 0);
240 1.2 minoura return 0;
241 1.32 isaki }
242 1.2 minoura
243 1.2 minoura return -1;
244 1.2 minoura }
245 1.2 minoura
246 1.2 minoura int
247 1.37 isaki intio_map_free_region(device_t parent, struct intio_attach_args *ia)
248 1.2 minoura {
249 1.37 isaki struct intio_softc *sc = device_private(parent);
250 1.2 minoura struct extent *map = sc->sc_map;
251 1.2 minoura
252 1.31 isaki extent_free(map, ia->ia_addr, ia->ia_size, 0);
253 1.2 minoura #ifdef DEBUG
254 1.4 minoura if (intio_debug)
255 1.31 isaki extent_print(map);
256 1.2 minoura #endif
257 1.2 minoura return 0;
258 1.2 minoura }
259 1.2 minoura
260 1.2 minoura void
261 1.25 chs intio_alloc_system_ports(struct intio_softc *sc)
262 1.2 minoura {
263 1.31 isaki extent_alloc_region(sc->sc_map, INTIO_SYSPORT, 16, 0);
264 1.31 isaki extent_alloc_region(sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
265 1.2 minoura }
266 1.2 minoura
267 1.2 minoura
268 1.2 minoura /*
269 1.2 minoura * intio bus space stuff.
270 1.2 minoura */
271 1.2 minoura static int
272 1.25 chs intio_bus_space_map(bus_space_tag_t t, bus_addr_t bpa, bus_size_t size,
273 1.25 chs int flags, bus_space_handle_t *bshp)
274 1.2 minoura {
275 1.2 minoura /*
276 1.2 minoura * Intio bus is mapped permanently.
277 1.2 minoura */
278 1.38 isaki *bshp = (bus_space_handle_t)IIOV(bpa);
279 1.38 isaki
280 1.2 minoura /*
281 1.10 isaki * Some devices are mapped on odd or even addresses only.
282 1.2 minoura */
283 1.10 isaki if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_ODD)
284 1.2 minoura *bshp += 0x80000001;
285 1.10 isaki if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_EVEN)
286 1.10 isaki *bshp += 0x80000000;
287 1.2 minoura
288 1.2 minoura return (0);
289 1.2 minoura }
290 1.2 minoura
291 1.2 minoura static void
292 1.25 chs intio_bus_space_unmap(bus_space_tag_t t, bus_space_handle_t bsh,
293 1.25 chs bus_size_t size)
294 1.2 minoura {
295 1.2 minoura return;
296 1.2 minoura }
297 1.2 minoura
298 1.2 minoura static int
299 1.25 chs intio_bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
300 1.25 chs bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp)
301 1.2 minoura {
302 1.2 minoura
303 1.2 minoura *nbshp = bsh + offset;
304 1.2 minoura return (0);
305 1.2 minoura }
306 1.2 minoura
307 1.2 minoura
308 1.2 minoura /*
309 1.2 minoura * interrupt handler
310 1.2 minoura */
311 1.2 minoura int
312 1.25 chs intio_intr_establish(int vector, const char *name, intio_intr_handler_t handler,
313 1.25 chs void *arg)
314 1.2 minoura {
315 1.36 isaki
316 1.36 isaki return intio_intr_establish_ext(vector, name, "intr", handler, arg);
317 1.36 isaki }
318 1.36 isaki
319 1.36 isaki int
320 1.36 isaki intio_intr_establish_ext(int vector, const char *name1, const char *name2,
321 1.36 isaki intio_intr_handler_t handler, void *arg)
322 1.36 isaki {
323 1.36 isaki struct evcnt *evcnt;
324 1.36 isaki
325 1.2 minoura if (vector < 16)
326 1.31 isaki panic("Invalid interrupt vector");
327 1.2 minoura if (iiv[vector].iiv_handler)
328 1.2 minoura return EBUSY;
329 1.36 isaki
330 1.46 chs evcnt = malloc(sizeof(*evcnt), M_DEVBUF, M_WAITOK);
331 1.36 isaki evcnt_attach_dynamic(evcnt, EVCNT_TYPE_INTR, NULL, name1, name2);
332 1.36 isaki
333 1.2 minoura iiv[vector].iiv_handler = handler;
334 1.2 minoura iiv[vector].iiv_arg = arg;
335 1.36 isaki iiv[vector].iiv_evcnt = evcnt;
336 1.2 minoura
337 1.2 minoura return 0;
338 1.2 minoura }
339 1.2 minoura
340 1.2 minoura int
341 1.25 chs intio_intr_disestablish(int vector, void *arg)
342 1.2 minoura {
343 1.2 minoura if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
344 1.2 minoura return EINVAL;
345 1.2 minoura iiv[vector].iiv_handler = 0;
346 1.2 minoura iiv[vector].iiv_arg = 0;
347 1.36 isaki evcnt_detach(iiv[vector].iiv_evcnt);
348 1.36 isaki free(iiv[vector].iiv_evcnt, M_DEVBUF);
349 1.2 minoura
350 1.2 minoura return 0;
351 1.2 minoura }
352 1.2 minoura
353 1.2 minoura int
354 1.25 chs intio_intr(struct frame *frame)
355 1.2 minoura {
356 1.2 minoura int vector = frame->f_vector / 4;
357 1.2 minoura
358 1.2 minoura if (iiv[vector].iiv_handler == 0) {
359 1.31 isaki printf("Stray interrupt: %d type %x, pc %x\n",
360 1.21 nsmrtks vector, frame->f_format, frame->f_pc);
361 1.2 minoura return 0;
362 1.2 minoura }
363 1.2 minoura
364 1.36 isaki iiv[vector].iiv_evcnt->ev_count++;
365 1.2 minoura
366 1.31 isaki return (*(iiv[vector].iiv_handler))(iiv[vector].iiv_arg);
367 1.2 minoura }
368 1.2 minoura
369 1.2 minoura /*
370 1.23 wiz * Intio I/O controller interrupt
371 1.2 minoura */
372 1.3 minoura static u_int8_t intio_ivec = 0;
373 1.3 minoura
374 1.2 minoura void
375 1.25 chs intio_set_ivec(int vec)
376 1.2 minoura {
377 1.2 minoura vec &= 0xfc;
378 1.2 minoura
379 1.2 minoura if (intio_ivec && intio_ivec != (vec & 0xfc))
380 1.31 isaki panic("Wrong interrupt vector for Sicilian.");
381 1.2 minoura
382 1.2 minoura intio_ivec = vec;
383 1.2 minoura intio_set_sicilian_ivec(vec);
384 1.2 minoura }
385 1.2 minoura
386 1.2 minoura
387 1.2 minoura /*
388 1.19 wiz * intio bus DMA stuff. stolen from arch/i386/isa/isa_machdep.c
389 1.2 minoura */
390 1.2 minoura
391 1.2 minoura /*
392 1.2 minoura * Create an INTIO DMA map.
393 1.2 minoura */
394 1.2 minoura int
395 1.25 chs _intio_bus_dmamap_create(bus_dma_tag_t t, bus_size_t size, int nsegments,
396 1.25 chs bus_size_t maxsegsz, bus_size_t boundary, int flags, bus_dmamap_t *dmamp)
397 1.2 minoura {
398 1.2 minoura struct intio_dma_cookie *cookie;
399 1.2 minoura bus_dmamap_t map;
400 1.2 minoura int error, cookieflags;
401 1.2 minoura size_t cookiesize;
402 1.2 minoura extern paddr_t avail_end;
403 1.2 minoura
404 1.2 minoura /* Call common function to create the basic map. */
405 1.2 minoura error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
406 1.2 minoura flags, dmamp);
407 1.2 minoura if (error)
408 1.2 minoura return (error);
409 1.2 minoura
410 1.2 minoura map = *dmamp;
411 1.2 minoura map->x68k_dm_cookie = NULL;
412 1.2 minoura
413 1.2 minoura cookiesize = sizeof(struct intio_dma_cookie);
414 1.2 minoura
415 1.2 minoura /*
416 1.2 minoura * INTIO only has 24-bits of address space. This means
417 1.2 minoura * we can't DMA to pages over 16M. In order to DMA to
418 1.2 minoura * arbitrary buffers, we use "bounce buffers" - pages
419 1.2 minoura * in memory below the 16M boundary. On DMA reads,
420 1.2 minoura * DMA happens to the bounce buffers, and is copied into
421 1.2 minoura * the caller's buffer. On writes, data is copied into
422 1.51 skrll * the bounce buffer, and the DMA happens from those
423 1.2 minoura * pages. To software using the DMA mapping interface,
424 1.2 minoura * this looks simply like a data cache.
425 1.2 minoura *
426 1.2 minoura * If we have more than 16M of RAM in the system, we may
427 1.2 minoura * need bounce buffers. We check and remember that here.
428 1.2 minoura *
429 1.2 minoura * ...or, there is an opposite case. The most segments
430 1.18 thorpej * a transfer will require is (maxxfer / PAGE_SIZE) + 1. If
431 1.2 minoura * the caller can't handle that many segments (e.g. the
432 1.2 minoura * DMAC), we may have to bounce it as well.
433 1.2 minoura */
434 1.2 minoura if (avail_end <= t->_bounce_thresh)
435 1.32 isaki /* Bouncing not necessary due to memory size. */
436 1.2 minoura map->x68k_dm_bounce_thresh = 0;
437 1.2 minoura cookieflags = 0;
438 1.2 minoura if (map->x68k_dm_bounce_thresh != 0 ||
439 1.18 thorpej ((map->x68k_dm_size / PAGE_SIZE) + 1) > map->x68k_dm_segcnt) {
440 1.2 minoura cookieflags |= ID_MIGHT_NEED_BOUNCE;
441 1.2 minoura cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
442 1.2 minoura }
443 1.2 minoura
444 1.2 minoura /*
445 1.2 minoura * Allocate our cookie.
446 1.2 minoura */
447 1.50 skrll cookie = malloc(cookiesize, M_DMAMAP,
448 1.42 isaki ((flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK) | M_ZERO);
449 1.42 isaki if (cookie == NULL) {
450 1.2 minoura error = ENOMEM;
451 1.2 minoura goto out;
452 1.2 minoura }
453 1.2 minoura cookie->id_flags = cookieflags;
454 1.2 minoura map->x68k_dm_cookie = cookie;
455 1.2 minoura
456 1.2 minoura if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
457 1.2 minoura /*
458 1.2 minoura * Allocate the bounce pages now if the caller
459 1.2 minoura * wishes us to do so.
460 1.2 minoura */
461 1.2 minoura if ((flags & BUS_DMA_ALLOCNOW) == 0)
462 1.2 minoura goto out;
463 1.2 minoura
464 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
465 1.2 minoura }
466 1.2 minoura
467 1.2 minoura out:
468 1.2 minoura if (error) {
469 1.2 minoura if (map->x68k_dm_cookie != NULL)
470 1.2 minoura free(map->x68k_dm_cookie, M_DMAMAP);
471 1.2 minoura x68k_bus_dmamap_destroy(t, map);
472 1.2 minoura }
473 1.2 minoura return (error);
474 1.2 minoura }
475 1.2 minoura
476 1.2 minoura /*
477 1.2 minoura * Destroy an INTIO DMA map.
478 1.2 minoura */
479 1.2 minoura void
480 1.25 chs _intio_bus_dmamap_destroy(bus_dma_tag_t t, bus_dmamap_t map)
481 1.2 minoura {
482 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
483 1.2 minoura
484 1.2 minoura /*
485 1.2 minoura * Free any bounce pages this map might hold.
486 1.2 minoura */
487 1.2 minoura if (cookie->id_flags & ID_HAS_BOUNCE)
488 1.2 minoura _intio_dma_free_bouncebuf(t, map);
489 1.2 minoura
490 1.2 minoura free(cookie, M_DMAMAP);
491 1.2 minoura x68k_bus_dmamap_destroy(t, map);
492 1.2 minoura }
493 1.2 minoura
494 1.2 minoura /*
495 1.2 minoura * Load an INTIO DMA map with a linear buffer.
496 1.2 minoura */
497 1.2 minoura int
498 1.25 chs _intio_bus_dmamap_load(bus_dma_tag_t t, bus_dmamap_t map, void *buf,
499 1.25 chs bus_size_t buflen, struct proc *p, int flags)
500 1.2 minoura {
501 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
502 1.2 minoura int error;
503 1.2 minoura
504 1.2 minoura /*
505 1.2 minoura * Make sure that on error condition we return "no valid mappings."
506 1.2 minoura */
507 1.2 minoura map->dm_mapsize = 0;
508 1.2 minoura map->dm_nsegs = 0;
509 1.2 minoura
510 1.2 minoura /*
511 1.2 minoura * Try to load the map the normal way. If this errors out,
512 1.2 minoura * and we can bounce, we will.
513 1.2 minoura */
514 1.2 minoura error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
515 1.44 christos if (error == 0 || (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0)
516 1.2 minoura return (error);
517 1.2 minoura
518 1.2 minoura /*
519 1.2 minoura * Allocate bounce pages, if necessary.
520 1.2 minoura */
521 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
522 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
523 1.2 minoura if (error)
524 1.2 minoura return (error);
525 1.2 minoura }
526 1.2 minoura
527 1.2 minoura /*
528 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
529 1.2 minoura * with the bounce buffer.
530 1.2 minoura */
531 1.2 minoura cookie->id_origbuf = buf;
532 1.2 minoura cookie->id_origbuflen = buflen;
533 1.2 minoura cookie->id_buftype = ID_BUFTYPE_LINEAR;
534 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
535 1.2 minoura p, flags);
536 1.2 minoura if (error) {
537 1.2 minoura /*
538 1.2 minoura * Free the bounce pages, unless our resources
539 1.2 minoura * are reserved for our exclusive use.
540 1.2 minoura */
541 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
542 1.2 minoura _intio_dma_free_bouncebuf(t, map);
543 1.2 minoura return (error);
544 1.2 minoura }
545 1.2 minoura
546 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
547 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
548 1.2 minoura return (0);
549 1.2 minoura }
550 1.2 minoura
551 1.2 minoura /*
552 1.2 minoura * Like _intio_bus_dmamap_load(), but for mbufs.
553 1.2 minoura */
554 1.2 minoura int
555 1.25 chs _intio_bus_dmamap_load_mbuf(bus_dma_tag_t t, bus_dmamap_t map, struct mbuf *m0,
556 1.25 chs int flags)
557 1.2 minoura {
558 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
559 1.2 minoura int error;
560 1.2 minoura
561 1.2 minoura /*
562 1.2 minoura * Make sure on error condition we return "no valid mappings."
563 1.2 minoura */
564 1.2 minoura map->dm_mapsize = 0;
565 1.2 minoura map->dm_nsegs = 0;
566 1.2 minoura
567 1.2 minoura #ifdef DIAGNOSTIC
568 1.2 minoura if ((m0->m_flags & M_PKTHDR) == 0)
569 1.2 minoura panic("_intio_bus_dmamap_load_mbuf: no packet header");
570 1.2 minoura #endif
571 1.2 minoura
572 1.2 minoura if (m0->m_pkthdr.len > map->x68k_dm_size)
573 1.2 minoura return (EINVAL);
574 1.2 minoura
575 1.2 minoura /*
576 1.2 minoura * Try to load the map the normal way. If this errors out,
577 1.2 minoura * and we can bounce, we will.
578 1.2 minoura */
579 1.2 minoura error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
580 1.44 christos if (error == 0 || (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0)
581 1.2 minoura return (error);
582 1.2 minoura
583 1.2 minoura /*
584 1.2 minoura * Allocate bounce pages, if necessary.
585 1.2 minoura */
586 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
587 1.2 minoura error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
588 1.2 minoura flags);
589 1.2 minoura if (error)
590 1.2 minoura return (error);
591 1.2 minoura }
592 1.2 minoura
593 1.2 minoura /*
594 1.2 minoura * Cache a pointer to the caller's buffer and load the DMA map
595 1.2 minoura * with the bounce buffer.
596 1.2 minoura */
597 1.2 minoura cookie->id_origbuf = m0;
598 1.2 minoura cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
599 1.2 minoura cookie->id_buftype = ID_BUFTYPE_MBUF;
600 1.2 minoura error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
601 1.2 minoura m0->m_pkthdr.len, NULL, flags);
602 1.2 minoura if (error) {
603 1.2 minoura /*
604 1.2 minoura * Free the bounce pages, unless our resources
605 1.2 minoura * are reserved for our exclusive use.
606 1.2 minoura */
607 1.2 minoura if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
608 1.2 minoura _intio_dma_free_bouncebuf(t, map);
609 1.2 minoura return (error);
610 1.2 minoura }
611 1.2 minoura
612 1.2 minoura /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
613 1.2 minoura cookie->id_flags |= ID_IS_BOUNCING;
614 1.2 minoura return (0);
615 1.2 minoura }
616 1.2 minoura
617 1.2 minoura /*
618 1.2 minoura * Like _intio_bus_dmamap_load(), but for uios.
619 1.2 minoura */
620 1.2 minoura int
621 1.25 chs _intio_bus_dmamap_load_uio(bus_dma_tag_t t, bus_dmamap_t map, struct uio *uio,
622 1.25 chs int flags)
623 1.2 minoura {
624 1.2 minoura panic("_intio_bus_dmamap_load_uio: not implemented");
625 1.2 minoura }
626 1.2 minoura
627 1.2 minoura /*
628 1.2 minoura * Like _intio_bus_dmamap_load(), but for raw memory allocated with
629 1.2 minoura * bus_dmamem_alloc().
630 1.2 minoura */
631 1.2 minoura int
632 1.25 chs _intio_bus_dmamap_load_raw(bus_dma_tag_t t, bus_dmamap_t map,
633 1.25 chs bus_dma_segment_t *segs, int nsegs, bus_size_t size, int flags)
634 1.2 minoura {
635 1.2 minoura
636 1.2 minoura panic("_intio_bus_dmamap_load_raw: not implemented");
637 1.2 minoura }
638 1.2 minoura
639 1.2 minoura /*
640 1.2 minoura * Unload an INTIO DMA map.
641 1.2 minoura */
642 1.2 minoura void
643 1.25 chs _intio_bus_dmamap_unload(bus_dma_tag_t t, bus_dmamap_t map)
644 1.2 minoura {
645 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
646 1.2 minoura
647 1.2 minoura /*
648 1.2 minoura * If we have bounce pages, free them, unless they're
649 1.2 minoura * reserved for our exclusive use.
650 1.2 minoura */
651 1.2 minoura if ((cookie->id_flags & ID_HAS_BOUNCE) &&
652 1.2 minoura (map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
653 1.2 minoura _intio_dma_free_bouncebuf(t, map);
654 1.2 minoura
655 1.2 minoura cookie->id_flags &= ~ID_IS_BOUNCING;
656 1.2 minoura cookie->id_buftype = ID_BUFTYPE_INVALID;
657 1.2 minoura
658 1.2 minoura /*
659 1.2 minoura * Do the generic bits of the unload.
660 1.2 minoura */
661 1.2 minoura x68k_bus_dmamap_unload(t, map);
662 1.2 minoura }
663 1.2 minoura
664 1.2 minoura /*
665 1.2 minoura * Synchronize an INTIO DMA map.
666 1.2 minoura */
667 1.2 minoura void
668 1.25 chs _intio_bus_dmamap_sync(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
669 1.25 chs bus_size_t len, int ops)
670 1.2 minoura {
671 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
672 1.2 minoura
673 1.2 minoura /*
674 1.2 minoura * Mixing PRE and POST operations is not allowed.
675 1.2 minoura */
676 1.2 minoura if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
677 1.2 minoura (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
678 1.2 minoura panic("_intio_bus_dmamap_sync: mix PRE and POST");
679 1.2 minoura
680 1.2 minoura #ifdef DIAGNOSTIC
681 1.2 minoura if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
682 1.2 minoura if (offset >= map->dm_mapsize)
683 1.2 minoura panic("_intio_bus_dmamap_sync: bad offset");
684 1.2 minoura if (len == 0 || (offset + len) > map->dm_mapsize)
685 1.2 minoura panic("_intio_bus_dmamap_sync: bad length");
686 1.2 minoura }
687 1.2 minoura #endif
688 1.2 minoura
689 1.2 minoura /*
690 1.2 minoura * If we're not bouncing, just return; nothing to do.
691 1.2 minoura */
692 1.2 minoura if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
693 1.2 minoura return;
694 1.2 minoura
695 1.2 minoura switch (cookie->id_buftype) {
696 1.2 minoura case ID_BUFTYPE_LINEAR:
697 1.2 minoura /*
698 1.2 minoura * Nothing to do for pre-read.
699 1.2 minoura */
700 1.2 minoura
701 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
702 1.2 minoura /*
703 1.2 minoura * Copy the caller's buffer to the bounce buffer.
704 1.2 minoura */
705 1.2 minoura memcpy((char *)cookie->id_bouncebuf + offset,
706 1.2 minoura (char *)cookie->id_origbuf + offset, len);
707 1.2 minoura }
708 1.2 minoura
709 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
710 1.2 minoura /*
711 1.2 minoura * Copy the bounce buffer to the caller's buffer.
712 1.2 minoura */
713 1.2 minoura memcpy((char *)cookie->id_origbuf + offset,
714 1.2 minoura (char *)cookie->id_bouncebuf + offset, len);
715 1.2 minoura }
716 1.2 minoura
717 1.2 minoura /*
718 1.2 minoura * Nothing to do for post-write.
719 1.2 minoura */
720 1.2 minoura break;
721 1.2 minoura
722 1.2 minoura case ID_BUFTYPE_MBUF:
723 1.2 minoura {
724 1.2 minoura struct mbuf *m, *m0 = cookie->id_origbuf;
725 1.2 minoura bus_size_t minlen, moff;
726 1.2 minoura
727 1.2 minoura /*
728 1.2 minoura * Nothing to do for pre-read.
729 1.2 minoura */
730 1.2 minoura
731 1.2 minoura if (ops & BUS_DMASYNC_PREWRITE) {
732 1.2 minoura /*
733 1.2 minoura * Copy the caller's buffer to the bounce buffer.
734 1.2 minoura */
735 1.2 minoura m_copydata(m0, offset, len,
736 1.2 minoura (char *)cookie->id_bouncebuf + offset);
737 1.2 minoura }
738 1.2 minoura
739 1.2 minoura if (ops & BUS_DMASYNC_POSTREAD) {
740 1.2 minoura /*
741 1.2 minoura * Copy the bounce buffer to the caller's buffer.
742 1.2 minoura */
743 1.2 minoura for (moff = offset, m = m0; m != NULL && len != 0;
744 1.2 minoura m = m->m_next) {
745 1.2 minoura /* Find the beginning mbuf. */
746 1.2 minoura if (moff >= m->m_len) {
747 1.2 minoura moff -= m->m_len;
748 1.2 minoura continue;
749 1.2 minoura }
750 1.2 minoura
751 1.2 minoura /*
752 1.2 minoura * Now at the first mbuf to sync; nail
753 1.2 minoura * each one until we have exhausted the
754 1.2 minoura * length.
755 1.2 minoura */
756 1.2 minoura minlen = len < m->m_len - moff ?
757 1.2 minoura len : m->m_len - moff;
758 1.2 minoura
759 1.30 he memcpy(mtod(m, char *) + moff,
760 1.2 minoura (char *)cookie->id_bouncebuf + offset,
761 1.2 minoura minlen);
762 1.2 minoura
763 1.2 minoura moff = 0;
764 1.2 minoura len -= minlen;
765 1.2 minoura offset += minlen;
766 1.2 minoura }
767 1.2 minoura }
768 1.2 minoura
769 1.2 minoura /*
770 1.2 minoura * Nothing to do for post-write.
771 1.2 minoura */
772 1.2 minoura break;
773 1.2 minoura }
774 1.2 minoura
775 1.2 minoura case ID_BUFTYPE_UIO:
776 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
777 1.2 minoura break;
778 1.2 minoura
779 1.2 minoura case ID_BUFTYPE_RAW:
780 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
781 1.2 minoura break;
782 1.2 minoura
783 1.2 minoura case ID_BUFTYPE_INVALID:
784 1.2 minoura panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
785 1.2 minoura break;
786 1.2 minoura
787 1.2 minoura default:
788 1.2 minoura printf("unknown buffer type %d\n", cookie->id_buftype);
789 1.2 minoura panic("_intio_bus_dmamap_sync");
790 1.2 minoura }
791 1.2 minoura }
792 1.2 minoura
793 1.2 minoura /*
794 1.2 minoura * Allocate memory safe for INTIO DMA.
795 1.2 minoura */
796 1.2 minoura int
797 1.25 chs _intio_bus_dmamem_alloc(bus_dma_tag_t t, bus_size_t size, bus_size_t alignment,
798 1.25 chs bus_size_t boundary, bus_dma_segment_t *segs, int nsegs, int *rsegs,
799 1.25 chs int flags)
800 1.2 minoura {
801 1.2 minoura paddr_t high;
802 1.2 minoura extern paddr_t avail_end;
803 1.2 minoura
804 1.2 minoura if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
805 1.2 minoura high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
806 1.2 minoura else
807 1.2 minoura high = trunc_page(avail_end);
808 1.2 minoura
809 1.2 minoura return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
810 1.2 minoura segs, nsegs, rsegs, flags, 0, high));
811 1.2 minoura }
812 1.2 minoura
813 1.2 minoura /**********************************************************************
814 1.2 minoura * INTIO DMA utility functions
815 1.2 minoura **********************************************************************/
816 1.2 minoura
817 1.2 minoura int
818 1.25 chs _intio_dma_alloc_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map, bus_size_t size,
819 1.25 chs int flags)
820 1.2 minoura {
821 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
822 1.2 minoura int error = 0;
823 1.2 minoura
824 1.2 minoura cookie->id_bouncebuflen = round_page(size);
825 1.2 minoura error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
826 1.18 thorpej PAGE_SIZE, map->x68k_dm_boundary, cookie->id_bouncesegs,
827 1.2 minoura map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
828 1.2 minoura if (error)
829 1.2 minoura goto out;
830 1.2 minoura error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
831 1.2 minoura cookie->id_nbouncesegs, cookie->id_bouncebuflen,
832 1.29 christos (void **)&cookie->id_bouncebuf, flags);
833 1.2 minoura
834 1.2 minoura out:
835 1.2 minoura if (error) {
836 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
837 1.2 minoura cookie->id_nbouncesegs);
838 1.2 minoura cookie->id_bouncebuflen = 0;
839 1.2 minoura cookie->id_nbouncesegs = 0;
840 1.2 minoura } else {
841 1.2 minoura cookie->id_flags |= ID_HAS_BOUNCE;
842 1.2 minoura }
843 1.2 minoura
844 1.2 minoura return (error);
845 1.2 minoura }
846 1.2 minoura
847 1.2 minoura void
848 1.25 chs _intio_dma_free_bouncebuf(bus_dma_tag_t t, bus_dmamap_t map)
849 1.2 minoura {
850 1.2 minoura struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
851 1.2 minoura
852 1.2 minoura x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
853 1.2 minoura cookie->id_bouncebuflen);
854 1.2 minoura x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
855 1.2 minoura cookie->id_nbouncesegs);
856 1.2 minoura cookie->id_bouncebuflen = 0;
857 1.2 minoura cookie->id_nbouncesegs = 0;
858 1.2 minoura cookie->id_flags &= ~ID_HAS_BOUNCE;
859 1.2 minoura }
860