intio.c revision 1.9.6.4 1 1.9.6.4 thorpej /* $NetBSD: intio.c,v 1.9.6.4 2003/01/03 16:57:17 thorpej Exp $ */
2 1.9.6.2 nathanw
3 1.9.6.2 nathanw /*-
4 1.9.6.2 nathanw * Copyright (c) 1998 NetBSD Foundation, Inc.
5 1.9.6.2 nathanw * All rights reserved.
6 1.9.6.2 nathanw *
7 1.9.6.2 nathanw * Redistribution and use in source and binary forms, with or without
8 1.9.6.2 nathanw * modification, are permitted provided that the following conditions
9 1.9.6.2 nathanw * are met:
10 1.9.6.2 nathanw * 1. Redistributions of source code must retain the above copyright
11 1.9.6.2 nathanw * notice, this list of conditions and the following disclaimer.
12 1.9.6.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
13 1.9.6.2 nathanw * notice, this list of conditions and the following disclaimer in the
14 1.9.6.2 nathanw * documentation and/or other materials provided with the distribution.
15 1.9.6.2 nathanw * 3. All advertising materials mentioning features or use of this software
16 1.9.6.2 nathanw * must display the following acknowledgement:
17 1.9.6.2 nathanw * This product includes software developed by the NetBSD
18 1.9.6.2 nathanw * Foundation, Inc. and its contributors.
19 1.9.6.2 nathanw * 4. Neither the name of The NetBSD Foundation nor the names of its
20 1.9.6.2 nathanw * contributors may be used to endorse or promote products derived
21 1.9.6.2 nathanw * from this software without specific prior written permission.
22 1.9.6.2 nathanw *
23 1.9.6.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 1.9.6.2 nathanw * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 1.9.6.2 nathanw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 1.9.6.2 nathanw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 1.9.6.2 nathanw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 1.9.6.2 nathanw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 1.9.6.2 nathanw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 1.9.6.2 nathanw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 1.9.6.2 nathanw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 1.9.6.2 nathanw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 1.9.6.2 nathanw * POSSIBILITY OF SUCH DAMAGE.
34 1.9.6.2 nathanw */
35 1.9.6.2 nathanw
36 1.9.6.2 nathanw /*
37 1.9.6.2 nathanw * NetBSD/x68k internal I/O virtual bus.
38 1.9.6.2 nathanw */
39 1.9.6.2 nathanw
40 1.9.6.2 nathanw #include <sys/param.h>
41 1.9.6.2 nathanw #include <sys/systm.h>
42 1.9.6.2 nathanw #include <sys/device.h>
43 1.9.6.2 nathanw #include <sys/malloc.h>
44 1.9.6.2 nathanw #include <sys/mbuf.h>
45 1.9.6.2 nathanw #include <sys/extent.h>
46 1.9.6.2 nathanw #include <uvm/uvm_extern.h>
47 1.9.6.2 nathanw
48 1.9.6.2 nathanw #include <machine/bus.h>
49 1.9.6.2 nathanw #include <machine/cpu.h>
50 1.9.6.2 nathanw #include <machine/frame.h>
51 1.9.6.2 nathanw
52 1.9.6.2 nathanw #include <arch/x68k/dev/intiovar.h>
53 1.9.6.2 nathanw #include <arch/x68k/dev/mfp.h>
54 1.9.6.2 nathanw
55 1.9.6.2 nathanw
56 1.9.6.2 nathanw /*
57 1.9.6.2 nathanw * bus_space(9) interface
58 1.9.6.2 nathanw */
59 1.9.6.2 nathanw static int intio_bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *));
60 1.9.6.2 nathanw static void intio_bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
61 1.9.6.2 nathanw static int intio_bus_space_subregion __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *));
62 1.9.6.2 nathanw
63 1.9.6.2 nathanw static struct x68k_bus_space intio_bus = {
64 1.9.6.2 nathanw #if 0
65 1.9.6.2 nathanw X68K_INTIO_BUS,
66 1.9.6.2 nathanw #endif
67 1.9.6.2 nathanw intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
68 1.9.6.2 nathanw x68k_bus_space_alloc, x68k_bus_space_free,
69 1.9.6.2 nathanw #if 0
70 1.9.6.2 nathanw x68k_bus_space_barrier,
71 1.9.6.2 nathanw #endif
72 1.9.6.2 nathanw
73 1.9.6.2 nathanw 0
74 1.9.6.2 nathanw };
75 1.9.6.2 nathanw
76 1.9.6.2 nathanw /*
77 1.9.6.2 nathanw * bus_dma(9) interface
78 1.9.6.2 nathanw */
79 1.9.6.2 nathanw #define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
80 1.9.6.2 nathanw int _intio_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int,
81 1.9.6.2 nathanw bus_size_t, bus_size_t, int, bus_dmamap_t *));
82 1.9.6.2 nathanw void _intio_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
83 1.9.6.2 nathanw int _intio_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
84 1.9.6.2 nathanw bus_size_t, struct proc *, int));
85 1.9.6.2 nathanw int _intio_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
86 1.9.6.2 nathanw struct mbuf *, int));
87 1.9.6.2 nathanw int _intio_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
88 1.9.6.2 nathanw struct uio *, int));
89 1.9.6.2 nathanw int _intio_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
90 1.9.6.2 nathanw bus_dma_segment_t *, int, bus_size_t, int));
91 1.9.6.2 nathanw void _intio_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
92 1.9.6.2 nathanw void _intio_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
93 1.9.6.2 nathanw bus_addr_t, bus_size_t, int));
94 1.9.6.2 nathanw
95 1.9.6.2 nathanw int _intio_bus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
96 1.9.6.2 nathanw bus_size_t, bus_dma_segment_t *, int, int *, int));
97 1.9.6.2 nathanw
98 1.9.6.2 nathanw int _intio_dma_alloc_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t,
99 1.9.6.2 nathanw bus_size_t, int));
100 1.9.6.2 nathanw void _intio_dma_free_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t));
101 1.9.6.2 nathanw
102 1.9.6.2 nathanw struct x68k_bus_dma intio_bus_dma = {
103 1.9.6.2 nathanw INTIO_DMA_BOUNCE_THRESHOLD,
104 1.9.6.2 nathanw _intio_bus_dmamap_create,
105 1.9.6.2 nathanw _intio_bus_dmamap_destroy,
106 1.9.6.2 nathanw _intio_bus_dmamap_load,
107 1.9.6.2 nathanw _intio_bus_dmamap_load_mbuf,
108 1.9.6.2 nathanw _intio_bus_dmamap_load_uio,
109 1.9.6.2 nathanw _intio_bus_dmamap_load_raw,
110 1.9.6.2 nathanw _intio_bus_dmamap_unload,
111 1.9.6.2 nathanw _intio_bus_dmamap_sync,
112 1.9.6.2 nathanw _intio_bus_dmamem_alloc,
113 1.9.6.2 nathanw x68k_bus_dmamem_free,
114 1.9.6.2 nathanw x68k_bus_dmamem_map,
115 1.9.6.2 nathanw x68k_bus_dmamem_unmap,
116 1.9.6.2 nathanw x68k_bus_dmamem_mmap,
117 1.9.6.2 nathanw };
118 1.9.6.2 nathanw
119 1.9.6.2 nathanw /*
120 1.9.6.2 nathanw * autoconf stuff
121 1.9.6.2 nathanw */
122 1.9.6.2 nathanw static int intio_match __P((struct device *, struct cfdata *, void *));
123 1.9.6.2 nathanw static void intio_attach __P((struct device *, struct device *, void *));
124 1.9.6.2 nathanw static int intio_search __P((struct device *, struct cfdata *cf, void *));
125 1.9.6.2 nathanw static int intio_print __P((void *, const char *));
126 1.9.6.2 nathanw static void intio_alloc_system_ports __P((struct intio_softc*));
127 1.9.6.2 nathanw
128 1.9.6.3 nathanw CFATTACH_DECL(intio, sizeof(struct intio_softc),
129 1.9.6.3 nathanw intio_match, intio_attach, NULL, NULL);
130 1.9.6.2 nathanw
131 1.9.6.2 nathanw static struct intio_interrupt_vector {
132 1.9.6.2 nathanw intio_intr_handler_t iiv_handler;
133 1.9.6.2 nathanw void *iiv_arg;
134 1.9.6.2 nathanw int iiv_intrcntoff;
135 1.9.6.2 nathanw } iiv[256] = {{0,},};
136 1.9.6.2 nathanw
137 1.9.6.2 nathanw extern struct cfdriver intio_cd;
138 1.9.6.2 nathanw
139 1.9.6.2 nathanw /* used in console initialization */
140 1.9.6.2 nathanw extern int x68k_realconfig;
141 1.9.6.2 nathanw int x68k_config_found __P((struct cfdata *, struct device *,
142 1.9.6.2 nathanw void *, cfprint_t));
143 1.9.6.2 nathanw static struct cfdata *cfdata_intiobus = NULL;
144 1.9.6.2 nathanw
145 1.9.6.2 nathanw /* other static functions */
146 1.9.6.2 nathanw static int scan_intrnames __P((const char *));
147 1.9.6.2 nathanw #ifdef DEBUG
148 1.9.6.2 nathanw int intio_debug = 0;
149 1.9.6.2 nathanw #endif
150 1.9.6.2 nathanw
151 1.9.6.2 nathanw static int
152 1.9.6.2 nathanw intio_match(parent, cf, aux)
153 1.9.6.2 nathanw struct device *parent;
154 1.9.6.2 nathanw struct cfdata *cf;
155 1.9.6.2 nathanw void *aux; /* NULL */
156 1.9.6.2 nathanw {
157 1.9.6.2 nathanw if (strcmp(aux, intio_cd.cd_name) != 0)
158 1.9.6.2 nathanw return (0);
159 1.9.6.2 nathanw if (cf->cf_unit != 0)
160 1.9.6.2 nathanw return (0);
161 1.9.6.2 nathanw if (x68k_realconfig == 0)
162 1.9.6.2 nathanw cfdata_intiobus = cf; /* XXX */
163 1.9.6.2 nathanw
164 1.9.6.2 nathanw return (1);
165 1.9.6.2 nathanw }
166 1.9.6.2 nathanw
167 1.9.6.2 nathanw
168 1.9.6.2 nathanw /* used in console initialization: configure only MFP */
169 1.9.6.2 nathanw static struct intio_attach_args initial_ia = {
170 1.9.6.2 nathanw &intio_bus,
171 1.9.6.2 nathanw 0/*XXX*/,
172 1.9.6.2 nathanw
173 1.9.6.2 nathanw "mfp", /* ia_name */
174 1.9.6.2 nathanw MFP_ADDR, /* ia_addr */
175 1.9.6.2 nathanw 0x30, /* ia_size */
176 1.9.6.2 nathanw MFP_INTR, /* ia_intr */
177 1.9.6.2 nathanw -1 /* ia_dma */
178 1.9.6.2 nathanw -1, /* ia_dmaintr */
179 1.9.6.2 nathanw };
180 1.9.6.2 nathanw
181 1.9.6.2 nathanw static void
182 1.9.6.2 nathanw intio_attach(parent, self, aux)
183 1.9.6.2 nathanw struct device *parent, *self;
184 1.9.6.2 nathanw void *aux; /* NULL */
185 1.9.6.2 nathanw {
186 1.9.6.2 nathanw struct intio_softc *sc = (struct intio_softc *)self;
187 1.9.6.2 nathanw struct intio_attach_args ia;
188 1.9.6.2 nathanw
189 1.9.6.2 nathanw if (self == NULL) {
190 1.9.6.2 nathanw /* console only init */
191 1.9.6.2 nathanw x68k_config_found(cfdata_intiobus, NULL, &initial_ia, NULL);
192 1.9.6.2 nathanw return;
193 1.9.6.2 nathanw }
194 1.9.6.2 nathanw
195 1.9.6.2 nathanw printf (" mapped at %8p\n", intiobase);
196 1.9.6.2 nathanw
197 1.9.6.2 nathanw sc->sc_map = extent_create("intiomap",
198 1.9.6.2 nathanw PHYS_INTIODEV,
199 1.9.6.2 nathanw PHYS_INTIODEV + 0x400000,
200 1.9.6.2 nathanw M_DEVBUF, NULL, NULL, EX_NOWAIT);
201 1.9.6.2 nathanw intio_alloc_system_ports (sc);
202 1.9.6.2 nathanw
203 1.9.6.2 nathanw sc->sc_bst = &intio_bus;
204 1.9.6.2 nathanw sc->sc_bst->x68k_bus_device = self;
205 1.9.6.2 nathanw sc->sc_dmat = &intio_bus_dma;
206 1.9.6.2 nathanw sc->sc_dmac = 0;
207 1.9.6.2 nathanw
208 1.9.6.2 nathanw memset(iiv, 0, sizeof (struct intio_interrupt_vector) * 256);
209 1.9.6.2 nathanw
210 1.9.6.2 nathanw ia.ia_bst = sc->sc_bst;
211 1.9.6.2 nathanw ia.ia_dmat = sc->sc_dmat;
212 1.9.6.2 nathanw
213 1.9.6.2 nathanw config_search (intio_search, self, &ia);
214 1.9.6.2 nathanw }
215 1.9.6.2 nathanw
216 1.9.6.2 nathanw static int
217 1.9.6.2 nathanw intio_search(parent, cf, aux)
218 1.9.6.2 nathanw struct device *parent;
219 1.9.6.2 nathanw struct cfdata *cf;
220 1.9.6.2 nathanw void *aux;
221 1.9.6.2 nathanw {
222 1.9.6.2 nathanw struct intio_attach_args *ia = aux;
223 1.9.6.2 nathanw struct intio_softc *sc = (struct intio_softc *)parent;
224 1.9.6.2 nathanw
225 1.9.6.2 nathanw ia->ia_bst = sc->sc_bst;
226 1.9.6.2 nathanw ia->ia_dmat = sc->sc_dmat;
227 1.9.6.3 nathanw ia->ia_name = cf->cf_name;
228 1.9.6.2 nathanw ia->ia_addr = cf->cf_addr;
229 1.9.6.2 nathanw ia->ia_intr = cf->cf_intr;
230 1.9.6.2 nathanw ia->ia_dma = cf->cf_dma;
231 1.9.6.2 nathanw ia->ia_dmaintr = cf->cf_dmaintr;
232 1.9.6.2 nathanw
233 1.9.6.3 nathanw if (config_match(parent, cf, ia) > 0)
234 1.9.6.2 nathanw config_attach(parent, cf, ia, intio_print);
235 1.9.6.2 nathanw
236 1.9.6.2 nathanw return (0);
237 1.9.6.2 nathanw }
238 1.9.6.2 nathanw
239 1.9.6.2 nathanw static int
240 1.9.6.2 nathanw intio_print(aux, name)
241 1.9.6.2 nathanw void *aux;
242 1.9.6.2 nathanw const char *name;
243 1.9.6.2 nathanw {
244 1.9.6.2 nathanw struct intio_attach_args *ia = aux;
245 1.9.6.2 nathanw
246 1.9.6.2 nathanw /* if (ia->ia_addr > 0) */
247 1.9.6.4 thorpej aprint_normal (" addr 0x%06x", ia->ia_addr);
248 1.9.6.2 nathanw if (ia->ia_intr > 0)
249 1.9.6.4 thorpej aprint_normal (" intr 0x%02x", ia->ia_intr);
250 1.9.6.2 nathanw if (ia->ia_dma >= 0) {
251 1.9.6.4 thorpej aprint_normal (" using DMA ch%d", ia->ia_dma);
252 1.9.6.2 nathanw if (ia->ia_dmaintr > 0)
253 1.9.6.4 thorpej aprint_normal (" intr 0x%02x and 0x%02x",
254 1.9.6.2 nathanw ia->ia_dmaintr, ia->ia_dmaintr+1);
255 1.9.6.2 nathanw }
256 1.9.6.2 nathanw
257 1.9.6.2 nathanw return (QUIET);
258 1.9.6.2 nathanw }
259 1.9.6.2 nathanw
260 1.9.6.2 nathanw /*
261 1.9.6.2 nathanw * intio memory map manager
262 1.9.6.2 nathanw */
263 1.9.6.2 nathanw
264 1.9.6.2 nathanw int
265 1.9.6.2 nathanw intio_map_allocate_region(parent, ia, flag)
266 1.9.6.2 nathanw struct device *parent;
267 1.9.6.2 nathanw struct intio_attach_args *ia;
268 1.9.6.2 nathanw enum intio_map_flag flag; /* INTIO_MAP_TESTONLY or INTIO_MAP_ALLOCATE */
269 1.9.6.2 nathanw {
270 1.9.6.2 nathanw struct intio_softc *sc = (struct intio_softc*) parent;
271 1.9.6.2 nathanw struct extent *map = sc->sc_map;
272 1.9.6.2 nathanw int r;
273 1.9.6.2 nathanw
274 1.9.6.2 nathanw r = extent_alloc_region (map, ia->ia_addr, ia->ia_size, 0);
275 1.9.6.2 nathanw #ifdef DEBUG
276 1.9.6.2 nathanw if (intio_debug)
277 1.9.6.2 nathanw extent_print (map);
278 1.9.6.2 nathanw #endif
279 1.9.6.2 nathanw if (r == 0) {
280 1.9.6.2 nathanw if (flag != INTIO_MAP_ALLOCATE)
281 1.9.6.2 nathanw extent_free (map, ia->ia_addr, ia->ia_size, 0);
282 1.9.6.2 nathanw return 0;
283 1.9.6.2 nathanw }
284 1.9.6.2 nathanw
285 1.9.6.2 nathanw return -1;
286 1.9.6.2 nathanw }
287 1.9.6.2 nathanw
288 1.9.6.2 nathanw int
289 1.9.6.2 nathanw intio_map_free_region(parent, ia)
290 1.9.6.2 nathanw struct device *parent;
291 1.9.6.2 nathanw struct intio_attach_args *ia;
292 1.9.6.2 nathanw {
293 1.9.6.2 nathanw struct intio_softc *sc = (struct intio_softc*) parent;
294 1.9.6.2 nathanw struct extent *map = sc->sc_map;
295 1.9.6.2 nathanw
296 1.9.6.2 nathanw extent_free (map, ia->ia_addr, ia->ia_size, 0);
297 1.9.6.2 nathanw #ifdef DEBUG
298 1.9.6.2 nathanw if (intio_debug)
299 1.9.6.2 nathanw extent_print (map);
300 1.9.6.2 nathanw #endif
301 1.9.6.2 nathanw return 0;
302 1.9.6.2 nathanw }
303 1.9.6.2 nathanw
304 1.9.6.2 nathanw void
305 1.9.6.2 nathanw intio_alloc_system_ports(sc)
306 1.9.6.2 nathanw struct intio_softc *sc;
307 1.9.6.2 nathanw {
308 1.9.6.2 nathanw extent_alloc_region (sc->sc_map, INTIO_SYSPORT, 16, 0);
309 1.9.6.2 nathanw extent_alloc_region (sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
310 1.9.6.2 nathanw }
311 1.9.6.2 nathanw
312 1.9.6.2 nathanw
313 1.9.6.2 nathanw /*
314 1.9.6.2 nathanw * intio bus space stuff.
315 1.9.6.2 nathanw */
316 1.9.6.2 nathanw static int
317 1.9.6.2 nathanw intio_bus_space_map(t, bpa, size, flags, bshp)
318 1.9.6.2 nathanw bus_space_tag_t t;
319 1.9.6.2 nathanw bus_addr_t bpa;
320 1.9.6.2 nathanw bus_size_t size;
321 1.9.6.2 nathanw int flags;
322 1.9.6.2 nathanw bus_space_handle_t *bshp;
323 1.9.6.2 nathanw {
324 1.9.6.2 nathanw /*
325 1.9.6.2 nathanw * Intio bus is mapped permanently.
326 1.9.6.2 nathanw */
327 1.9.6.2 nathanw *bshp = (bus_space_handle_t)
328 1.9.6.2 nathanw ((u_int) bpa - PHYS_INTIODEV + intiobase);
329 1.9.6.2 nathanw /*
330 1.9.6.2 nathanw * Some devices are mapped on odd or even addresses only.
331 1.9.6.2 nathanw */
332 1.9.6.2 nathanw if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_ODD)
333 1.9.6.2 nathanw *bshp += 0x80000001;
334 1.9.6.2 nathanw if ((flags & BUS_SPACE_MAP_SHIFTED_MASK) == BUS_SPACE_MAP_SHIFTED_EVEN)
335 1.9.6.2 nathanw *bshp += 0x80000000;
336 1.9.6.2 nathanw
337 1.9.6.2 nathanw return (0);
338 1.9.6.2 nathanw }
339 1.9.6.2 nathanw
340 1.9.6.2 nathanw static void
341 1.9.6.2 nathanw intio_bus_space_unmap(t, bsh, size)
342 1.9.6.2 nathanw bus_space_tag_t t;
343 1.9.6.2 nathanw bus_space_handle_t bsh;
344 1.9.6.2 nathanw bus_size_t size;
345 1.9.6.2 nathanw {
346 1.9.6.2 nathanw return;
347 1.9.6.2 nathanw }
348 1.9.6.2 nathanw
349 1.9.6.2 nathanw static int
350 1.9.6.2 nathanw intio_bus_space_subregion(t, bsh, offset, size, nbshp)
351 1.9.6.2 nathanw bus_space_tag_t t;
352 1.9.6.2 nathanw bus_space_handle_t bsh;
353 1.9.6.2 nathanw bus_size_t offset, size;
354 1.9.6.2 nathanw bus_space_handle_t *nbshp;
355 1.9.6.2 nathanw {
356 1.9.6.2 nathanw
357 1.9.6.2 nathanw *nbshp = bsh + offset;
358 1.9.6.2 nathanw return (0);
359 1.9.6.2 nathanw }
360 1.9.6.2 nathanw
361 1.9.6.2 nathanw
362 1.9.6.2 nathanw /*
363 1.9.6.2 nathanw * interrupt handler
364 1.9.6.2 nathanw */
365 1.9.6.2 nathanw int
366 1.9.6.2 nathanw intio_intr_establish (vector, name, handler, arg)
367 1.9.6.2 nathanw int vector;
368 1.9.6.2 nathanw const char *name; /* XXX */
369 1.9.6.2 nathanw intio_intr_handler_t handler;
370 1.9.6.2 nathanw void *arg;
371 1.9.6.2 nathanw {
372 1.9.6.2 nathanw if (vector < 16)
373 1.9.6.2 nathanw panic ("Invalid interrupt vector");
374 1.9.6.2 nathanw if (iiv[vector].iiv_handler)
375 1.9.6.2 nathanw return EBUSY;
376 1.9.6.2 nathanw iiv[vector].iiv_handler = handler;
377 1.9.6.2 nathanw iiv[vector].iiv_arg = arg;
378 1.9.6.2 nathanw iiv[vector].iiv_intrcntoff = scan_intrnames(name);
379 1.9.6.2 nathanw
380 1.9.6.2 nathanw return 0;
381 1.9.6.2 nathanw }
382 1.9.6.2 nathanw
383 1.9.6.2 nathanw static int
384 1.9.6.2 nathanw scan_intrnames (name)
385 1.9.6.2 nathanw const char *name;
386 1.9.6.2 nathanw {
387 1.9.6.2 nathanw extern char intrnames[];
388 1.9.6.2 nathanw extern char eintrnames[];
389 1.9.6.2 nathanw int r = 0;
390 1.9.6.2 nathanw char *p = &intrnames[0];
391 1.9.6.2 nathanw
392 1.9.6.2 nathanw for (;;) {
393 1.9.6.2 nathanw if (*p == 0) { /* new intr */
394 1.9.6.2 nathanw if (p + strlen(name) >= eintrnames)
395 1.9.6.2 nathanw panic ("Interrupt statics buffer overrun.");
396 1.9.6.2 nathanw strcpy (p, name);
397 1.9.6.2 nathanw break;
398 1.9.6.2 nathanw }
399 1.9.6.2 nathanw if (strcmp(p, name) == 0)
400 1.9.6.2 nathanw break;
401 1.9.6.2 nathanw r++;
402 1.9.6.2 nathanw while (*p++ != 0);
403 1.9.6.2 nathanw }
404 1.9.6.2 nathanw
405 1.9.6.2 nathanw return r;
406 1.9.6.2 nathanw }
407 1.9.6.2 nathanw
408 1.9.6.2 nathanw int
409 1.9.6.2 nathanw intio_intr_disestablish (vector, arg)
410 1.9.6.2 nathanw int vector;
411 1.9.6.2 nathanw void *arg;
412 1.9.6.2 nathanw {
413 1.9.6.2 nathanw if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
414 1.9.6.2 nathanw return EINVAL;
415 1.9.6.2 nathanw iiv[vector].iiv_handler = 0;
416 1.9.6.2 nathanw iiv[vector].iiv_arg = 0;
417 1.9.6.2 nathanw
418 1.9.6.2 nathanw return 0;
419 1.9.6.2 nathanw }
420 1.9.6.2 nathanw
421 1.9.6.2 nathanw int
422 1.9.6.2 nathanw intio_intr (frame)
423 1.9.6.2 nathanw struct frame *frame;
424 1.9.6.2 nathanw {
425 1.9.6.2 nathanw int vector = frame->f_vector / 4;
426 1.9.6.2 nathanw extern int intrcnt[];
427 1.9.6.2 nathanw
428 1.9.6.2 nathanw #if 0 /* this is not correct now */
429 1.9.6.2 nathanw /* CAUTION: HERE WE ARE IN SPLHIGH() */
430 1.9.6.2 nathanw /* LOWER TO APPROPRIATE IPL AT VERY FIRST IN THE HANDLER!! */
431 1.9.6.2 nathanw #endif
432 1.9.6.2 nathanw if (iiv[vector].iiv_handler == 0) {
433 1.9.6.2 nathanw printf ("Stray interrupt: %d type %x\n", vector, frame->f_format);
434 1.9.6.2 nathanw return 0;
435 1.9.6.2 nathanw }
436 1.9.6.2 nathanw
437 1.9.6.2 nathanw intrcnt[iiv[vector].iiv_intrcntoff]++;
438 1.9.6.2 nathanw
439 1.9.6.2 nathanw return (*(iiv[vector].iiv_handler)) (iiv[vector].iiv_arg);
440 1.9.6.2 nathanw }
441 1.9.6.2 nathanw
442 1.9.6.2 nathanw /*
443 1.9.6.2 nathanw * Intio I/O controler interrupt
444 1.9.6.2 nathanw */
445 1.9.6.2 nathanw static u_int8_t intio_ivec = 0;
446 1.9.6.2 nathanw
447 1.9.6.2 nathanw void
448 1.9.6.2 nathanw intio_set_ivec (vec)
449 1.9.6.2 nathanw int vec;
450 1.9.6.2 nathanw {
451 1.9.6.2 nathanw vec &= 0xfc;
452 1.9.6.2 nathanw
453 1.9.6.2 nathanw if (intio_ivec && intio_ivec != (vec & 0xfc))
454 1.9.6.2 nathanw panic ("Wrong interrupt vector for Sicilian.");
455 1.9.6.2 nathanw
456 1.9.6.2 nathanw intio_ivec = vec;
457 1.9.6.2 nathanw intio_set_sicilian_ivec(vec);
458 1.9.6.2 nathanw }
459 1.9.6.2 nathanw
460 1.9.6.2 nathanw
461 1.9.6.2 nathanw /*
462 1.9.6.2 nathanw * intio bus dma stuff. stolen from arch/i386/isa/isa_machdep.c
463 1.9.6.2 nathanw */
464 1.9.6.2 nathanw
465 1.9.6.2 nathanw /*
466 1.9.6.2 nathanw * Create an INTIO DMA map.
467 1.9.6.2 nathanw */
468 1.9.6.2 nathanw int
469 1.9.6.2 nathanw _intio_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
470 1.9.6.2 nathanw bus_dma_tag_t t;
471 1.9.6.2 nathanw bus_size_t size;
472 1.9.6.2 nathanw int nsegments;
473 1.9.6.2 nathanw bus_size_t maxsegsz;
474 1.9.6.2 nathanw bus_size_t boundary;
475 1.9.6.2 nathanw int flags;
476 1.9.6.2 nathanw bus_dmamap_t *dmamp;
477 1.9.6.2 nathanw {
478 1.9.6.2 nathanw struct intio_dma_cookie *cookie;
479 1.9.6.2 nathanw bus_dmamap_t map;
480 1.9.6.2 nathanw int error, cookieflags;
481 1.9.6.2 nathanw void *cookiestore;
482 1.9.6.2 nathanw size_t cookiesize;
483 1.9.6.2 nathanw extern paddr_t avail_end;
484 1.9.6.2 nathanw
485 1.9.6.2 nathanw /* Call common function to create the basic map. */
486 1.9.6.2 nathanw error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
487 1.9.6.2 nathanw flags, dmamp);
488 1.9.6.2 nathanw if (error)
489 1.9.6.2 nathanw return (error);
490 1.9.6.2 nathanw
491 1.9.6.2 nathanw map = *dmamp;
492 1.9.6.2 nathanw map->x68k_dm_cookie = NULL;
493 1.9.6.2 nathanw
494 1.9.6.2 nathanw cookiesize = sizeof(struct intio_dma_cookie);
495 1.9.6.2 nathanw
496 1.9.6.2 nathanw /*
497 1.9.6.2 nathanw * INTIO only has 24-bits of address space. This means
498 1.9.6.2 nathanw * we can't DMA to pages over 16M. In order to DMA to
499 1.9.6.2 nathanw * arbitrary buffers, we use "bounce buffers" - pages
500 1.9.6.2 nathanw * in memory below the 16M boundary. On DMA reads,
501 1.9.6.2 nathanw * DMA happens to the bounce buffers, and is copied into
502 1.9.6.2 nathanw * the caller's buffer. On writes, data is copied into
503 1.9.6.2 nathanw * but bounce buffer, and the DMA happens from those
504 1.9.6.2 nathanw * pages. To software using the DMA mapping interface,
505 1.9.6.2 nathanw * this looks simply like a data cache.
506 1.9.6.2 nathanw *
507 1.9.6.2 nathanw * If we have more than 16M of RAM in the system, we may
508 1.9.6.2 nathanw * need bounce buffers. We check and remember that here.
509 1.9.6.2 nathanw *
510 1.9.6.2 nathanw * ...or, there is an opposite case. The most segments
511 1.9.6.2 nathanw * a transfer will require is (maxxfer / NBPG) + 1. If
512 1.9.6.2 nathanw * the caller can't handle that many segments (e.g. the
513 1.9.6.2 nathanw * DMAC), we may have to bounce it as well.
514 1.9.6.2 nathanw */
515 1.9.6.2 nathanw if (avail_end <= t->_bounce_thresh)
516 1.9.6.2 nathanw /* Bouncing not necessary due to memory size. */
517 1.9.6.2 nathanw map->x68k_dm_bounce_thresh = 0;
518 1.9.6.2 nathanw cookieflags = 0;
519 1.9.6.2 nathanw if (map->x68k_dm_bounce_thresh != 0 ||
520 1.9.6.2 nathanw ((map->x68k_dm_size / NBPG) + 1) > map->x68k_dm_segcnt) {
521 1.9.6.2 nathanw cookieflags |= ID_MIGHT_NEED_BOUNCE;
522 1.9.6.2 nathanw cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
523 1.9.6.2 nathanw }
524 1.9.6.2 nathanw
525 1.9.6.2 nathanw /*
526 1.9.6.2 nathanw * Allocate our cookie.
527 1.9.6.2 nathanw */
528 1.9.6.2 nathanw if ((cookiestore = malloc(cookiesize, M_DMAMAP,
529 1.9.6.2 nathanw (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
530 1.9.6.2 nathanw error = ENOMEM;
531 1.9.6.2 nathanw goto out;
532 1.9.6.2 nathanw }
533 1.9.6.2 nathanw memset(cookiestore, 0, cookiesize);
534 1.9.6.2 nathanw cookie = (struct intio_dma_cookie *)cookiestore;
535 1.9.6.2 nathanw cookie->id_flags = cookieflags;
536 1.9.6.2 nathanw map->x68k_dm_cookie = cookie;
537 1.9.6.2 nathanw
538 1.9.6.2 nathanw if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
539 1.9.6.2 nathanw /*
540 1.9.6.2 nathanw * Allocate the bounce pages now if the caller
541 1.9.6.2 nathanw * wishes us to do so.
542 1.9.6.2 nathanw */
543 1.9.6.2 nathanw if ((flags & BUS_DMA_ALLOCNOW) == 0)
544 1.9.6.2 nathanw goto out;
545 1.9.6.2 nathanw
546 1.9.6.2 nathanw error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
547 1.9.6.2 nathanw }
548 1.9.6.2 nathanw
549 1.9.6.2 nathanw out:
550 1.9.6.2 nathanw if (error) {
551 1.9.6.2 nathanw if (map->x68k_dm_cookie != NULL)
552 1.9.6.2 nathanw free(map->x68k_dm_cookie, M_DMAMAP);
553 1.9.6.2 nathanw x68k_bus_dmamap_destroy(t, map);
554 1.9.6.2 nathanw }
555 1.9.6.2 nathanw return (error);
556 1.9.6.2 nathanw }
557 1.9.6.2 nathanw
558 1.9.6.2 nathanw /*
559 1.9.6.2 nathanw * Destroy an INTIO DMA map.
560 1.9.6.2 nathanw */
561 1.9.6.2 nathanw void
562 1.9.6.2 nathanw _intio_bus_dmamap_destroy(t, map)
563 1.9.6.2 nathanw bus_dma_tag_t t;
564 1.9.6.2 nathanw bus_dmamap_t map;
565 1.9.6.2 nathanw {
566 1.9.6.2 nathanw struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
567 1.9.6.2 nathanw
568 1.9.6.2 nathanw /*
569 1.9.6.2 nathanw * Free any bounce pages this map might hold.
570 1.9.6.2 nathanw */
571 1.9.6.2 nathanw if (cookie->id_flags & ID_HAS_BOUNCE)
572 1.9.6.2 nathanw _intio_dma_free_bouncebuf(t, map);
573 1.9.6.2 nathanw
574 1.9.6.2 nathanw free(cookie, M_DMAMAP);
575 1.9.6.2 nathanw x68k_bus_dmamap_destroy(t, map);
576 1.9.6.2 nathanw }
577 1.9.6.2 nathanw
578 1.9.6.2 nathanw /*
579 1.9.6.2 nathanw * Load an INTIO DMA map with a linear buffer.
580 1.9.6.2 nathanw */
581 1.9.6.2 nathanw int
582 1.9.6.2 nathanw _intio_bus_dmamap_load(t, map, buf, buflen, p, flags)
583 1.9.6.2 nathanw bus_dma_tag_t t;
584 1.9.6.2 nathanw bus_dmamap_t map;
585 1.9.6.2 nathanw void *buf;
586 1.9.6.2 nathanw bus_size_t buflen;
587 1.9.6.2 nathanw struct proc *p;
588 1.9.6.2 nathanw int flags;
589 1.9.6.2 nathanw {
590 1.9.6.2 nathanw struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
591 1.9.6.2 nathanw int error;
592 1.9.6.2 nathanw
593 1.9.6.2 nathanw /*
594 1.9.6.2 nathanw * Make sure that on error condition we return "no valid mappings."
595 1.9.6.2 nathanw */
596 1.9.6.2 nathanw map->dm_mapsize = 0;
597 1.9.6.2 nathanw map->dm_nsegs = 0;
598 1.9.6.2 nathanw
599 1.9.6.2 nathanw /*
600 1.9.6.2 nathanw * Try to load the map the normal way. If this errors out,
601 1.9.6.2 nathanw * and we can bounce, we will.
602 1.9.6.2 nathanw */
603 1.9.6.2 nathanw error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
604 1.9.6.2 nathanw if (error == 0 ||
605 1.9.6.2 nathanw (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
606 1.9.6.2 nathanw return (error);
607 1.9.6.2 nathanw
608 1.9.6.2 nathanw /*
609 1.9.6.2 nathanw * Allocate bounce pages, if necessary.
610 1.9.6.2 nathanw */
611 1.9.6.2 nathanw if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
612 1.9.6.2 nathanw error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
613 1.9.6.2 nathanw if (error)
614 1.9.6.2 nathanw return (error);
615 1.9.6.2 nathanw }
616 1.9.6.2 nathanw
617 1.9.6.2 nathanw /*
618 1.9.6.2 nathanw * Cache a pointer to the caller's buffer and load the DMA map
619 1.9.6.2 nathanw * with the bounce buffer.
620 1.9.6.2 nathanw */
621 1.9.6.2 nathanw cookie->id_origbuf = buf;
622 1.9.6.2 nathanw cookie->id_origbuflen = buflen;
623 1.9.6.2 nathanw cookie->id_buftype = ID_BUFTYPE_LINEAR;
624 1.9.6.2 nathanw error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
625 1.9.6.2 nathanw p, flags);
626 1.9.6.2 nathanw if (error) {
627 1.9.6.2 nathanw /*
628 1.9.6.2 nathanw * Free the bounce pages, unless our resources
629 1.9.6.2 nathanw * are reserved for our exclusive use.
630 1.9.6.2 nathanw */
631 1.9.6.2 nathanw if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
632 1.9.6.2 nathanw _intio_dma_free_bouncebuf(t, map);
633 1.9.6.2 nathanw return (error);
634 1.9.6.2 nathanw }
635 1.9.6.2 nathanw
636 1.9.6.2 nathanw /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
637 1.9.6.2 nathanw cookie->id_flags |= ID_IS_BOUNCING;
638 1.9.6.2 nathanw return (0);
639 1.9.6.2 nathanw }
640 1.9.6.2 nathanw
641 1.9.6.2 nathanw /*
642 1.9.6.2 nathanw * Like _intio_bus_dmamap_load(), but for mbufs.
643 1.9.6.2 nathanw */
644 1.9.6.2 nathanw int
645 1.9.6.2 nathanw _intio_bus_dmamap_load_mbuf(t, map, m0, flags)
646 1.9.6.2 nathanw bus_dma_tag_t t;
647 1.9.6.2 nathanw bus_dmamap_t map;
648 1.9.6.2 nathanw struct mbuf *m0;
649 1.9.6.2 nathanw int flags;
650 1.9.6.2 nathanw {
651 1.9.6.2 nathanw struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
652 1.9.6.2 nathanw int error;
653 1.9.6.2 nathanw
654 1.9.6.2 nathanw /*
655 1.9.6.2 nathanw * Make sure on error condition we return "no valid mappings."
656 1.9.6.2 nathanw */
657 1.9.6.2 nathanw map->dm_mapsize = 0;
658 1.9.6.2 nathanw map->dm_nsegs = 0;
659 1.9.6.2 nathanw
660 1.9.6.2 nathanw #ifdef DIAGNOSTIC
661 1.9.6.2 nathanw if ((m0->m_flags & M_PKTHDR) == 0)
662 1.9.6.2 nathanw panic("_intio_bus_dmamap_load_mbuf: no packet header");
663 1.9.6.2 nathanw #endif
664 1.9.6.2 nathanw
665 1.9.6.2 nathanw if (m0->m_pkthdr.len > map->x68k_dm_size)
666 1.9.6.2 nathanw return (EINVAL);
667 1.9.6.2 nathanw
668 1.9.6.2 nathanw /*
669 1.9.6.2 nathanw * Try to load the map the normal way. If this errors out,
670 1.9.6.2 nathanw * and we can bounce, we will.
671 1.9.6.2 nathanw */
672 1.9.6.2 nathanw error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
673 1.9.6.2 nathanw if (error == 0 ||
674 1.9.6.2 nathanw (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
675 1.9.6.2 nathanw return (error);
676 1.9.6.2 nathanw
677 1.9.6.2 nathanw /*
678 1.9.6.2 nathanw * Allocate bounce pages, if necessary.
679 1.9.6.2 nathanw */
680 1.9.6.2 nathanw if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
681 1.9.6.2 nathanw error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
682 1.9.6.2 nathanw flags);
683 1.9.6.2 nathanw if (error)
684 1.9.6.2 nathanw return (error);
685 1.9.6.2 nathanw }
686 1.9.6.2 nathanw
687 1.9.6.2 nathanw /*
688 1.9.6.2 nathanw * Cache a pointer to the caller's buffer and load the DMA map
689 1.9.6.2 nathanw * with the bounce buffer.
690 1.9.6.2 nathanw */
691 1.9.6.2 nathanw cookie->id_origbuf = m0;
692 1.9.6.2 nathanw cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
693 1.9.6.2 nathanw cookie->id_buftype = ID_BUFTYPE_MBUF;
694 1.9.6.2 nathanw error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
695 1.9.6.2 nathanw m0->m_pkthdr.len, NULL, flags);
696 1.9.6.2 nathanw if (error) {
697 1.9.6.2 nathanw /*
698 1.9.6.2 nathanw * Free the bounce pages, unless our resources
699 1.9.6.2 nathanw * are reserved for our exclusive use.
700 1.9.6.2 nathanw */
701 1.9.6.2 nathanw if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
702 1.9.6.2 nathanw _intio_dma_free_bouncebuf(t, map);
703 1.9.6.2 nathanw return (error);
704 1.9.6.2 nathanw }
705 1.9.6.2 nathanw
706 1.9.6.2 nathanw /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
707 1.9.6.2 nathanw cookie->id_flags |= ID_IS_BOUNCING;
708 1.9.6.2 nathanw return (0);
709 1.9.6.2 nathanw }
710 1.9.6.2 nathanw
711 1.9.6.2 nathanw /*
712 1.9.6.2 nathanw * Like _intio_bus_dmamap_load(), but for uios.
713 1.9.6.2 nathanw */
714 1.9.6.2 nathanw int
715 1.9.6.2 nathanw _intio_bus_dmamap_load_uio(t, map, uio, flags)
716 1.9.6.2 nathanw bus_dma_tag_t t;
717 1.9.6.2 nathanw bus_dmamap_t map;
718 1.9.6.2 nathanw struct uio *uio;
719 1.9.6.2 nathanw int flags;
720 1.9.6.2 nathanw {
721 1.9.6.2 nathanw panic("_intio_bus_dmamap_load_uio: not implemented");
722 1.9.6.2 nathanw }
723 1.9.6.2 nathanw
724 1.9.6.2 nathanw /*
725 1.9.6.2 nathanw * Like _intio_bus_dmamap_load(), but for raw memory allocated with
726 1.9.6.2 nathanw * bus_dmamem_alloc().
727 1.9.6.2 nathanw */
728 1.9.6.2 nathanw int
729 1.9.6.2 nathanw _intio_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
730 1.9.6.2 nathanw bus_dma_tag_t t;
731 1.9.6.2 nathanw bus_dmamap_t map;
732 1.9.6.2 nathanw bus_dma_segment_t *segs;
733 1.9.6.2 nathanw int nsegs;
734 1.9.6.2 nathanw bus_size_t size;
735 1.9.6.2 nathanw int flags;
736 1.9.6.2 nathanw {
737 1.9.6.2 nathanw
738 1.9.6.2 nathanw panic("_intio_bus_dmamap_load_raw: not implemented");
739 1.9.6.2 nathanw }
740 1.9.6.2 nathanw
741 1.9.6.2 nathanw /*
742 1.9.6.2 nathanw * Unload an INTIO DMA map.
743 1.9.6.2 nathanw */
744 1.9.6.2 nathanw void
745 1.9.6.2 nathanw _intio_bus_dmamap_unload(t, map)
746 1.9.6.2 nathanw bus_dma_tag_t t;
747 1.9.6.2 nathanw bus_dmamap_t map;
748 1.9.6.2 nathanw {
749 1.9.6.2 nathanw struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
750 1.9.6.2 nathanw
751 1.9.6.2 nathanw /*
752 1.9.6.2 nathanw * If we have bounce pages, free them, unless they're
753 1.9.6.2 nathanw * reserved for our exclusive use.
754 1.9.6.2 nathanw */
755 1.9.6.2 nathanw if ((cookie->id_flags & ID_HAS_BOUNCE) &&
756 1.9.6.2 nathanw (map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
757 1.9.6.2 nathanw _intio_dma_free_bouncebuf(t, map);
758 1.9.6.2 nathanw
759 1.9.6.2 nathanw cookie->id_flags &= ~ID_IS_BOUNCING;
760 1.9.6.2 nathanw cookie->id_buftype = ID_BUFTYPE_INVALID;
761 1.9.6.2 nathanw
762 1.9.6.2 nathanw /*
763 1.9.6.2 nathanw * Do the generic bits of the unload.
764 1.9.6.2 nathanw */
765 1.9.6.2 nathanw x68k_bus_dmamap_unload(t, map);
766 1.9.6.2 nathanw }
767 1.9.6.2 nathanw
768 1.9.6.2 nathanw /*
769 1.9.6.2 nathanw * Synchronize an INTIO DMA map.
770 1.9.6.2 nathanw */
771 1.9.6.2 nathanw void
772 1.9.6.2 nathanw _intio_bus_dmamap_sync(t, map, offset, len, ops)
773 1.9.6.2 nathanw bus_dma_tag_t t;
774 1.9.6.2 nathanw bus_dmamap_t map;
775 1.9.6.2 nathanw bus_addr_t offset;
776 1.9.6.2 nathanw bus_size_t len;
777 1.9.6.2 nathanw int ops;
778 1.9.6.2 nathanw {
779 1.9.6.2 nathanw struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
780 1.9.6.2 nathanw
781 1.9.6.2 nathanw /*
782 1.9.6.2 nathanw * Mixing PRE and POST operations is not allowed.
783 1.9.6.2 nathanw */
784 1.9.6.2 nathanw if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
785 1.9.6.2 nathanw (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
786 1.9.6.2 nathanw panic("_intio_bus_dmamap_sync: mix PRE and POST");
787 1.9.6.2 nathanw
788 1.9.6.2 nathanw #ifdef DIAGNOSTIC
789 1.9.6.2 nathanw if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
790 1.9.6.2 nathanw if (offset >= map->dm_mapsize)
791 1.9.6.2 nathanw panic("_intio_bus_dmamap_sync: bad offset");
792 1.9.6.2 nathanw if (len == 0 || (offset + len) > map->dm_mapsize)
793 1.9.6.2 nathanw panic("_intio_bus_dmamap_sync: bad length");
794 1.9.6.2 nathanw }
795 1.9.6.2 nathanw #endif
796 1.9.6.2 nathanw
797 1.9.6.2 nathanw /*
798 1.9.6.2 nathanw * If we're not bouncing, just return; nothing to do.
799 1.9.6.2 nathanw */
800 1.9.6.2 nathanw if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
801 1.9.6.2 nathanw return;
802 1.9.6.2 nathanw
803 1.9.6.2 nathanw switch (cookie->id_buftype) {
804 1.9.6.2 nathanw case ID_BUFTYPE_LINEAR:
805 1.9.6.2 nathanw /*
806 1.9.6.2 nathanw * Nothing to do for pre-read.
807 1.9.6.2 nathanw */
808 1.9.6.2 nathanw
809 1.9.6.2 nathanw if (ops & BUS_DMASYNC_PREWRITE) {
810 1.9.6.2 nathanw /*
811 1.9.6.2 nathanw * Copy the caller's buffer to the bounce buffer.
812 1.9.6.2 nathanw */
813 1.9.6.2 nathanw memcpy((char *)cookie->id_bouncebuf + offset,
814 1.9.6.2 nathanw (char *)cookie->id_origbuf + offset, len);
815 1.9.6.2 nathanw }
816 1.9.6.2 nathanw
817 1.9.6.2 nathanw if (ops & BUS_DMASYNC_POSTREAD) {
818 1.9.6.2 nathanw /*
819 1.9.6.2 nathanw * Copy the bounce buffer to the caller's buffer.
820 1.9.6.2 nathanw */
821 1.9.6.2 nathanw memcpy((char *)cookie->id_origbuf + offset,
822 1.9.6.2 nathanw (char *)cookie->id_bouncebuf + offset, len);
823 1.9.6.2 nathanw }
824 1.9.6.2 nathanw
825 1.9.6.2 nathanw /*
826 1.9.6.2 nathanw * Nothing to do for post-write.
827 1.9.6.2 nathanw */
828 1.9.6.2 nathanw break;
829 1.9.6.2 nathanw
830 1.9.6.2 nathanw case ID_BUFTYPE_MBUF:
831 1.9.6.2 nathanw {
832 1.9.6.2 nathanw struct mbuf *m, *m0 = cookie->id_origbuf;
833 1.9.6.2 nathanw bus_size_t minlen, moff;
834 1.9.6.2 nathanw
835 1.9.6.2 nathanw /*
836 1.9.6.2 nathanw * Nothing to do for pre-read.
837 1.9.6.2 nathanw */
838 1.9.6.2 nathanw
839 1.9.6.2 nathanw if (ops & BUS_DMASYNC_PREWRITE) {
840 1.9.6.2 nathanw /*
841 1.9.6.2 nathanw * Copy the caller's buffer to the bounce buffer.
842 1.9.6.2 nathanw */
843 1.9.6.2 nathanw m_copydata(m0, offset, len,
844 1.9.6.2 nathanw (char *)cookie->id_bouncebuf + offset);
845 1.9.6.2 nathanw }
846 1.9.6.2 nathanw
847 1.9.6.2 nathanw if (ops & BUS_DMASYNC_POSTREAD) {
848 1.9.6.2 nathanw /*
849 1.9.6.2 nathanw * Copy the bounce buffer to the caller's buffer.
850 1.9.6.2 nathanw */
851 1.9.6.2 nathanw for (moff = offset, m = m0; m != NULL && len != 0;
852 1.9.6.2 nathanw m = m->m_next) {
853 1.9.6.2 nathanw /* Find the beginning mbuf. */
854 1.9.6.2 nathanw if (moff >= m->m_len) {
855 1.9.6.2 nathanw moff -= m->m_len;
856 1.9.6.2 nathanw continue;
857 1.9.6.2 nathanw }
858 1.9.6.2 nathanw
859 1.9.6.2 nathanw /*
860 1.9.6.2 nathanw * Now at the first mbuf to sync; nail
861 1.9.6.2 nathanw * each one until we have exhausted the
862 1.9.6.2 nathanw * length.
863 1.9.6.2 nathanw */
864 1.9.6.2 nathanw minlen = len < m->m_len - moff ?
865 1.9.6.2 nathanw len : m->m_len - moff;
866 1.9.6.2 nathanw
867 1.9.6.2 nathanw memcpy(mtod(m, caddr_t) + moff,
868 1.9.6.2 nathanw (char *)cookie->id_bouncebuf + offset,
869 1.9.6.2 nathanw minlen);
870 1.9.6.2 nathanw
871 1.9.6.2 nathanw moff = 0;
872 1.9.6.2 nathanw len -= minlen;
873 1.9.6.2 nathanw offset += minlen;
874 1.9.6.2 nathanw }
875 1.9.6.2 nathanw }
876 1.9.6.2 nathanw
877 1.9.6.2 nathanw /*
878 1.9.6.2 nathanw * Nothing to do for post-write.
879 1.9.6.2 nathanw */
880 1.9.6.2 nathanw break;
881 1.9.6.2 nathanw }
882 1.9.6.2 nathanw
883 1.9.6.2 nathanw case ID_BUFTYPE_UIO:
884 1.9.6.2 nathanw panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
885 1.9.6.2 nathanw break;
886 1.9.6.2 nathanw
887 1.9.6.2 nathanw case ID_BUFTYPE_RAW:
888 1.9.6.2 nathanw panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
889 1.9.6.2 nathanw break;
890 1.9.6.2 nathanw
891 1.9.6.2 nathanw case ID_BUFTYPE_INVALID:
892 1.9.6.2 nathanw panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
893 1.9.6.2 nathanw break;
894 1.9.6.2 nathanw
895 1.9.6.2 nathanw default:
896 1.9.6.2 nathanw printf("unknown buffer type %d\n", cookie->id_buftype);
897 1.9.6.2 nathanw panic("_intio_bus_dmamap_sync");
898 1.9.6.2 nathanw }
899 1.9.6.2 nathanw }
900 1.9.6.2 nathanw
901 1.9.6.2 nathanw /*
902 1.9.6.2 nathanw * Allocate memory safe for INTIO DMA.
903 1.9.6.2 nathanw */
904 1.9.6.2 nathanw int
905 1.9.6.2 nathanw _intio_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
906 1.9.6.2 nathanw bus_dma_tag_t t;
907 1.9.6.2 nathanw bus_size_t size, alignment, boundary;
908 1.9.6.2 nathanw bus_dma_segment_t *segs;
909 1.9.6.2 nathanw int nsegs;
910 1.9.6.2 nathanw int *rsegs;
911 1.9.6.2 nathanw int flags;
912 1.9.6.2 nathanw {
913 1.9.6.2 nathanw paddr_t high;
914 1.9.6.2 nathanw extern paddr_t avail_end;
915 1.9.6.2 nathanw
916 1.9.6.2 nathanw if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
917 1.9.6.2 nathanw high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
918 1.9.6.2 nathanw else
919 1.9.6.2 nathanw high = trunc_page(avail_end);
920 1.9.6.2 nathanw
921 1.9.6.2 nathanw return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
922 1.9.6.2 nathanw segs, nsegs, rsegs, flags, 0, high));
923 1.9.6.2 nathanw }
924 1.9.6.2 nathanw
925 1.9.6.2 nathanw /**********************************************************************
926 1.9.6.2 nathanw * INTIO DMA utility functions
927 1.9.6.2 nathanw **********************************************************************/
928 1.9.6.2 nathanw
929 1.9.6.2 nathanw int
930 1.9.6.2 nathanw _intio_dma_alloc_bouncebuf(t, map, size, flags)
931 1.9.6.2 nathanw bus_dma_tag_t t;
932 1.9.6.2 nathanw bus_dmamap_t map;
933 1.9.6.2 nathanw bus_size_t size;
934 1.9.6.2 nathanw int flags;
935 1.9.6.2 nathanw {
936 1.9.6.2 nathanw struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
937 1.9.6.2 nathanw int error = 0;
938 1.9.6.2 nathanw
939 1.9.6.2 nathanw cookie->id_bouncebuflen = round_page(size);
940 1.9.6.2 nathanw error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
941 1.9.6.2 nathanw NBPG, map->x68k_dm_boundary, cookie->id_bouncesegs,
942 1.9.6.2 nathanw map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
943 1.9.6.2 nathanw if (error)
944 1.9.6.2 nathanw goto out;
945 1.9.6.2 nathanw error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
946 1.9.6.2 nathanw cookie->id_nbouncesegs, cookie->id_bouncebuflen,
947 1.9.6.2 nathanw (caddr_t *)&cookie->id_bouncebuf, flags);
948 1.9.6.2 nathanw
949 1.9.6.2 nathanw out:
950 1.9.6.2 nathanw if (error) {
951 1.9.6.2 nathanw x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
952 1.9.6.2 nathanw cookie->id_nbouncesegs);
953 1.9.6.2 nathanw cookie->id_bouncebuflen = 0;
954 1.9.6.2 nathanw cookie->id_nbouncesegs = 0;
955 1.9.6.2 nathanw } else {
956 1.9.6.2 nathanw cookie->id_flags |= ID_HAS_BOUNCE;
957 1.9.6.2 nathanw }
958 1.9.6.2 nathanw
959 1.9.6.2 nathanw return (error);
960 1.9.6.2 nathanw }
961 1.9.6.2 nathanw
962 1.9.6.2 nathanw void
963 1.9.6.2 nathanw _intio_dma_free_bouncebuf(t, map)
964 1.9.6.2 nathanw bus_dma_tag_t t;
965 1.9.6.2 nathanw bus_dmamap_t map;
966 1.9.6.2 nathanw {
967 1.9.6.2 nathanw struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
968 1.9.6.2 nathanw
969 1.9.6.2 nathanw x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
970 1.9.6.2 nathanw cookie->id_bouncebuflen);
971 1.9.6.2 nathanw x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
972 1.9.6.2 nathanw cookie->id_nbouncesegs);
973 1.9.6.2 nathanw cookie->id_bouncebuflen = 0;
974 1.9.6.2 nathanw cookie->id_nbouncesegs = 0;
975 1.9.6.2 nathanw cookie->id_flags &= ~ID_HAS_BOUNCE;
976 1.9.6.2 nathanw }
977