intio.c revision 1.2 1 /* $NetBSD: intio.c,v 1.2 1999/03/16 16:30:18 minoura Exp $ */
2
3 /*
4 *
5 * Copyright (c) 1998 NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in the
15 * documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 * must display the following acknowledgement:
18 * This product includes software developed by Charles D. Cranor and
19 * Washington University.
20 * 4. The name of the author may not be used to endorse or promote products
21 * derived from this software without specific prior written permission.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */
34
35 /*
36 * NetBSD/x68k internal I/O virtual bus.
37 */
38
39 #include <sys/param.h>
40 #include <sys/systm.h>
41 #include <sys/device.h>
42 #include <sys/malloc.h>
43 #include <sys/mbuf.h>
44 #include <sys/extent.h>
45 #include <vm/vm.h>
46
47 #include <machine/bus.h>
48 #include <machine/cpu.h>
49 #include <machine/frame.h>
50
51 #include <arch/x68k/dev/intiovar.h>
52 #include <arch/x68k/dev/mfp.h>
53
54
55 /*
56 * bus_space(9) interface
57 */
58 static int intio_bus_space_map __P((bus_space_tag_t, bus_addr_t, bus_size_t, int, bus_space_handle_t *));
59 static void intio_bus_space_unmap __P((bus_space_tag_t, bus_space_handle_t, bus_size_t));
60 static int intio_bus_space_subregion __P((bus_space_tag_t, bus_space_handle_t, bus_size_t, bus_size_t, bus_space_handle_t *));
61
62 static struct x68k_bus_space intio_bus = {
63 #if 0
64 X68K_INTIO_BUS,
65 #endif
66 intio_bus_space_map, intio_bus_space_unmap, intio_bus_space_subregion,
67 x68k_bus_space_alloc, x68k_bus_space_free,
68 #if 0
69 x68k_bus_space_barrier,
70 #endif
71
72 0
73 };
74
75 /*
76 * bus_dma(9) interface
77 */
78 #define INTIO_DMA_BOUNCE_THRESHOLD (16 * 1024 * 1024)
79 int _intio_bus_dmamap_create __P((bus_dma_tag_t, bus_size_t, int,
80 bus_size_t, bus_size_t, int, bus_dmamap_t *));
81 void _intio_bus_dmamap_destroy __P((bus_dma_tag_t, bus_dmamap_t));
82 int _intio_bus_dmamap_load __P((bus_dma_tag_t, bus_dmamap_t, void *,
83 bus_size_t, struct proc *, int));
84 int _intio_bus_dmamap_load_mbuf __P((bus_dma_tag_t, bus_dmamap_t,
85 struct mbuf *, int));
86 int _intio_bus_dmamap_load_uio __P((bus_dma_tag_t, bus_dmamap_t,
87 struct uio *, int));
88 int _intio_bus_dmamap_load_raw __P((bus_dma_tag_t, bus_dmamap_t,
89 bus_dma_segment_t *, int, bus_size_t, int));
90 void _intio_bus_dmamap_unload __P((bus_dma_tag_t, bus_dmamap_t));
91 void _intio_bus_dmamap_sync __P((bus_dma_tag_t, bus_dmamap_t,
92 bus_addr_t, bus_size_t, int));
93
94 int _intio_bus_dmamem_alloc __P((bus_dma_tag_t, bus_size_t, bus_size_t,
95 bus_size_t, bus_dma_segment_t *, int, int *, int));
96
97 int _intio_dma_alloc_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t,
98 bus_size_t, int));
99 void _intio_dma_free_bouncebuf __P((bus_dma_tag_t, bus_dmamap_t));
100
101 struct x68k_bus_dma intio_bus_dma = {
102 INTIO_DMA_BOUNCE_THRESHOLD,
103 _intio_bus_dmamap_create,
104 _intio_bus_dmamap_destroy,
105 _intio_bus_dmamap_load,
106 _intio_bus_dmamap_load_mbuf,
107 _intio_bus_dmamap_load_uio,
108 _intio_bus_dmamap_load_raw,
109 _intio_bus_dmamap_unload,
110 _intio_bus_dmamap_sync,
111 _intio_bus_dmamem_alloc,
112 x68k_bus_dmamem_free,
113 x68k_bus_dmamem_map,
114 x68k_bus_dmamem_unmap,
115 x68k_bus_dmamem_mmap,
116 };
117
118 /*
119 * autoconf stuff
120 */
121 static int intio_match __P((struct device *, struct cfdata *, void *));
122 static void intio_attach __P((struct device *, struct device *, void *));
123 static int intio_search __P((struct device *, struct cfdata *cf, void *));
124 static int intio_print __P((void *, const char *));
125 static void intio_alloc_system_ports __P((struct intio_softc*));
126
127 struct cfattach intio_ca = {
128 sizeof(struct intio_softc), intio_match, intio_attach
129 };
130
131 static struct intio_interrupt_vector {
132 intio_intr_handler_t iiv_handler;
133 void *iiv_arg;
134 int iiv_intrcntoff;
135 } iiv[256] = {0,};
136
137 extern struct cfdriver intio_cd;
138
139 /* used in console initialization */
140 extern int x68k_realconfig;
141 int x68k_config_found __P((struct cfdata *, struct device *,
142 void *, cfprint_t));
143 static struct cfdata *cfdata_intiobus = NULL;
144
145 /* other static functions */
146 static int scan_intrnames __P((const char *));
147
148 static int
149 intio_match(parent, cf, aux)
150 struct device *parent;
151 struct cfdata *cf;
152 void *aux; /* NULL */
153 {
154 if (strcmp(aux, intio_cd.cd_name) != 0)
155 return (0);
156 if (cf->cf_unit != 0)
157 return (0);
158 if (x68k_realconfig == 0)
159 cfdata_intiobus = cf; /* XXX */
160
161 return (1);
162 }
163
164
165 /* used in console initialization: configure only MFP */
166 static struct intio_attach_args initial_ia = {
167 &intio_bus,
168 0/*XXX*/,
169
170 "mfp", /* ia_name */
171 MFP_ADDR, /* ia_addr */
172 MFP_INTR, /* ia_intr */
173 -1 /* ia_dma */
174 -1, /* ia_dmaintr */
175 };
176
177 static void
178 intio_attach(parent, self, aux)
179 struct device *parent, *self;
180 void *aux; /* NULL */
181 {
182 struct intio_softc *sc = (struct intio_softc *)self;
183 struct intio_attach_args ia;
184
185 if (self == NULL) {
186 /* console only init */
187 x68k_config_found(cfdata_intiobus, NULL, &initial_ia, NULL);
188 return;
189 }
190
191 printf (" mapped at %08p\n", intiobase);
192
193 sc->sc_map = extent_create("intiomap",
194 PHYS_INTIODEV,
195 PHYS_INTIODEV + 0x400000,
196 M_DEVBUF, NULL, NULL, EX_NOWAIT);
197 intio_alloc_system_ports (sc);
198
199 sc->sc_bst = &intio_bus;
200 sc->sc_bst->x68k_bus_device = self;
201 sc->sc_dmat = &intio_bus_dma;
202 sc->sc_dmac = 0;
203
204 bzero(iiv, sizeof (struct intio_interrupt_vector) * 256);
205
206 ia.ia_bst = sc->sc_bst;
207 ia.ia_dmat = sc->sc_dmat;
208
209 config_search (intio_search, self, &ia);
210 }
211
212 static int
213 intio_search(parent, cf, aux)
214 struct device *parent;
215 struct cfdata *cf;
216 void *aux;
217 {
218 struct intio_attach_args *ia = aux;
219 struct intio_softc *sc = (struct intio_softc *)parent;
220
221 ia->ia_bst = sc->sc_bst;
222 ia->ia_dmat = sc->sc_dmat;
223 ia->ia_name = cf->cf_driver->cd_name;
224 ia->ia_addr = cf->cf_addr;
225 ia->ia_intr = cf->cf_intr;
226 ia->ia_dma = cf->cf_dma;
227 ia->ia_dmaintr = cf->cf_dmaintr;
228
229 if ((*cf->cf_attach->ca_match)(parent, cf, ia) > 0)
230 config_attach(parent, cf, ia, intio_print);
231
232 return (0);
233 }
234
235 static int
236 intio_print(aux, name)
237 void *aux;
238 const char *name;
239 {
240 struct intio_attach_args *ia = aux;
241
242 /* if (ia->ia_addr > 0) */
243 printf (" addr 0x%06x", ia->ia_addr);
244 if (ia->ia_intr > 0)
245 printf (" intr 0x%02x", ia->ia_intr);
246 if (ia->ia_dma >= 0) {
247 printf (" using DMA ch%d", ia->ia_dma);
248 if (ia->ia_dmaintr > 0)
249 printf (" intr 0x%02x and 0x%02x",
250 ia->ia_dmaintr, ia->ia_dmaintr+1);
251 }
252
253 return (QUIET);
254 }
255
256 /*
257 * intio memory map manager
258 */
259
260 int
261 intio_map_allocate_region(parent, ia, flag)
262 struct device *parent;
263 struct intio_attach_args *ia;
264 enum intio_map_flag flag; /* INTIO_MAP_TESTONLY or INTIO_MAP_ALLOCATE */
265 {
266 struct intio_softc *sc = (struct intio_softc*) parent;
267 struct extent *map = sc->sc_map;
268 int r;
269
270 r = extent_alloc_region (map, ia->ia_addr, ia->ia_size, 0);
271 #ifdef DEBUG
272 extent_print (map);
273 #endif
274 if (r == 0) {
275 if (flag != INTIO_MAP_ALLOCATE)
276 extent_free (map, ia->ia_addr, ia->ia_size, 0);
277 return 0;
278 }
279
280 return -1;
281 }
282
283 int
284 intio_map_free_region(parent, ia)
285 struct device *parent;
286 struct intio_attach_args *ia;
287 {
288 struct intio_softc *sc = (struct intio_softc*) parent;
289 struct extent *map = sc->sc_map;
290
291 extent_free (map, ia->ia_addr, ia->ia_size, 0);
292 #ifdef DEBUG
293 extent_print (map);
294 #endif
295 return 0;
296 }
297
298 void
299 intio_alloc_system_ports(sc)
300 struct intio_softc *sc;
301 {
302 extent_alloc_region (sc->sc_map, INTIO_SYSPORT, 16, 0);
303 extent_alloc_region (sc->sc_map, INTIO_SICILIAN, 0x2000, 0);
304 }
305
306
307 /*
308 * intio bus space stuff.
309 */
310 static int
311 intio_bus_space_map(t, bpa, size, flags, bshp)
312 bus_space_tag_t t;
313 bus_addr_t bpa;
314 bus_size_t size;
315 int flags;
316 bus_space_handle_t *bshp;
317 {
318 /*
319 * Intio bus is mapped permanently.
320 */
321 *bshp = (bus_space_handle_t)
322 ((u_int) bpa - PHYS_INTIODEV + intiobase);
323 /*
324 * Some devices are mapped on odd addresses only.
325 */
326 if (flags & BUS_SPACE_MAP_SHIFTED)
327 *bshp += 0x80000001;
328
329 return (0);
330 }
331
332 static void
333 intio_bus_space_unmap(t, bsh, size)
334 bus_space_tag_t t;
335 bus_space_handle_t bsh;
336 bus_size_t size;
337 {
338 return;
339 }
340
341 static int
342 intio_bus_space_subregion(t, bsh, offset, size, nbshp)
343 bus_space_tag_t t;
344 bus_space_handle_t bsh;
345 bus_size_t offset, size;
346 bus_space_handle_t *nbshp;
347 {
348
349 *nbshp = bsh + offset;
350 return (0);
351 }
352
353
354 /*
355 * interrupt handler
356 */
357 int
358 intio_intr_establish (vector, name, handler, arg)
359 int vector;
360 const char *name; /* XXX */
361 intio_intr_handler_t handler;
362 void *arg;
363 {
364 if (vector < 16)
365 panic ("Invalid interrupt vector");
366 if (iiv[vector].iiv_handler)
367 return EBUSY;
368 iiv[vector].iiv_handler = handler;
369 iiv[vector].iiv_arg = arg;
370 iiv[vector].iiv_intrcntoff = scan_intrnames(name);
371
372 return 0;
373 }
374
375 static int
376 scan_intrnames (name)
377 const char *name;
378 {
379 extern char intrnames[];
380 extern char eintrnames[];
381 int r = 0;
382 char *p = &intrnames[0];
383
384 for (;;) {
385 if (*p == 0) { /* new intr */
386 if (p + strlen(name) >= eintrnames)
387 panic ("Interrupt statics buffer overrun.");
388 strcpy (p, name);
389 break;
390 }
391 if (strcmp(p, name) == 0)
392 break;
393 r++;
394 while (*p++ != 0);
395 }
396
397 return r;
398 }
399
400 int
401 intio_intr_disestablish (vector, arg)
402 int vector;
403 void *arg;
404 {
405 if (iiv[vector].iiv_handler == 0 || iiv[vector].iiv_arg != arg)
406 return EINVAL;
407 iiv[vector].iiv_handler = 0;
408 iiv[vector].iiv_arg = 0;
409
410 return 0;
411 }
412
413 int
414 intio_intr (frame)
415 struct frame *frame;
416 {
417 int vector = frame->f_vector / 4;
418 extern int intrcnt[];
419
420 #if 0 /* this is not correct now */
421 /* CAUTION: HERE WE ARE IN SPLHIGH() */
422 /* LOWER TO APPROPRIATE IPL AT VERY FIRST IN THE HANDLER!! */
423 #endif
424 if (iiv[vector].iiv_handler == 0) {
425 printf ("Stray interrupt: %d type %x\n", vector, frame->f_format);
426 return 0;
427 }
428
429 intrcnt[iiv[vector].iiv_intrcntoff]++;
430
431 return (*(iiv[vector].iiv_handler)) (iiv[vector].iiv_arg);
432 }
433
434 /*
435 * Intio I/O controler interrupt
436 */
437 static intio_ivec = 0;
438 void
439 intio_set_ivec (vec)
440 int vec;
441 {
442 vec &= 0xfc;
443
444 if (intio_ivec && intio_ivec != (vec & 0xfc))
445 panic ("Wrong interrupt vector for Sicilian.");
446
447 intio_ivec = vec;
448 intio_set_sicilian_ivec(vec);
449 }
450
451
452 /*
453 * intio bus dma stuff. stolen from arch/i386/isa/isa_machdep.c
454 */
455
456 /*
457 * Create an INTIO DMA map.
458 */
459 int
460 _intio_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary, flags, dmamp)
461 bus_dma_tag_t t;
462 bus_size_t size;
463 int nsegments;
464 bus_size_t maxsegsz;
465 bus_size_t boundary;
466 int flags;
467 bus_dmamap_t *dmamp;
468 {
469 struct intio_dma_cookie *cookie;
470 bus_dmamap_t map;
471 int error, cookieflags;
472 void *cookiestore;
473 size_t cookiesize;
474 extern paddr_t avail_end;
475
476 /* Call common function to create the basic map. */
477 error = x68k_bus_dmamap_create(t, size, nsegments, maxsegsz, boundary,
478 flags, dmamp);
479 if (error)
480 return (error);
481
482 map = *dmamp;
483 map->x68k_dm_cookie = NULL;
484
485 cookiesize = sizeof(struct intio_dma_cookie);
486
487 /*
488 * INTIO only has 24-bits of address space. This means
489 * we can't DMA to pages over 16M. In order to DMA to
490 * arbitrary buffers, we use "bounce buffers" - pages
491 * in memory below the 16M boundary. On DMA reads,
492 * DMA happens to the bounce buffers, and is copied into
493 * the caller's buffer. On writes, data is copied into
494 * but bounce buffer, and the DMA happens from those
495 * pages. To software using the DMA mapping interface,
496 * this looks simply like a data cache.
497 *
498 * If we have more than 16M of RAM in the system, we may
499 * need bounce buffers. We check and remember that here.
500 *
501 * ...or, there is an opposite case. The most segments
502 * a transfer will require is (maxxfer / NBPG) + 1. If
503 * the caller can't handle that many segments (e.g. the
504 * DMAC), we may have to bounce it as well.
505 */
506 if (avail_end <= t->_bounce_thresh)
507 /* Bouncing not necessary due to memory size. */
508 map->x68k_dm_bounce_thresh = 0;
509 cookieflags = 0;
510 if (map->x68k_dm_bounce_thresh != 0 ||
511 ((map->x68k_dm_size / NBPG) + 1) > map->x68k_dm_segcnt) {
512 cookieflags |= ID_MIGHT_NEED_BOUNCE;
513 cookiesize += (sizeof(bus_dma_segment_t) * map->x68k_dm_segcnt);
514 }
515
516 /*
517 * Allocate our cookie.
518 */
519 if ((cookiestore = malloc(cookiesize, M_DMAMAP,
520 (flags & BUS_DMA_NOWAIT) ? M_NOWAIT : M_WAITOK)) == NULL) {
521 error = ENOMEM;
522 goto out;
523 }
524 memset(cookiestore, 0, cookiesize);
525 cookie = (struct intio_dma_cookie *)cookiestore;
526 cookie->id_flags = cookieflags;
527 map->x68k_dm_cookie = cookie;
528
529 if (cookieflags & ID_MIGHT_NEED_BOUNCE) {
530 /*
531 * Allocate the bounce pages now if the caller
532 * wishes us to do so.
533 */
534 if ((flags & BUS_DMA_ALLOCNOW) == 0)
535 goto out;
536
537 error = _intio_dma_alloc_bouncebuf(t, map, size, flags);
538 }
539
540 out:
541 if (error) {
542 if (map->x68k_dm_cookie != NULL)
543 free(map->x68k_dm_cookie, M_DMAMAP);
544 x68k_bus_dmamap_destroy(t, map);
545 }
546 return (error);
547 }
548
549 /*
550 * Destroy an INTIO DMA map.
551 */
552 void
553 _intio_bus_dmamap_destroy(t, map)
554 bus_dma_tag_t t;
555 bus_dmamap_t map;
556 {
557 struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
558
559 /*
560 * Free any bounce pages this map might hold.
561 */
562 if (cookie->id_flags & ID_HAS_BOUNCE)
563 _intio_dma_free_bouncebuf(t, map);
564
565 free(cookie, M_DMAMAP);
566 x68k_bus_dmamap_destroy(t, map);
567 }
568
569 /*
570 * Load an INTIO DMA map with a linear buffer.
571 */
572 int
573 _intio_bus_dmamap_load(t, map, buf, buflen, p, flags)
574 bus_dma_tag_t t;
575 bus_dmamap_t map;
576 void *buf;
577 bus_size_t buflen;
578 struct proc *p;
579 int flags;
580 {
581 struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
582 int error;
583
584 /*
585 * Make sure that on error condition we return "no valid mappings."
586 */
587 map->dm_mapsize = 0;
588 map->dm_nsegs = 0;
589
590 /*
591 * Try to load the map the normal way. If this errors out,
592 * and we can bounce, we will.
593 */
594 error = x68k_bus_dmamap_load(t, map, buf, buflen, p, flags);
595 if (error == 0 ||
596 (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
597 return (error);
598
599 /*
600 * Allocate bounce pages, if necessary.
601 */
602 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
603 error = _intio_dma_alloc_bouncebuf(t, map, buflen, flags);
604 if (error)
605 return (error);
606 }
607
608 /*
609 * Cache a pointer to the caller's buffer and load the DMA map
610 * with the bounce buffer.
611 */
612 cookie->id_origbuf = buf;
613 cookie->id_origbuflen = buflen;
614 cookie->id_buftype = ID_BUFTYPE_LINEAR;
615 error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf, buflen,
616 p, flags);
617 if (error) {
618 /*
619 * Free the bounce pages, unless our resources
620 * are reserved for our exclusive use.
621 */
622 if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
623 _intio_dma_free_bouncebuf(t, map);
624 return (error);
625 }
626
627 /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
628 cookie->id_flags |= ID_IS_BOUNCING;
629 return (0);
630 }
631
632 /*
633 * Like _intio_bus_dmamap_load(), but for mbufs.
634 */
635 int
636 _intio_bus_dmamap_load_mbuf(t, map, m0, flags)
637 bus_dma_tag_t t;
638 bus_dmamap_t map;
639 struct mbuf *m0;
640 int flags;
641 {
642 struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
643 int error;
644
645 /*
646 * Make sure on error condition we return "no valid mappings."
647 */
648 map->dm_mapsize = 0;
649 map->dm_nsegs = 0;
650
651 #ifdef DIAGNOSTIC
652 if ((m0->m_flags & M_PKTHDR) == 0)
653 panic("_intio_bus_dmamap_load_mbuf: no packet header");
654 #endif
655
656 if (m0->m_pkthdr.len > map->x68k_dm_size)
657 return (EINVAL);
658
659 /*
660 * Try to load the map the normal way. If this errors out,
661 * and we can bounce, we will.
662 */
663 error = x68k_bus_dmamap_load_mbuf(t, map, m0, flags);
664 if (error == 0 ||
665 (error != 0 && (cookie->id_flags & ID_MIGHT_NEED_BOUNCE) == 0))
666 return (error);
667
668 /*
669 * Allocate bounce pages, if necessary.
670 */
671 if ((cookie->id_flags & ID_HAS_BOUNCE) == 0) {
672 error = _intio_dma_alloc_bouncebuf(t, map, m0->m_pkthdr.len,
673 flags);
674 if (error)
675 return (error);
676 }
677
678 /*
679 * Cache a pointer to the caller's buffer and load the DMA map
680 * with the bounce buffer.
681 */
682 cookie->id_origbuf = m0;
683 cookie->id_origbuflen = m0->m_pkthdr.len; /* not really used */
684 cookie->id_buftype = ID_BUFTYPE_MBUF;
685 error = x68k_bus_dmamap_load(t, map, cookie->id_bouncebuf,
686 m0->m_pkthdr.len, NULL, flags);
687 if (error) {
688 /*
689 * Free the bounce pages, unless our resources
690 * are reserved for our exclusive use.
691 */
692 if ((map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
693 _intio_dma_free_bouncebuf(t, map);
694 return (error);
695 }
696
697 /* ...so _intio_bus_dmamap_sync() knows we're bouncing */
698 cookie->id_flags |= ID_IS_BOUNCING;
699 return (0);
700 }
701
702 /*
703 * Like _intio_bus_dmamap_load(), but for uios.
704 */
705 int
706 _intio_bus_dmamap_load_uio(t, map, uio, flags)
707 bus_dma_tag_t t;
708 bus_dmamap_t map;
709 struct uio *uio;
710 int flags;
711 {
712 panic("_intio_bus_dmamap_load_uio: not implemented");
713 }
714
715 /*
716 * Like _intio_bus_dmamap_load(), but for raw memory allocated with
717 * bus_dmamem_alloc().
718 */
719 int
720 _intio_bus_dmamap_load_raw(t, map, segs, nsegs, size, flags)
721 bus_dma_tag_t t;
722 bus_dmamap_t map;
723 bus_dma_segment_t *segs;
724 int nsegs;
725 bus_size_t size;
726 int flags;
727 {
728
729 panic("_intio_bus_dmamap_load_raw: not implemented");
730 }
731
732 /*
733 * Unload an INTIO DMA map.
734 */
735 void
736 _intio_bus_dmamap_unload(t, map)
737 bus_dma_tag_t t;
738 bus_dmamap_t map;
739 {
740 struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
741
742 /*
743 * If we have bounce pages, free them, unless they're
744 * reserved for our exclusive use.
745 */
746 if ((cookie->id_flags & ID_HAS_BOUNCE) &&
747 (map->x68k_dm_flags & BUS_DMA_ALLOCNOW) == 0)
748 _intio_dma_free_bouncebuf(t, map);
749
750 cookie->id_flags &= ~ID_IS_BOUNCING;
751 cookie->id_buftype = ID_BUFTYPE_INVALID;
752
753 /*
754 * Do the generic bits of the unload.
755 */
756 x68k_bus_dmamap_unload(t, map);
757 }
758
759 /*
760 * Synchronize an INTIO DMA map.
761 */
762 void
763 _intio_bus_dmamap_sync(t, map, offset, len, ops)
764 bus_dma_tag_t t;
765 bus_dmamap_t map;
766 bus_addr_t offset;
767 bus_size_t len;
768 int ops;
769 {
770 struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
771
772 /*
773 * Mixing PRE and POST operations is not allowed.
774 */
775 if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
776 (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
777 panic("_intio_bus_dmamap_sync: mix PRE and POST");
778
779 #ifdef DIAGNOSTIC
780 if ((ops & (BUS_DMASYNC_PREWRITE|BUS_DMASYNC_POSTREAD)) != 0) {
781 if (offset >= map->dm_mapsize)
782 panic("_intio_bus_dmamap_sync: bad offset");
783 if (len == 0 || (offset + len) > map->dm_mapsize)
784 panic("_intio_bus_dmamap_sync: bad length");
785 }
786 #endif
787
788 /*
789 * If we're not bouncing, just return; nothing to do.
790 */
791 if ((cookie->id_flags & ID_IS_BOUNCING) == 0)
792 return;
793
794 switch (cookie->id_buftype) {
795 case ID_BUFTYPE_LINEAR:
796 /*
797 * Nothing to do for pre-read.
798 */
799
800 if (ops & BUS_DMASYNC_PREWRITE) {
801 /*
802 * Copy the caller's buffer to the bounce buffer.
803 */
804 memcpy((char *)cookie->id_bouncebuf + offset,
805 (char *)cookie->id_origbuf + offset, len);
806 }
807
808 if (ops & BUS_DMASYNC_POSTREAD) {
809 /*
810 * Copy the bounce buffer to the caller's buffer.
811 */
812 memcpy((char *)cookie->id_origbuf + offset,
813 (char *)cookie->id_bouncebuf + offset, len);
814 }
815
816 /*
817 * Nothing to do for post-write.
818 */
819 break;
820
821 case ID_BUFTYPE_MBUF:
822 {
823 struct mbuf *m, *m0 = cookie->id_origbuf;
824 bus_size_t minlen, moff;
825
826 /*
827 * Nothing to do for pre-read.
828 */
829
830 if (ops & BUS_DMASYNC_PREWRITE) {
831 /*
832 * Copy the caller's buffer to the bounce buffer.
833 */
834 m_copydata(m0, offset, len,
835 (char *)cookie->id_bouncebuf + offset);
836 }
837
838 if (ops & BUS_DMASYNC_POSTREAD) {
839 /*
840 * Copy the bounce buffer to the caller's buffer.
841 */
842 for (moff = offset, m = m0; m != NULL && len != 0;
843 m = m->m_next) {
844 /* Find the beginning mbuf. */
845 if (moff >= m->m_len) {
846 moff -= m->m_len;
847 continue;
848 }
849
850 /*
851 * Now at the first mbuf to sync; nail
852 * each one until we have exhausted the
853 * length.
854 */
855 minlen = len < m->m_len - moff ?
856 len : m->m_len - moff;
857
858 memcpy(mtod(m, caddr_t) + moff,
859 (char *)cookie->id_bouncebuf + offset,
860 minlen);
861
862 moff = 0;
863 len -= minlen;
864 offset += minlen;
865 }
866 }
867
868 /*
869 * Nothing to do for post-write.
870 */
871 break;
872 }
873
874 case ID_BUFTYPE_UIO:
875 panic("_intio_bus_dmamap_sync: ID_BUFTYPE_UIO");
876 break;
877
878 case ID_BUFTYPE_RAW:
879 panic("_intio_bus_dmamap_sync: ID_BUFTYPE_RAW");
880 break;
881
882 case ID_BUFTYPE_INVALID:
883 panic("_intio_bus_dmamap_sync: ID_BUFTYPE_INVALID");
884 break;
885
886 default:
887 printf("unknown buffer type %d\n", cookie->id_buftype);
888 panic("_intio_bus_dmamap_sync");
889 }
890 }
891
892 /*
893 * Allocate memory safe for INTIO DMA.
894 */
895 int
896 _intio_bus_dmamem_alloc(t, size, alignment, boundary, segs, nsegs, rsegs, flags)
897 bus_dma_tag_t t;
898 bus_size_t size, alignment, boundary;
899 bus_dma_segment_t *segs;
900 int nsegs;
901 int *rsegs;
902 int flags;
903 {
904 paddr_t high;
905 extern paddr_t avail_end;
906
907 if (avail_end > INTIO_DMA_BOUNCE_THRESHOLD)
908 high = trunc_page(INTIO_DMA_BOUNCE_THRESHOLD);
909 else
910 high = trunc_page(avail_end);
911
912 return (x68k_bus_dmamem_alloc_range(t, size, alignment, boundary,
913 segs, nsegs, rsegs, flags, 0, high));
914 }
915
916 /**********************************************************************
917 * INTIO DMA utility functions
918 **********************************************************************/
919
920 int
921 _intio_dma_alloc_bouncebuf(t, map, size, flags)
922 bus_dma_tag_t t;
923 bus_dmamap_t map;
924 bus_size_t size;
925 int flags;
926 {
927 struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
928 int error = 0;
929
930 cookie->id_bouncebuflen = round_page(size);
931 error = _intio_bus_dmamem_alloc(t, cookie->id_bouncebuflen,
932 NBPG, map->x68k_dm_boundary, cookie->id_bouncesegs,
933 map->x68k_dm_segcnt, &cookie->id_nbouncesegs, flags);
934 if (error)
935 goto out;
936 error = x68k_bus_dmamem_map(t, cookie->id_bouncesegs,
937 cookie->id_nbouncesegs, cookie->id_bouncebuflen,
938 (caddr_t *)&cookie->id_bouncebuf, flags);
939
940 out:
941 if (error) {
942 x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
943 cookie->id_nbouncesegs);
944 cookie->id_bouncebuflen = 0;
945 cookie->id_nbouncesegs = 0;
946 } else {
947 cookie->id_flags |= ID_HAS_BOUNCE;
948 }
949
950 return (error);
951 }
952
953 void
954 _intio_dma_free_bouncebuf(t, map)
955 bus_dma_tag_t t;
956 bus_dmamap_t map;
957 {
958 struct intio_dma_cookie *cookie = map->x68k_dm_cookie;
959
960 x68k_bus_dmamem_unmap(t, cookie->id_bouncebuf,
961 cookie->id_bouncebuflen);
962 x68k_bus_dmamem_free(t, cookie->id_bouncesegs,
963 cookie->id_nbouncesegs);
964 cookie->id_bouncebuflen = 0;
965 cookie->id_nbouncesegs = 0;
966 cookie->id_flags &= ~ID_HAS_BOUNCE;
967 }
968