nxpiic_acpi.c revision 1.4
11.4Sthorpej/* $NetBSD: nxpiic_acpi.c,v 1.4 2021/01/29 02:26:58 thorpej Exp $ */ 21.1Sjmcneill 31.1Sjmcneill/*- 41.1Sjmcneill * Copyright (c) 2021 The NetBSD Foundation, Inc. 51.1Sjmcneill * All rights reserved. 61.1Sjmcneill * 71.1Sjmcneill * This code is derived from software contributed to The NetBSD Foundation 81.1Sjmcneill * by Jared McNeill <jmcneill@invisible.ca>. 91.1Sjmcneill * 101.1Sjmcneill * Redistribution and use in source and binary forms, with or without 111.1Sjmcneill * modification, are permitted provided that the following conditions 121.1Sjmcneill * are met: 131.1Sjmcneill * 1. Redistributions of source code must retain the above copyright 141.1Sjmcneill * notice, this list of conditions and the following disclaimer. 151.1Sjmcneill * 2. Redistributions in binary form must reproduce the above copyright 161.1Sjmcneill * notice, this list of conditions and the following disclaimer in the 171.1Sjmcneill * documentation and/or other materials provided with the distribution. 181.1Sjmcneill * 191.1Sjmcneill * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 201.1Sjmcneill * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 211.1Sjmcneill * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 221.1Sjmcneill * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 231.1Sjmcneill * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 241.1Sjmcneill * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 251.1Sjmcneill * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 261.1Sjmcneill * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 271.1Sjmcneill * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 281.1Sjmcneill * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 291.1Sjmcneill * POSSIBILITY OF SUCH DAMAGE. 301.1Sjmcneill */ 311.1Sjmcneill 321.1Sjmcneill#include <sys/cdefs.h> 331.4Sthorpej__KERNEL_RCSID(0, "$NetBSD: nxpiic_acpi.c,v 1.4 2021/01/29 02:26:58 thorpej Exp $"); 341.1Sjmcneill 351.1Sjmcneill#include <sys/param.h> 361.1Sjmcneill#include <sys/bus.h> 371.1Sjmcneill#include <sys/cpu.h> 381.1Sjmcneill#include <sys/device.h> 391.1Sjmcneill 401.1Sjmcneill#include <dev/acpi/acpireg.h> 411.1Sjmcneill#include <dev/acpi/acpivar.h> 421.1Sjmcneill#include <dev/acpi/acpi_intr.h> 431.1Sjmcneill#include <dev/acpi/acpi_i2c.h> 441.1Sjmcneill 451.1Sjmcneill#include <dev/i2c/motoi2cvar.h> 461.1Sjmcneill#include <dev/i2c/motoi2creg.h> 471.1Sjmcneill 481.2Sjmcneill#define NXPIIC_SPEED_STD 100000 491.2Sjmcneill 501.2Sjmcneillstatic const struct clk_div { 511.2Sjmcneill int scl_div; 521.2Sjmcneill uint8_t ibc; 531.2Sjmcneill} nxpiic_clk_div[] = { 541.2Sjmcneill { 20, 0x00 }, { 22, 0x01 }, { 24, 0x02 }, { 26, 0x03 }, 551.2Sjmcneill { 28, 0x04 }, { 30, 0x05 }, { 32, 0x09 }, { 34, 0x06 }, 561.2Sjmcneill { 36, 0x0a }, { 40, 0x07 }, { 44, 0x0c }, { 48, 0x0d }, 571.2Sjmcneill { 52, 0x43 }, { 56, 0x0e }, { 60, 0x45 }, { 64, 0x12 }, 581.2Sjmcneill { 68, 0x0f }, { 72, 0x13 }, { 80, 0x14 }, { 88, 0x15 }, 591.2Sjmcneill { 96, 0x19 }, { 104, 0x16 }, { 112, 0x1a }, { 128, 0x17 }, 601.2Sjmcneill { 136, 0x4f }, { 144, 0x1c }, { 160, 0x1d }, { 176, 0x55 }, 611.2Sjmcneill { 192, 0x1e }, { 208, 0x56 }, { 224, 0x22 }, { 228, 0x24 }, 621.2Sjmcneill { 240, 0x1f }, { 256, 0x23 }, { 288, 0x5c }, { 320, 0x25 }, 631.2Sjmcneill { 384, 0x26 }, { 448, 0x2a }, { 480, 0x27 }, { 512, 0x2b }, 641.2Sjmcneill { 576, 0x2c }, { 640, 0x2d }, { 768, 0x31 }, { 896, 0x32 }, 651.2Sjmcneill { 960, 0x2f }, { 1024, 0x33 }, { 1152, 0x34 }, { 1280, 0x35 }, 661.2Sjmcneill { 1536, 0x36 }, { 1792, 0x3a }, { 1920, 0x37 }, { 2048, 0x3b }, 671.2Sjmcneill { 2304, 0x3c }, { 2560, 0x3d }, { 3072, 0x3e }, { 3584, 0x7a }, 681.2Sjmcneill { 3840, 0x3f }, { 4096, 0x7B }, { 5120, 0x7d }, { 6144, 0x7e }, 691.2Sjmcneill}; 701.2Sjmcneill 711.1Sjmcneillstruct nxpiic_softc { 721.1Sjmcneill device_t sc_dev; 731.1Sjmcneill struct motoi2c_softc sc_motoi2c; 741.1Sjmcneill}; 751.1Sjmcneill 761.1Sjmcneillstatic int nxpiic_acpi_match(device_t, cfdata_t, void *); 771.1Sjmcneillstatic void nxpiic_acpi_attach(device_t, device_t, void *); 781.1Sjmcneill 791.1Sjmcneillstatic uint8_t nxpiic_acpi_iord(struct motoi2c_softc *, bus_size_t); 801.1Sjmcneillstatic void nxpiic_acpi_iowr(struct motoi2c_softc *, bus_size_t, uint8_t); 811.1Sjmcneill 821.1SjmcneillCFATTACH_DECL_NEW(nxpiic_acpi, sizeof(struct nxpiic_softc), 831.1Sjmcneill nxpiic_acpi_match, nxpiic_acpi_attach, NULL, NULL); 841.1Sjmcneill 851.4Sthorpejstatic const struct device_compatible_entry compat_data[] = { 861.4Sthorpej { .compat = "NXP0001" }, 871.4Sthorpej DEVICE_COMPAT_EOL 881.1Sjmcneill}; 891.1Sjmcneill 901.1Sjmcneillstatic int 911.1Sjmcneillnxpiic_acpi_match(device_t parent, cfdata_t cf, void *aux) 921.1Sjmcneill{ 931.1Sjmcneill struct acpi_attach_args *aa = aux; 941.1Sjmcneill 951.4Sthorpej return acpi_compatible_match(aa, compat_data); 961.1Sjmcneill} 971.1Sjmcneill 981.1Sjmcneillstatic void 991.1Sjmcneillnxpiic_acpi_attach(device_t parent, device_t self, void *aux) 1001.1Sjmcneill{ 1011.1Sjmcneill struct nxpiic_softc * const sc = device_private(self); 1021.1Sjmcneill struct motoi2c_softc * const msc = &sc->sc_motoi2c; 1031.2Sjmcneill struct motoi2c_settings settings; 1041.1Sjmcneill struct acpi_attach_args *aa = aux; 1051.1Sjmcneill struct acpi_resources res; 1061.1Sjmcneill struct acpi_mem *mem; 1071.1Sjmcneill ACPI_INTEGER clock_freq; 1081.1Sjmcneill ACPI_STATUS rv; 1091.2Sjmcneill int error, n; 1101.1Sjmcneill 1111.1Sjmcneill sc->sc_dev = self; 1121.1Sjmcneill msc->sc_iot = aa->aa_memt; 1131.1Sjmcneill 1141.1Sjmcneill rv = acpi_resource_parse(sc->sc_dev, aa->aa_node->ad_handle, "_CRS", 1151.1Sjmcneill &res, &acpi_resource_parse_ops_default); 1161.1Sjmcneill if (ACPI_FAILURE(rv)) 1171.1Sjmcneill return; 1181.1Sjmcneill 1191.1Sjmcneill mem = acpi_res_mem(&res, 0); 1201.1Sjmcneill if (mem == NULL) { 1211.1Sjmcneill aprint_error_dev(self, "couldn't find mem resource\n"); 1221.1Sjmcneill goto done; 1231.1Sjmcneill } 1241.1Sjmcneill 1251.1Sjmcneill rv = acpi_dsd_integer(aa->aa_node->ad_handle, "clock-frequency", 1261.1Sjmcneill &clock_freq); 1271.1Sjmcneill if (ACPI_FAILURE(rv) || clock_freq == 0) { 1281.1Sjmcneill aprint_error_dev(self, "couldn't get clock frequency\n"); 1291.1Sjmcneill goto done; 1301.1Sjmcneill } 1311.2Sjmcneill aprint_debug_dev(self, "bus clock %u Hz\n", (u_int)clock_freq); 1321.1Sjmcneill 1331.1Sjmcneill error = bus_space_map(msc->sc_iot, mem->ar_base, mem->ar_length, 0, 1341.1Sjmcneill &msc->sc_ioh); 1351.1Sjmcneill if (error) { 1361.1Sjmcneill aprint_error_dev(self, "couldn't map registers\n"); 1371.1Sjmcneill return; 1381.1Sjmcneill } 1391.1Sjmcneill 1401.2Sjmcneill settings.i2c_adr = MOTOI2C_ADR_DEFAULT; 1411.2Sjmcneill settings.i2c_dfsrr = MOTOI2C_DFSRR_DEFAULT; 1421.2Sjmcneill for (n = 0; n < __arraycount(nxpiic_clk_div) - 1; n++) { 1431.2Sjmcneill if (clock_freq / nxpiic_clk_div[n].scl_div < NXPIIC_SPEED_STD) 1441.2Sjmcneill break; 1451.2Sjmcneill } 1461.2Sjmcneill settings.i2c_fdr = nxpiic_clk_div[n].ibc; 1471.2Sjmcneill 1481.2Sjmcneill msc->sc_flags |= MOTOI2C_F_ENABLE_INV | MOTOI2C_F_STATUS_W1C; 1491.1Sjmcneill msc->sc_iord = nxpiic_acpi_iord; 1501.1Sjmcneill msc->sc_iowr = nxpiic_acpi_iowr; 1511.3Sjmcneill msc->sc_child_devices = acpi_enter_i2c_devs(self, aa->aa_node); 1521.1Sjmcneill 1531.2Sjmcneill motoi2c_attach_common(self, msc, &settings); 1541.1Sjmcneill 1551.1Sjmcneilldone: 1561.1Sjmcneill acpi_resource_cleanup(&res); 1571.1Sjmcneill 1581.1Sjmcneill} 1591.1Sjmcneill 1601.1Sjmcneillstatic uint8_t 1611.1Sjmcneillnxpiic_acpi_iord(struct motoi2c_softc *msc, bus_size_t off) 1621.1Sjmcneill{ 1631.1Sjmcneill KASSERT((off & 3) == 0); 1641.1Sjmcneill 1651.1Sjmcneill if (off >= I2CDFSRR) 1661.1Sjmcneill return 0; 1671.1Sjmcneill 1681.1Sjmcneill return bus_space_read_1(msc->sc_iot, msc->sc_ioh, off >> 2); 1691.1Sjmcneill} 1701.1Sjmcneill 1711.1Sjmcneillstatic void 1721.1Sjmcneillnxpiic_acpi_iowr(struct motoi2c_softc *msc, bus_size_t off, uint8_t val) 1731.1Sjmcneill{ 1741.1Sjmcneill KASSERT((off & 3) == 0); 1751.1Sjmcneill 1761.1Sjmcneill if (off >= I2CDFSRR) 1771.1Sjmcneill return; 1781.1Sjmcneill 1791.1Sjmcneill bus_space_write_1(msc->sc_iot, msc->sc_ioh, off >> 2, val); 1801.1Sjmcneill} 181