satareg.h revision 1.3.2.3
1 1.3.2.3 skrll /* $NetBSD: satareg.h,v 1.3.2.3 2004/09/18 14:45:25 skrll Exp $ */ 2 1.3.2.2 skrll 3 1.3.2.2 skrll /*- 4 1.3.2.2 skrll * Copyright (c) 2003 The NetBSD Foundation, Inc. 5 1.3.2.2 skrll * All rights reserved. 6 1.3.2.2 skrll * 7 1.3.2.2 skrll * This code is derived from software contributed to The NetBSD Foundation 8 1.3.2.2 skrll * by Jason R. Thorpe of Wasabi Systems, Inc. 9 1.3.2.2 skrll * 10 1.3.2.2 skrll * Redistribution and use in source and binary forms, with or without 11 1.3.2.2 skrll * modification, are permitted provided that the following conditions 12 1.3.2.2 skrll * are met: 13 1.3.2.2 skrll * 1. Redistributions of source code must retain the above copyright 14 1.3.2.2 skrll * notice, this list of conditions and the following disclaimer. 15 1.3.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright 16 1.3.2.2 skrll * notice, this list of conditions and the following disclaimer in the 17 1.3.2.2 skrll * documentation and/or other materials provided with the distribution. 18 1.3.2.2 skrll * 3. All advertising materials mentioning features or use of this software 19 1.3.2.2 skrll * must display the following acknowledgement: 20 1.3.2.2 skrll * This product includes software developed by the NetBSD 21 1.3.2.2 skrll * Foundation, Inc. and its contributors. 22 1.3.2.2 skrll * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.3.2.2 skrll * contributors may be used to endorse or promote products derived 24 1.3.2.2 skrll * from this software without specific prior written permission. 25 1.3.2.2 skrll * 26 1.3.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.3.2.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.3.2.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.3.2.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.3.2.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.3.2.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.3.2.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.3.2.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.3.2.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.3.2.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.3.2.2 skrll * POSSIBILITY OF SUCH DAMAGE. 37 1.3.2.2 skrll */ 38 1.3.2.2 skrll 39 1.3.2.2 skrll #ifndef _DEV_ATA_SATAREG_H_ 40 1.3.2.2 skrll #define _DEV_ATA_SATAREG_H_ 41 1.3.2.2 skrll 42 1.3.2.2 skrll /* 43 1.3.2.2 skrll * Serial ATA register definitions. 44 1.3.2.2 skrll * 45 1.3.2.2 skrll * Reference: 46 1.3.2.2 skrll * 47 1.3.2.2 skrll * Serial ATA: High Speed Serialized AT Attachment 48 1.3.2.2 skrll * Revision 1.0 29-August-2001 49 1.3.2.2 skrll * Serial ATA Working Group 50 1.3.2.2 skrll */ 51 1.3.2.2 skrll 52 1.3.2.2 skrll /* 53 1.3.2.2 skrll * SStatus (SCR0) -- 54 1.3.2.2 skrll * Serial ATA interface status register 55 1.3.2.2 skrll */ 56 1.3.2.2 skrll /* 57 1.3.2.2 skrll * The DET value indicates the interface device detection and 58 1.3.2.2 skrll * PHY state. 59 1.3.2.2 skrll */ 60 1.3.2.2 skrll #define SStatus_DET_NODEV (0x0 << 0) /* no device connected */ 61 1.3.2.2 skrll #define SStatus_DET_DEV_NE (0x1 << 0) /* device, but PHY comm not 62 1.3.2.2 skrll established */ 63 1.3.2.2 skrll #define SStatus_DET_DEV (0x3 << 0) /* device, PHY comm 64 1.3.2.2 skrll established */ 65 1.3.2.2 skrll #define SStatus_DET_OFFLINE (0x4 << 0) /* PHY in offline mode */ 66 1.3.2.2 skrll #define SStatus_DET_mask (0xf << 0) 67 1.3.2.2 skrll #define SStatus_DET_shift 0 68 1.3.2.2 skrll /* 69 1.3.2.2 skrll * The SPD value indicates the negotiated interface communication 70 1.3.2.2 skrll * speed established. 71 1.3.2.2 skrll */ 72 1.3.2.2 skrll #define SStatus_SPD_NONE (0x0 << 4) /* no negotiated speed */ 73 1.3.2.2 skrll #define SStatus_SPD_G1 (0x1 << 4) /* Generation 1 (1.5Gb/s) */ 74 1.3.2.2 skrll #define SStatus_SPD_G2 (0x2 << 4) /* Generation 2 (3.0Gb/s) */ 75 1.3.2.2 skrll #define SStatus_SPD_mask (0xf << 4) 76 1.3.2.2 skrll #define SStatus_SPD_shift 4 77 1.3.2.2 skrll /* 78 1.3.2.2 skrll * The IPM value indicates the current interface power managemnt 79 1.3.2.2 skrll * state. 80 1.3.2.2 skrll */ 81 1.3.2.2 skrll #define SStatus_IPM_NODEV (0x0 << 8) /* no device connected */ 82 1.3.2.2 skrll #define SStatus_IPM_ACTIVE (0x1 << 8) /* ACTIVE state */ 83 1.3.2.2 skrll #define SStatus_IPM_PARTIAL (0x2 << 8) /* PARTIAL pm state */ 84 1.3.2.2 skrll #define SStatus_IPM_SLUMBER (0x6 << 8) /* SLUMBER pm state */ 85 1.3.2.2 skrll #define SStatus_IPM_mask (0xf << 8) 86 1.3.2.2 skrll #define SStatus_IPM_shift 8 87 1.3.2.2 skrll 88 1.3.2.2 skrll /* 89 1.3.2.2 skrll * SError (SCR1) -- 90 1.3.2.2 skrll * Serial ATA interface error register 91 1.3.2.2 skrll */ 92 1.3.2.2 skrll #define SError_ERR_I (1U << 0) /* Recovered data integrity 93 1.3.2.2 skrll error */ 94 1.3.2.2 skrll #define SError_ERR_M (1U << 1) /* Recovered communications 95 1.3.2.2 skrll error */ 96 1.3.2.2 skrll #define SError_ERR_T (1U << 8) /* Non-recovered transient 97 1.3.2.2 skrll data integrity error */ 98 1.3.2.2 skrll #define SError_ERR_C (1U << 9) /* Non-recovered persistent 99 1.3.2.2 skrll communication or data 100 1.3.2.2 skrll integrity error */ 101 1.3.2.2 skrll #define SError_ERR_P (1U << 10) /* Protocol error */ 102 1.3.2.2 skrll #define SError_ERR_E (1U << 11) /* Internal error */ 103 1.3.2.2 skrll #define SError_DIAG_N (1U << 16) /* PhyRdy change */ 104 1.3.2.2 skrll #define SError_DIAG_I (1U << 17) /* PHY internal error */ 105 1.3.2.2 skrll #define SError_DIAG_W (1U << 18) /* Comm Wake */ 106 1.3.2.2 skrll #define SError_DIAG_B (1U << 19) /* 10b to 8b decode error */ 107 1.3.2.2 skrll #define SError_DIAG_D (1U << 20) /* Disparity error */ 108 1.3.2.2 skrll #define SError_DIAG_C (1U << 21) /* CRC error */ 109 1.3.2.2 skrll #define SError_DIAG_H (1U << 22) /* Handshake error */ 110 1.3.2.2 skrll #define SError_DIAG_S (1U << 23) /* Link sequence error */ 111 1.3.2.2 skrll #define SError_DIAG_T (1U << 24) /* Transport state transition 112 1.3.2.2 skrll error */ 113 1.3.2.2 skrll #define SError_DIAG_F (1U << 25) /* Unrecognized FIS type */ 114 1.3.2.2 skrll #define SError_DIAG_X (1U << 26) /* Device Exchanged */ 115 1.3.2.2 skrll 116 1.3.2.2 skrll /* 117 1.3.2.2 skrll * SControl (SCR2) -- 118 1.3.2.2 skrll * Serial ATA interface control register 119 1.3.2.2 skrll */ 120 1.3.2.2 skrll /* 121 1.3.2.2 skrll * The DET field controls the host adapter device detection 122 1.3.2.2 skrll * and interface initialization. 123 1.3.2.2 skrll */ 124 1.3.2.2 skrll #define SControl_DET_NONE (0x0 << 0) /* No device detection or 125 1.3.2.2 skrll initialization action 126 1.3.2.2 skrll requested */ 127 1.3.2.2 skrll #define SControl_DET_INIT (0x1 << 0) /* Initialize interface 128 1.3.2.2 skrll communication (equiv 129 1.3.2.2 skrll of a hard reset) */ 130 1.3.2.2 skrll #define SControl_DET_DISABLE (0x4 << 0) /* disable interface and 131 1.3.2.2 skrll take PHY offline */ 132 1.3.2.2 skrll /* 133 1.3.2.2 skrll * The SPD field represents the highest allowed communication 134 1.3.2.2 skrll * speed the interface is allowed to negotiate when communication 135 1.3.2.2 skrll * is established. 136 1.3.2.2 skrll */ 137 1.3.2.2 skrll #define SControl_SPD_ANY (0x0 << 4) /* No restrictions */ 138 1.3.2.2 skrll #define SControl_SPD_G1 (0x1 << 4) /* Generation 1 (1.5Gb/s) */ 139 1.3.2.2 skrll #define SControl_SPD_G2 (0x2 << 4) /* Generation 2 (3.0Gb/s) */ 140 1.3.2.2 skrll /* 141 1.3.2.2 skrll * The IPM field represents the enabled interface power management 142 1.3.2.2 skrll * states that can be invoked via the Serial ATA interface power 143 1.3.2.2 skrll * management capabilities. 144 1.3.2.2 skrll */ 145 1.3.2.2 skrll #define SControl_IPM_ANY (0x0 << 8) /* No restrictions */ 146 1.3.2.2 skrll #define SControl_IPM_NOPARTIAL (0x1 << 8) /* PARTIAL disabled */ 147 1.3.2.2 skrll #define SControl_IPM_NOSLUMBER (0x2 << 8) /* SLUMBER disabled */ 148 1.3.2.2 skrll #define SControl_IPM_NONE (0x3 << 8) /* No power management */ 149 1.3.2.2 skrll /* 150 1.3.2.2 skrll * The SPM field selects a power management state. A non-zero 151 1.3.2.2 skrll * value written to this field causes initiation of the selected 152 1.3.2.2 skrll * power management state. 153 1.3.2.2 skrll */ 154 1.3.2.2 skrll #define SControl_SPM_PARTIAL (0x1 << 12) /* transition to PARTIAL */ 155 1.3.2.2 skrll #define SControl_SPM_SLUMBER (0x2 << 12) /* transition to SLUBMER */ 156 1.3.2.2 skrll #define SControl_SPM_ComWake (0x4 << 12) /* transition from PM */ 157 1.3.2.2 skrll /* 158 1.3.2.2 skrll * The PMP field identifies the selected Port Multiplier Port 159 1.3.2.2 skrll * for accessing the SActive register. 160 1.3.2.2 skrll */ 161 1.3.2.2 skrll #define SControl_PMP(x) ((x) << 16) 162 1.3.2.2 skrll 163 1.3.2.2 skrll #endif /* _DEV_ATA_SATAREG_H_ */ 164
Indexes created Sat Nov 01 05:10:12 GMT 2025