1 /* $NetBSD: uhci_cardbus.c,v 1.27 2021/08/07 16:19:10 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998-2005 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Lennart Augustsson (lennart (at) augustsson.net) at 9 * Carlstedt Research & Technology. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: uhci_cardbus.c,v 1.27 2021/08/07 16:19:10 thorpej Exp $"); 35 36 #include "ehci_cardbus.h" 37 38 #include <sys/param.h> 39 #include <sys/systm.h> 40 #include <sys/kernel.h> 41 #include <sys/device.h> 42 #include <sys/proc.h> 43 #include <sys/queue.h> 44 45 #include <sys/bus.h> 46 47 #include <dev/cardbus/cardbusvar.h> 48 #include <dev/cardbus/usb_cardbus.h> 49 50 #include <dev/usb/usb.h> 51 #include <dev/usb/usbdi.h> 52 #include <dev/usb/usbdivar.h> 53 #include <dev/usb/usb_mem.h> 54 55 #include <dev/usb/uhcireg.h> 56 #include <dev/usb/uhcivar.h> 57 58 struct uhci_cardbus_softc { 59 uhci_softc_t sc; 60 #if NEHCI_CARDBUS > 0 61 struct usb_cardbus sc_cardbus; 62 #endif 63 cardbus_chipset_tag_t sc_cc; 64 cardbus_function_tag_t sc_cf; 65 cardbus_devfunc_t sc_ct; 66 pcitag_t sc_tag; 67 void *sc_ih; /* interrupt vectoring */ 68 }; 69 70 static int uhci_cardbus_match(device_t, cfdata_t, void *); 71 static void uhci_cardbus_attach(device_t, device_t, void *); 72 static int uhci_cardbus_detach(device_t, int); 73 74 CFATTACH_DECL_NEW(uhci_cardbus, sizeof(struct uhci_cardbus_softc), 75 uhci_cardbus_match, uhci_cardbus_attach, uhci_cardbus_detach, 76 uhci_activate); 77 78 static int 79 uhci_cardbus_match(device_t parent, cfdata_t match, void *aux) 80 { 81 struct cardbus_attach_args *ca = (struct cardbus_attach_args *)aux; 82 83 if (PCI_CLASS(ca->ca_class) == PCI_CLASS_SERIALBUS && 84 PCI_SUBCLASS(ca->ca_class) == PCI_SUBCLASS_SERIALBUS_USB && 85 PCI_INTERFACE(ca->ca_class) == PCI_INTERFACE_UHCI) 86 return 1; 87 88 return 0; 89 } 90 91 static void 92 uhci_cardbus_attach(device_t parent, device_t self, void *aux) 93 { 94 struct uhci_cardbus_softc *sc = device_private(self); 95 struct cardbus_attach_args *ca = (struct cardbus_attach_args *)aux; 96 cardbus_devfunc_t ct = ca->ca_ct; 97 cardbus_chipset_tag_t cc = ct->ct_cc; 98 cardbus_function_tag_t cf = ct->ct_cf; 99 pcitag_t tag = ca->ca_tag; 100 pcireg_t csr; 101 const char *devname = device_xname(self); 102 char devinfo[256]; 103 104 sc->sc.sc_dev = self; 105 sc->sc.sc_bus.ub_hcpriv = sc; 106 107 pci_devinfo(ca->ca_id, ca->ca_class, 0, devinfo, sizeof(devinfo)); 108 printf(": %s (rev. 0x%02x)\n", devinfo, PCI_REVISION(ca->ca_class)); 109 110 /* Map I/O registers */ 111 if (Cardbus_mapreg_map(ct, PCI_CBIO, PCI_MAPREG_TYPE_IO, 0, 112 &sc->sc.iot, &sc->sc.ioh, NULL, &sc->sc.sc_size)) { 113 aprint_error("%s: can't map i/o space\n", devname); 114 return; 115 } 116 117 sc->sc_cc = cc; 118 sc->sc_cf = cf; 119 sc->sc_ct = ct; 120 sc->sc_tag = tag; 121 sc->sc.sc_bus.ub_dmatag = ca->ca_dmat; 122 123 /* Enable the device. */ 124 csr = Cardbus_conf_read(ct, tag, PCI_COMMAND_STATUS_REG); 125 Cardbus_conf_write(ct, tag, PCI_COMMAND_STATUS_REG, 126 csr | PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_IO_ENABLE); 127 128 /* Disable interrupts, so we don't get any spurious ones. */ 129 bus_space_write_2(sc->sc.iot, sc->sc.ioh, UHCI_INTR, 0); 130 131 /* Map and establish the interrupt. */ 132 sc->sc_ih = Cardbus_intr_establish(ct, IPL_USB, uhci_intr, sc); 133 if (sc->sc_ih == NULL) { 134 aprint_error("%s: couldn't establish interrupt\n", devname); 135 return; 136 } 137 138 /* Set LEGSUP register to its default value. */ 139 Cardbus_conf_write(ct, tag, PCI_LEGSUP, PCI_LEGSUP_USBPIRQDEN); 140 141 switch(Cardbus_conf_read(ct, tag, PCI_USBREV) & PCI_USBREV_MASK) { 142 case PCI_USBREV_PRE_1_0: 143 sc->sc.sc_bus.ub_revision = USBREV_PRE_1_0; 144 break; 145 case PCI_USBREV_1_0: 146 sc->sc.sc_bus.ub_revision = USBREV_1_0; 147 break; 148 case PCI_USBREV_1_1: 149 sc->sc.sc_bus.ub_revision = USBREV_1_1; 150 break; 151 default: 152 sc->sc.sc_bus.ub_revision = USBREV_UNKNOWN; 153 break; 154 } 155 156 int err = uhci_init(&sc->sc); 157 if (err) { 158 aprint_error("%s: init failed, error=%d\n", devname, err); 159 160 /* Avoid spurious interrupts. */ 161 Cardbus_intr_disestablish(ct, sc->sc_ih); 162 sc->sc_ih = NULL; 163 164 return; 165 } 166 167 #if NEHCI_CARDBUS > 0 168 usb_cardbus_add(&sc->sc_cardbus, ca, self); 169 #endif 170 171 /* Attach usb device. */ 172 sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint, 173 CFARGS_NONE); 174 } 175 176 static int 177 uhci_cardbus_detach(device_t self, int flags) 178 { 179 struct uhci_cardbus_softc *sc = device_private(self); 180 struct cardbus_devfunc *ct = sc->sc_ct; 181 int rv; 182 183 rv = uhci_detach(&sc->sc, flags); 184 if (rv) 185 return rv; 186 if (sc->sc_ih != NULL) { 187 Cardbus_intr_disestablish(ct, sc->sc_ih); 188 sc->sc_ih = NULL; 189 } 190 if (sc->sc.sc_size) { 191 Cardbus_mapreg_unmap(ct, PCI_CBIO, sc->sc.iot, 192 sc->sc.ioh, sc->sc.sc_size); 193 sc->sc.sc_size = 0; 194 } 195 #if NEHCI_CARDBUS > 0 196 usb_cardbus_rem(&sc->sc_cardbus); 197 #endif 198 return 0; 199 } 200