1 1.20 thorpej /* $NetBSD: cpufreq_dt.c,v 1.20 2025/09/06 21:24:05 thorpej Exp $ */ 2 1.1 jmcneill 3 1.1 jmcneill /*- 4 1.1 jmcneill * Copyright (c) 2015-2017 Jared McNeill <jmcneill (at) invisible.ca> 5 1.1 jmcneill * All rights reserved. 6 1.1 jmcneill * 7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without 8 1.1 jmcneill * modification, are permitted provided that the following conditions 9 1.1 jmcneill * are met: 10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright 11 1.1 jmcneill * notice, this list of conditions and the following disclaimer. 12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright 13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the 14 1.1 jmcneill * documentation and/or other materials provided with the distribution. 15 1.1 jmcneill * 16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 1.1 jmcneill * SUCH DAMAGE. 27 1.1 jmcneill */ 28 1.1 jmcneill 29 1.1 jmcneill #include <sys/cdefs.h> 30 1.20 thorpej __KERNEL_RCSID(0, "$NetBSD: cpufreq_dt.c,v 1.20 2025/09/06 21:24:05 thorpej Exp $"); 31 1.1 jmcneill 32 1.1 jmcneill #include <sys/param.h> 33 1.1 jmcneill #include <sys/systm.h> 34 1.1 jmcneill #include <sys/device.h> 35 1.1 jmcneill #include <sys/kmem.h> 36 1.1 jmcneill #include <sys/bus.h> 37 1.1 jmcneill #include <sys/atomic.h> 38 1.1 jmcneill #include <sys/xcall.h> 39 1.1 jmcneill #include <sys/sysctl.h> 40 1.4 jmcneill #include <sys/queue.h> 41 1.4 jmcneill #include <sys/once.h> 42 1.9 jmcneill #include <sys/cpu.h> 43 1.1 jmcneill 44 1.1 jmcneill #include <dev/fdt/fdtvar.h> 45 1.20 thorpej #include <dev/fdt/fdt_opp.h> 46 1.1 jmcneill 47 1.4 jmcneill struct cpufreq_dt_table { 48 1.4 jmcneill int phandle; 49 1.4 jmcneill TAILQ_ENTRY(cpufreq_dt_table) next; 50 1.4 jmcneill }; 51 1.4 jmcneill 52 1.4 jmcneill static TAILQ_HEAD(, cpufreq_dt_table) cpufreq_dt_tables = 53 1.4 jmcneill TAILQ_HEAD_INITIALIZER(cpufreq_dt_tables); 54 1.4 jmcneill static kmutex_t cpufreq_dt_tables_lock; 55 1.4 jmcneill 56 1.1 jmcneill struct cpufreq_dt_opp { 57 1.4 jmcneill u_int freq_khz; 58 1.4 jmcneill u_int voltage_uv; 59 1.4 jmcneill u_int latency_ns; 60 1.1 jmcneill }; 61 1.1 jmcneill 62 1.1 jmcneill struct cpufreq_dt_softc { 63 1.1 jmcneill device_t sc_dev; 64 1.1 jmcneill int sc_phandle; 65 1.1 jmcneill struct clk *sc_clk; 66 1.1 jmcneill struct fdtbus_regulator *sc_supply; 67 1.1 jmcneill 68 1.1 jmcneill struct cpufreq_dt_opp *sc_opp; 69 1.1 jmcneill ssize_t sc_nopp; 70 1.1 jmcneill 71 1.2 jmcneill u_int sc_freq_target; 72 1.2 jmcneill bool sc_freq_throttle; 73 1.2 jmcneill 74 1.1 jmcneill u_int sc_busy; 75 1.1 jmcneill 76 1.1 jmcneill char *sc_freq_available; 77 1.1 jmcneill int sc_node_target; 78 1.1 jmcneill int sc_node_current; 79 1.1 jmcneill int sc_node_available; 80 1.4 jmcneill 81 1.4 jmcneill struct cpufreq_dt_table sc_table; 82 1.1 jmcneill }; 83 1.1 jmcneill 84 1.1 jmcneill static void 85 1.1 jmcneill cpufreq_dt_change_cb(void *arg1, void *arg2) 86 1.1 jmcneill { 87 1.14 jmcneill struct cpufreq_dt_softc * const sc = arg1; 88 1.1 jmcneill struct cpu_info *ci = curcpu(); 89 1.14 jmcneill 90 1.19 ryo ci->ci_data.cpu_cc_freq = clk_get_rate(sc->sc_clk); 91 1.1 jmcneill } 92 1.1 jmcneill 93 1.1 jmcneill static int 94 1.1 jmcneill cpufreq_dt_set_rate(struct cpufreq_dt_softc *sc, u_int freq_khz) 95 1.1 jmcneill { 96 1.1 jmcneill struct cpufreq_dt_opp *opp = NULL; 97 1.1 jmcneill u_int old_rate, new_rate, old_uv, new_uv; 98 1.2 jmcneill uint64_t xc; 99 1.1 jmcneill int error; 100 1.1 jmcneill ssize_t n; 101 1.1 jmcneill 102 1.1 jmcneill for (n = 0; n < sc->sc_nopp; n++) 103 1.1 jmcneill if (sc->sc_opp[n].freq_khz == freq_khz) { 104 1.1 jmcneill opp = &sc->sc_opp[n]; 105 1.1 jmcneill break; 106 1.1 jmcneill } 107 1.1 jmcneill if (opp == NULL) 108 1.1 jmcneill return EINVAL; 109 1.1 jmcneill 110 1.1 jmcneill old_rate = clk_get_rate(sc->sc_clk); 111 1.1 jmcneill new_rate = freq_khz * 1000; 112 1.3 jmcneill new_uv = opp->voltage_uv; 113 1.1 jmcneill 114 1.1 jmcneill if (old_rate == new_rate) 115 1.1 jmcneill return 0; 116 1.1 jmcneill 117 1.3 jmcneill if (sc->sc_supply != NULL) { 118 1.3 jmcneill error = fdtbus_regulator_get_voltage(sc->sc_supply, &old_uv); 119 1.1 jmcneill if (error != 0) 120 1.1 jmcneill return error; 121 1.3 jmcneill 122 1.3 jmcneill if (new_uv > old_uv) { 123 1.3 jmcneill error = fdtbus_regulator_set_voltage(sc->sc_supply, 124 1.3 jmcneill new_uv, new_uv); 125 1.3 jmcneill if (error != 0) 126 1.3 jmcneill return error; 127 1.3 jmcneill } 128 1.1 jmcneill } 129 1.1 jmcneill 130 1.1 jmcneill error = clk_set_rate(sc->sc_clk, new_rate); 131 1.1 jmcneill if (error != 0) 132 1.1 jmcneill return error; 133 1.1 jmcneill 134 1.4 jmcneill const u_int latency_us = howmany(opp->latency_ns, 1000); 135 1.4 jmcneill if (latency_us > 0) 136 1.4 jmcneill delay(latency_us); 137 1.4 jmcneill 138 1.3 jmcneill if (sc->sc_supply != NULL) { 139 1.3 jmcneill if (new_uv < old_uv) { 140 1.3 jmcneill error = fdtbus_regulator_set_voltage(sc->sc_supply, 141 1.3 jmcneill new_uv, new_uv); 142 1.3 jmcneill if (error != 0) 143 1.3 jmcneill return error; 144 1.3 jmcneill } 145 1.1 jmcneill } 146 1.1 jmcneill 147 1.2 jmcneill if (error == 0) { 148 1.2 jmcneill xc = xc_broadcast(0, cpufreq_dt_change_cb, sc, NULL); 149 1.2 jmcneill xc_wait(xc); 150 1.2 jmcneill 151 1.2 jmcneill pmf_event_inject(NULL, PMFE_SPEED_CHANGED); 152 1.2 jmcneill } 153 1.2 jmcneill 154 1.1 jmcneill return 0; 155 1.1 jmcneill } 156 1.1 jmcneill 157 1.2 jmcneill static void 158 1.2 jmcneill cpufreq_dt_throttle_enable(device_t dev) 159 1.2 jmcneill { 160 1.2 jmcneill struct cpufreq_dt_softc * const sc = device_private(dev); 161 1.2 jmcneill 162 1.2 jmcneill if (sc->sc_freq_throttle) 163 1.2 jmcneill return; 164 1.2 jmcneill 165 1.2 jmcneill const u_int freq_khz = sc->sc_opp[sc->sc_nopp - 1].freq_khz; 166 1.2 jmcneill 167 1.2 jmcneill while (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0) 168 1.2 jmcneill kpause("throttle", false, 1, NULL); 169 1.2 jmcneill 170 1.2 jmcneill if (cpufreq_dt_set_rate(sc, freq_khz) == 0) { 171 1.2 jmcneill aprint_debug_dev(sc->sc_dev, "throttle enabled (%u.%03u MHz)\n", 172 1.2 jmcneill freq_khz / 1000, freq_khz % 1000); 173 1.2 jmcneill sc->sc_freq_throttle = true; 174 1.2 jmcneill if (sc->sc_freq_target == 0) 175 1.2 jmcneill sc->sc_freq_target = clk_get_rate(sc->sc_clk) / 1000000; 176 1.2 jmcneill } 177 1.2 jmcneill 178 1.2 jmcneill atomic_dec_uint(&sc->sc_busy); 179 1.2 jmcneill } 180 1.2 jmcneill 181 1.2 jmcneill static void 182 1.2 jmcneill cpufreq_dt_throttle_disable(device_t dev) 183 1.2 jmcneill { 184 1.2 jmcneill struct cpufreq_dt_softc * const sc = device_private(dev); 185 1.2 jmcneill 186 1.2 jmcneill if (!sc->sc_freq_throttle) 187 1.2 jmcneill return; 188 1.2 jmcneill 189 1.2 jmcneill while (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0) 190 1.2 jmcneill kpause("throttle", false, 1, NULL); 191 1.2 jmcneill 192 1.2 jmcneill const u_int freq_khz = sc->sc_freq_target * 1000; 193 1.2 jmcneill 194 1.2 jmcneill if (cpufreq_dt_set_rate(sc, freq_khz) == 0) { 195 1.2 jmcneill aprint_debug_dev(sc->sc_dev, "throttle disabled (%u.%03u MHz)\n", 196 1.2 jmcneill freq_khz / 1000, freq_khz % 1000); 197 1.2 jmcneill sc->sc_freq_throttle = false; 198 1.2 jmcneill } 199 1.2 jmcneill 200 1.2 jmcneill atomic_dec_uint(&sc->sc_busy); 201 1.2 jmcneill } 202 1.2 jmcneill 203 1.1 jmcneill static int 204 1.1 jmcneill cpufreq_dt_sysctl_helper(SYSCTLFN_ARGS) 205 1.1 jmcneill { 206 1.1 jmcneill struct cpufreq_dt_softc * const sc = rnode->sysctl_data; 207 1.1 jmcneill struct sysctlnode node; 208 1.1 jmcneill u_int fq, oldfq = 0; 209 1.2 jmcneill int error, n; 210 1.1 jmcneill 211 1.1 jmcneill node = *rnode; 212 1.1 jmcneill node.sysctl_data = &fq; 213 1.1 jmcneill 214 1.2 jmcneill if (rnode->sysctl_num == sc->sc_node_target) { 215 1.2 jmcneill if (sc->sc_freq_target == 0) 216 1.2 jmcneill sc->sc_freq_target = clk_get_rate(sc->sc_clk) / 1000000; 217 1.2 jmcneill fq = sc->sc_freq_target; 218 1.2 jmcneill } else 219 1.2 jmcneill fq = clk_get_rate(sc->sc_clk) / 1000000; 220 1.2 jmcneill 221 1.1 jmcneill if (rnode->sysctl_num == sc->sc_node_target) 222 1.1 jmcneill oldfq = fq; 223 1.1 jmcneill 224 1.2 jmcneill if (sc->sc_freq_target == 0) 225 1.2 jmcneill sc->sc_freq_target = fq; 226 1.2 jmcneill 227 1.1 jmcneill error = sysctl_lookup(SYSCTLFN_CALL(&node)); 228 1.1 jmcneill if (error || newp == NULL) 229 1.1 jmcneill return error; 230 1.1 jmcneill 231 1.1 jmcneill if (fq == oldfq || rnode->sysctl_num != sc->sc_node_target) 232 1.1 jmcneill return 0; 233 1.1 jmcneill 234 1.2 jmcneill for (n = 0; n < sc->sc_nopp; n++) 235 1.2 jmcneill if (sc->sc_opp[n].freq_khz / 1000 == fq) 236 1.2 jmcneill break; 237 1.2 jmcneill if (n == sc->sc_nopp) 238 1.2 jmcneill return EINVAL; 239 1.2 jmcneill 240 1.1 jmcneill if (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0) 241 1.1 jmcneill return EBUSY; 242 1.1 jmcneill 243 1.2 jmcneill sc->sc_freq_target = fq; 244 1.1 jmcneill 245 1.2 jmcneill if (sc->sc_freq_throttle) 246 1.2 jmcneill error = 0; 247 1.2 jmcneill else 248 1.2 jmcneill error = cpufreq_dt_set_rate(sc, fq * 1000); 249 1.1 jmcneill 250 1.1 jmcneill atomic_dec_uint(&sc->sc_busy); 251 1.1 jmcneill 252 1.1 jmcneill return error; 253 1.1 jmcneill } 254 1.1 jmcneill 255 1.9 jmcneill static struct cpu_info * 256 1.9 jmcneill cpufreq_dt_cpu_lookup(cpuid_t mpidr) 257 1.9 jmcneill { 258 1.9 jmcneill CPU_INFO_ITERATOR cii; 259 1.9 jmcneill struct cpu_info *ci; 260 1.9 jmcneill 261 1.9 jmcneill for (CPU_INFO_FOREACH(cii, ci)) { 262 1.9 jmcneill if (ci->ci_cpuid == mpidr) 263 1.9 jmcneill return ci; 264 1.9 jmcneill } 265 1.9 jmcneill 266 1.9 jmcneill return NULL; 267 1.9 jmcneill } 268 1.9 jmcneill 269 1.1 jmcneill static void 270 1.1 jmcneill cpufreq_dt_init_sysctl(struct cpufreq_dt_softc *sc) 271 1.1 jmcneill { 272 1.9 jmcneill const struct sysctlnode *node, *cpunode; 273 1.1 jmcneill struct sysctllog *cpufreq_log = NULL; 274 1.9 jmcneill struct cpu_info *ci; 275 1.10 martin bus_addr_t mpidr; 276 1.1 jmcneill int error, i; 277 1.1 jmcneill 278 1.9 jmcneill if (fdtbus_get_reg(sc->sc_phandle, 0, &mpidr, 0) != 0) 279 1.9 jmcneill return; 280 1.9 jmcneill 281 1.9 jmcneill ci = cpufreq_dt_cpu_lookup(mpidr); 282 1.9 jmcneill if (ci == NULL) 283 1.9 jmcneill return; 284 1.9 jmcneill 285 1.1 jmcneill sc->sc_freq_available = kmem_zalloc(strlen("XXXX ") * sc->sc_nopp, KM_SLEEP); 286 1.1 jmcneill for (i = 0; i < sc->sc_nopp; i++) { 287 1.1 jmcneill char buf[6]; 288 1.1 jmcneill snprintf(buf, sizeof(buf), i ? " %u" : "%u", sc->sc_opp[i].freq_khz / 1000); 289 1.1 jmcneill strcat(sc->sc_freq_available, buf); 290 1.1 jmcneill } 291 1.1 jmcneill 292 1.1 jmcneill error = sysctl_createv(&cpufreq_log, 0, NULL, &node, 293 1.1 jmcneill CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL, 294 1.1 jmcneill NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL); 295 1.1 jmcneill if (error) 296 1.1 jmcneill goto sysctl_failed; 297 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &node, &node, 298 1.9 jmcneill 0, CTLTYPE_NODE, "cpufreq", NULL, 299 1.1 jmcneill NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL); 300 1.1 jmcneill if (error) 301 1.1 jmcneill goto sysctl_failed; 302 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &node, &cpunode, 303 1.9 jmcneill 0, CTLTYPE_NODE, cpu_name(ci), NULL, 304 1.1 jmcneill NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL); 305 1.1 jmcneill if (error) 306 1.1 jmcneill goto sysctl_failed; 307 1.1 jmcneill 308 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node, 309 1.1 jmcneill CTLFLAG_READWRITE, CTLTYPE_INT, "target", NULL, 310 1.1 jmcneill cpufreq_dt_sysctl_helper, 0, (void *)sc, 0, 311 1.1 jmcneill CTL_CREATE, CTL_EOL); 312 1.1 jmcneill if (error) 313 1.1 jmcneill goto sysctl_failed; 314 1.1 jmcneill sc->sc_node_target = node->sysctl_num; 315 1.1 jmcneill 316 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node, 317 1.1 jmcneill CTLFLAG_READWRITE, CTLTYPE_INT, "current", NULL, 318 1.1 jmcneill cpufreq_dt_sysctl_helper, 0, (void *)sc, 0, 319 1.1 jmcneill CTL_CREATE, CTL_EOL); 320 1.1 jmcneill if (error) 321 1.1 jmcneill goto sysctl_failed; 322 1.1 jmcneill sc->sc_node_current = node->sysctl_num; 323 1.1 jmcneill 324 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node, 325 1.1 jmcneill 0, CTLTYPE_STRING, "available", NULL, 326 1.1 jmcneill NULL, 0, sc->sc_freq_available, 0, 327 1.1 jmcneill CTL_CREATE, CTL_EOL); 328 1.1 jmcneill if (error) 329 1.1 jmcneill goto sysctl_failed; 330 1.1 jmcneill sc->sc_node_available = node->sysctl_num; 331 1.1 jmcneill 332 1.1 jmcneill return; 333 1.1 jmcneill 334 1.1 jmcneill sysctl_failed: 335 1.1 jmcneill aprint_error_dev(sc->sc_dev, "couldn't create sysctl nodes: %d\n", error); 336 1.1 jmcneill sysctl_teardown(&cpufreq_log); 337 1.1 jmcneill } 338 1.1 jmcneill 339 1.1 jmcneill static int 340 1.4 jmcneill cpufreq_dt_parse_opp(struct cpufreq_dt_softc *sc) 341 1.1 jmcneill { 342 1.1 jmcneill const int phandle = sc->sc_phandle; 343 1.1 jmcneill const u_int *opp; 344 1.1 jmcneill int len, i; 345 1.4 jmcneill 346 1.4 jmcneill opp = fdtbus_get_prop(phandle, "operating-points", &len); 347 1.4 jmcneill if (len < 8) 348 1.4 jmcneill return ENXIO; 349 1.4 jmcneill 350 1.4 jmcneill sc->sc_nopp = len / 8; 351 1.4 jmcneill sc->sc_opp = kmem_zalloc(sizeof(*sc->sc_opp) * sc->sc_nopp, KM_SLEEP); 352 1.4 jmcneill for (i = 0; i < sc->sc_nopp; i++, opp += 2) { 353 1.4 jmcneill sc->sc_opp[i].freq_khz = be32toh(opp[0]); 354 1.4 jmcneill sc->sc_opp[i].voltage_uv = be32toh(opp[1]); 355 1.4 jmcneill } 356 1.4 jmcneill 357 1.4 jmcneill return 0; 358 1.4 jmcneill } 359 1.4 jmcneill 360 1.12 jmcneill static const struct fdt_opp_info * 361 1.12 jmcneill cpufreq_dt_lookup_opp_info(const int opp_table) 362 1.12 jmcneill { 363 1.12 jmcneill __link_set_decl(fdt_opps, struct fdt_opp_info); 364 1.12 jmcneill struct fdt_opp_info * const *opp; 365 1.12 jmcneill const struct fdt_opp_info *best_opp = NULL; 366 1.12 jmcneill int match, best_match = 0; 367 1.12 jmcneill 368 1.12 jmcneill __link_set_foreach(opp, fdt_opps) { 369 1.18 thorpej const struct device_compatible_entry compat_data[] = { 370 1.18 thorpej { .compat = (*opp)->opp_compat }, 371 1.18 thorpej DEVICE_COMPAT_EOL 372 1.18 thorpej }; 373 1.18 thorpej 374 1.18 thorpej match = of_compatible_match(opp_table, compat_data); 375 1.12 jmcneill if (match > best_match) { 376 1.12 jmcneill best_match = match; 377 1.12 jmcneill best_opp = *opp; 378 1.12 jmcneill } 379 1.12 jmcneill } 380 1.12 jmcneill 381 1.12 jmcneill return best_opp; 382 1.12 jmcneill } 383 1.12 jmcneill 384 1.12 jmcneill static bool 385 1.13 jmcneill cpufreq_dt_opp_v2_supported(const int opp_table, const int opp_node) 386 1.13 jmcneill { 387 1.13 jmcneill return true; 388 1.13 jmcneill } 389 1.13 jmcneill 390 1.13 jmcneill FDT_OPP(opp_v2, "operating-points-v2", cpufreq_dt_opp_v2_supported); 391 1.13 jmcneill 392 1.13 jmcneill static bool 393 1.12 jmcneill cpufreq_dt_node_supported(const struct fdt_opp_info *opp_info, const int opp_table, const int opp_node) 394 1.12 jmcneill { 395 1.12 jmcneill if (!fdtbus_status_okay(opp_node)) 396 1.12 jmcneill return false; 397 1.12 jmcneill if (of_hasprop(opp_node, "opp-suspend")) 398 1.12 jmcneill return false; 399 1.12 jmcneill 400 1.12 jmcneill if (opp_info != NULL) 401 1.12 jmcneill return opp_info->opp_supported(opp_table, opp_node); 402 1.12 jmcneill 403 1.13 jmcneill return false; 404 1.12 jmcneill } 405 1.12 jmcneill 406 1.4 jmcneill static int 407 1.4 jmcneill cpufreq_dt_parse_opp_v2(struct cpufreq_dt_softc *sc) 408 1.4 jmcneill { 409 1.4 jmcneill const int phandle = sc->sc_phandle; 410 1.4 jmcneill struct cpufreq_dt_table *table; 411 1.12 jmcneill const struct fdt_opp_info *opp_info; 412 1.7 jmcneill const u_int *opp_uv; 413 1.4 jmcneill uint64_t opp_hz; 414 1.11 jmcneill int opp_node, len, i, index; 415 1.4 jmcneill 416 1.4 jmcneill const int opp_table = fdtbus_get_phandle(phandle, "operating-points-v2"); 417 1.4 jmcneill if (opp_table < 0) 418 1.4 jmcneill return ENOENT; 419 1.4 jmcneill 420 1.4 jmcneill /* If the table is shared, only setup a single instance */ 421 1.4 jmcneill if (of_hasprop(opp_table, "opp-shared")) { 422 1.4 jmcneill TAILQ_FOREACH(table, &cpufreq_dt_tables, next) 423 1.4 jmcneill if (table->phandle == opp_table) 424 1.4 jmcneill return EEXIST; 425 1.4 jmcneill sc->sc_table.phandle = opp_table; 426 1.4 jmcneill TAILQ_INSERT_TAIL(&cpufreq_dt_tables, &sc->sc_table, next); 427 1.4 jmcneill } 428 1.4 jmcneill 429 1.12 jmcneill opp_info = cpufreq_dt_lookup_opp_info(opp_table); 430 1.12 jmcneill 431 1.4 jmcneill for (opp_node = OF_child(opp_table); opp_node; opp_node = OF_peer(opp_node)) { 432 1.12 jmcneill if (!cpufreq_dt_node_supported(opp_info, opp_table, opp_node)) 433 1.11 jmcneill continue; 434 1.11 jmcneill sc->sc_nopp++; 435 1.4 jmcneill } 436 1.4 jmcneill 437 1.4 jmcneill if (sc->sc_nopp == 0) 438 1.4 jmcneill return EINVAL; 439 1.4 jmcneill 440 1.4 jmcneill sc->sc_opp = kmem_zalloc(sizeof(*sc->sc_opp) * sc->sc_nopp, KM_SLEEP); 441 1.11 jmcneill index = sc->sc_nopp - 1; 442 1.4 jmcneill for (opp_node = OF_child(opp_table), i = 0; opp_node; opp_node = OF_peer(opp_node), i++) { 443 1.12 jmcneill if (!cpufreq_dt_node_supported(opp_info, opp_table, opp_node)) 444 1.11 jmcneill continue; 445 1.4 jmcneill if (of_getprop_uint64(opp_node, "opp-hz", &opp_hz) != 0) 446 1.4 jmcneill return EINVAL; 447 1.7 jmcneill opp_uv = fdtbus_get_prop(opp_node, "opp-microvolt", &len); 448 1.7 jmcneill if (opp_uv == NULL || len < 1) 449 1.4 jmcneill return EINVAL; 450 1.8 jmcneill /* Table is in reverse order */ 451 1.8 jmcneill sc->sc_opp[index].freq_khz = (u_int)(opp_hz / 1000); 452 1.8 jmcneill sc->sc_opp[index].voltage_uv = be32toh(opp_uv[0]); 453 1.8 jmcneill of_getprop_uint32(opp_node, "clock-latency-ns", &sc->sc_opp[index].latency_ns); 454 1.11 jmcneill --index; 455 1.4 jmcneill } 456 1.4 jmcneill 457 1.4 jmcneill return 0; 458 1.4 jmcneill } 459 1.4 jmcneill 460 1.4 jmcneill static int 461 1.4 jmcneill cpufreq_dt_parse(struct cpufreq_dt_softc *sc) 462 1.4 jmcneill { 463 1.4 jmcneill const int phandle = sc->sc_phandle; 464 1.4 jmcneill int error, i; 465 1.1 jmcneill 466 1.3 jmcneill if (of_hasprop(phandle, "cpu-supply")) { 467 1.3 jmcneill sc->sc_supply = fdtbus_regulator_acquire(phandle, "cpu-supply"); 468 1.3 jmcneill if (sc->sc_supply == NULL) { 469 1.3 jmcneill aprint_error_dev(sc->sc_dev, 470 1.3 jmcneill "couldn't acquire cpu-supply\n"); 471 1.3 jmcneill return ENXIO; 472 1.3 jmcneill } 473 1.1 jmcneill } 474 1.1 jmcneill sc->sc_clk = fdtbus_clock_get_index(phandle, 0); 475 1.1 jmcneill if (sc->sc_clk == NULL) { 476 1.1 jmcneill aprint_error_dev(sc->sc_dev, "couldn't acquire clock\n"); 477 1.1 jmcneill return ENXIO; 478 1.1 jmcneill } 479 1.1 jmcneill 480 1.4 jmcneill mutex_enter(&cpufreq_dt_tables_lock); 481 1.4 jmcneill if (of_hasprop(phandle, "operating-points")) 482 1.4 jmcneill error = cpufreq_dt_parse_opp(sc); 483 1.4 jmcneill else if (of_hasprop(phandle, "operating-points-v2")) 484 1.4 jmcneill error = cpufreq_dt_parse_opp_v2(sc); 485 1.4 jmcneill else 486 1.4 jmcneill error = EINVAL; 487 1.4 jmcneill mutex_exit(&cpufreq_dt_tables_lock); 488 1.1 jmcneill 489 1.4 jmcneill if (error) { 490 1.5 jmcneill if (error != EEXIST) 491 1.5 jmcneill aprint_error_dev(sc->sc_dev, 492 1.5 jmcneill "couldn't parse operating points: %d\n", error); 493 1.4 jmcneill return error; 494 1.4 jmcneill } 495 1.1 jmcneill 496 1.4 jmcneill for (i = 0; i < sc->sc_nopp; i++) { 497 1.14 jmcneill aprint_debug_dev(sc->sc_dev, "supported rate: %u.%03u MHz, %u uV\n", 498 1.1 jmcneill sc->sc_opp[i].freq_khz / 1000, 499 1.1 jmcneill sc->sc_opp[i].freq_khz % 1000, 500 1.1 jmcneill sc->sc_opp[i].voltage_uv); 501 1.1 jmcneill } 502 1.1 jmcneill 503 1.1 jmcneill return 0; 504 1.1 jmcneill } 505 1.1 jmcneill 506 1.1 jmcneill static int 507 1.1 jmcneill cpufreq_dt_match(device_t parent, cfdata_t cf, void *aux) 508 1.1 jmcneill { 509 1.1 jmcneill struct fdt_attach_args * const faa = aux; 510 1.1 jmcneill const int phandle = faa->faa_phandle; 511 1.1 jmcneill bus_addr_t addr; 512 1.1 jmcneill 513 1.1 jmcneill if (fdtbus_get_reg(phandle, 0, &addr, NULL) != 0) 514 1.1 jmcneill return 0; 515 1.4 jmcneill 516 1.4 jmcneill if (!of_hasprop(phandle, "clocks")) 517 1.1 jmcneill return 0; 518 1.1 jmcneill 519 1.4 jmcneill if (!of_hasprop(phandle, "operating-points") && 520 1.4 jmcneill !of_hasprop(phandle, "operating-points-v2")) 521 1.1 jmcneill return 0; 522 1.1 jmcneill 523 1.1 jmcneill return 1; 524 1.1 jmcneill } 525 1.1 jmcneill 526 1.1 jmcneill static void 527 1.1 jmcneill cpufreq_dt_init(device_t self) 528 1.1 jmcneill { 529 1.1 jmcneill struct cpufreq_dt_softc * const sc = device_private(self); 530 1.1 jmcneill int error; 531 1.1 jmcneill 532 1.1 jmcneill if ((error = cpufreq_dt_parse(sc)) != 0) 533 1.1 jmcneill return; 534 1.1 jmcneill 535 1.4 jmcneill pmf_event_register(sc->sc_dev, PMFE_THROTTLE_ENABLE, cpufreq_dt_throttle_enable, true); 536 1.4 jmcneill pmf_event_register(sc->sc_dev, PMFE_THROTTLE_DISABLE, cpufreq_dt_throttle_disable, true); 537 1.4 jmcneill 538 1.1 jmcneill cpufreq_dt_init_sysctl(sc); 539 1.14 jmcneill 540 1.14 jmcneill if (sc->sc_nopp > 0) { 541 1.15 jmcneill struct cpufreq_dt_opp * const opp = &sc->sc_opp[0]; 542 1.14 jmcneill 543 1.14 jmcneill aprint_normal_dev(sc->sc_dev, "rate: %u.%03u MHz, %u uV\n", 544 1.14 jmcneill opp->freq_khz / 1000, opp->freq_khz % 1000, opp->voltage_uv); 545 1.14 jmcneill cpufreq_dt_set_rate(sc, opp->freq_khz); 546 1.14 jmcneill } 547 1.1 jmcneill } 548 1.1 jmcneill 549 1.4 jmcneill static int 550 1.4 jmcneill cpufreq_dt_lock_init(void) 551 1.4 jmcneill { 552 1.4 jmcneill mutex_init(&cpufreq_dt_tables_lock, MUTEX_DEFAULT, IPL_NONE); 553 1.4 jmcneill return 0; 554 1.4 jmcneill } 555 1.4 jmcneill 556 1.1 jmcneill static void 557 1.1 jmcneill cpufreq_dt_attach(device_t parent, device_t self, void *aux) 558 1.1 jmcneill { 559 1.4 jmcneill static ONCE_DECL(locks); 560 1.1 jmcneill struct cpufreq_dt_softc * const sc = device_private(self); 561 1.1 jmcneill struct fdt_attach_args * const faa = aux; 562 1.1 jmcneill 563 1.4 jmcneill RUN_ONCE(&locks, cpufreq_dt_lock_init); 564 1.4 jmcneill 565 1.1 jmcneill sc->sc_dev = self; 566 1.1 jmcneill sc->sc_phandle = faa->faa_phandle; 567 1.1 jmcneill 568 1.1 jmcneill aprint_naive("\n"); 569 1.1 jmcneill aprint_normal("\n"); 570 1.1 jmcneill 571 1.1 jmcneill config_interrupts(self, cpufreq_dt_init); 572 1.1 jmcneill } 573 1.1 jmcneill 574 1.1 jmcneill CFATTACH_DECL_NEW(cpufreq_dt, sizeof(struct cpufreq_dt_softc), 575 1.1 jmcneill cpufreq_dt_match, cpufreq_dt_attach, NULL, NULL); 576