cpufreq_dt.c revision 1.18 1 1.18 thorpej /* $NetBSD: cpufreq_dt.c,v 1.18 2021/01/27 03:10:21 thorpej Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015-2017 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include <sys/cdefs.h>
30 1.18 thorpej __KERNEL_RCSID(0, "$NetBSD: cpufreq_dt.c,v 1.18 2021/01/27 03:10:21 thorpej Exp $");
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/param.h>
33 1.1 jmcneill #include <sys/systm.h>
34 1.1 jmcneill #include <sys/device.h>
35 1.1 jmcneill #include <sys/kmem.h>
36 1.1 jmcneill #include <sys/bus.h>
37 1.1 jmcneill #include <sys/atomic.h>
38 1.1 jmcneill #include <sys/xcall.h>
39 1.1 jmcneill #include <sys/sysctl.h>
40 1.4 jmcneill #include <sys/queue.h>
41 1.4 jmcneill #include <sys/once.h>
42 1.9 jmcneill #include <sys/cpu.h>
43 1.1 jmcneill
44 1.1 jmcneill #include <dev/fdt/fdtvar.h>
45 1.1 jmcneill
46 1.4 jmcneill struct cpufreq_dt_table {
47 1.4 jmcneill int phandle;
48 1.4 jmcneill TAILQ_ENTRY(cpufreq_dt_table) next;
49 1.4 jmcneill };
50 1.4 jmcneill
51 1.4 jmcneill static TAILQ_HEAD(, cpufreq_dt_table) cpufreq_dt_tables =
52 1.4 jmcneill TAILQ_HEAD_INITIALIZER(cpufreq_dt_tables);
53 1.4 jmcneill static kmutex_t cpufreq_dt_tables_lock;
54 1.4 jmcneill
55 1.1 jmcneill struct cpufreq_dt_opp {
56 1.4 jmcneill u_int freq_khz;
57 1.4 jmcneill u_int voltage_uv;
58 1.4 jmcneill u_int latency_ns;
59 1.1 jmcneill };
60 1.1 jmcneill
61 1.1 jmcneill struct cpufreq_dt_softc {
62 1.1 jmcneill device_t sc_dev;
63 1.1 jmcneill int sc_phandle;
64 1.1 jmcneill struct clk *sc_clk;
65 1.1 jmcneill struct fdtbus_regulator *sc_supply;
66 1.1 jmcneill
67 1.1 jmcneill struct cpufreq_dt_opp *sc_opp;
68 1.1 jmcneill ssize_t sc_nopp;
69 1.1 jmcneill
70 1.2 jmcneill u_int sc_freq_target;
71 1.2 jmcneill bool sc_freq_throttle;
72 1.2 jmcneill
73 1.1 jmcneill u_int sc_busy;
74 1.1 jmcneill
75 1.1 jmcneill char *sc_freq_available;
76 1.1 jmcneill int sc_node_target;
77 1.1 jmcneill int sc_node_current;
78 1.1 jmcneill int sc_node_available;
79 1.4 jmcneill
80 1.4 jmcneill struct cpufreq_dt_table sc_table;
81 1.1 jmcneill };
82 1.1 jmcneill
83 1.1 jmcneill static void
84 1.1 jmcneill cpufreq_dt_change_cb(void *arg1, void *arg2)
85 1.1 jmcneill {
86 1.14 jmcneill struct cpufreq_dt_softc * const sc = arg1;
87 1.1 jmcneill struct cpu_info *ci = curcpu();
88 1.14 jmcneill
89 1.14 jmcneill ci->ci_data.cpu_cc_freq = sc->sc_freq_target * 1000000;
90 1.1 jmcneill }
91 1.1 jmcneill
92 1.1 jmcneill static int
93 1.1 jmcneill cpufreq_dt_set_rate(struct cpufreq_dt_softc *sc, u_int freq_khz)
94 1.1 jmcneill {
95 1.1 jmcneill struct cpufreq_dt_opp *opp = NULL;
96 1.1 jmcneill u_int old_rate, new_rate, old_uv, new_uv;
97 1.2 jmcneill uint64_t xc;
98 1.1 jmcneill int error;
99 1.1 jmcneill ssize_t n;
100 1.1 jmcneill
101 1.1 jmcneill for (n = 0; n < sc->sc_nopp; n++)
102 1.1 jmcneill if (sc->sc_opp[n].freq_khz == freq_khz) {
103 1.1 jmcneill opp = &sc->sc_opp[n];
104 1.1 jmcneill break;
105 1.1 jmcneill }
106 1.1 jmcneill if (opp == NULL)
107 1.1 jmcneill return EINVAL;
108 1.1 jmcneill
109 1.1 jmcneill old_rate = clk_get_rate(sc->sc_clk);
110 1.1 jmcneill new_rate = freq_khz * 1000;
111 1.3 jmcneill new_uv = opp->voltage_uv;
112 1.1 jmcneill
113 1.1 jmcneill if (old_rate == new_rate)
114 1.1 jmcneill return 0;
115 1.1 jmcneill
116 1.3 jmcneill if (sc->sc_supply != NULL) {
117 1.3 jmcneill error = fdtbus_regulator_get_voltage(sc->sc_supply, &old_uv);
118 1.1 jmcneill if (error != 0)
119 1.1 jmcneill return error;
120 1.3 jmcneill
121 1.3 jmcneill if (new_uv > old_uv) {
122 1.3 jmcneill error = fdtbus_regulator_set_voltage(sc->sc_supply,
123 1.3 jmcneill new_uv, new_uv);
124 1.3 jmcneill if (error != 0)
125 1.3 jmcneill return error;
126 1.3 jmcneill }
127 1.1 jmcneill }
128 1.1 jmcneill
129 1.1 jmcneill error = clk_set_rate(sc->sc_clk, new_rate);
130 1.1 jmcneill if (error != 0)
131 1.1 jmcneill return error;
132 1.1 jmcneill
133 1.4 jmcneill const u_int latency_us = howmany(opp->latency_ns, 1000);
134 1.4 jmcneill if (latency_us > 0)
135 1.4 jmcneill delay(latency_us);
136 1.4 jmcneill
137 1.3 jmcneill if (sc->sc_supply != NULL) {
138 1.3 jmcneill if (new_uv < old_uv) {
139 1.3 jmcneill error = fdtbus_regulator_set_voltage(sc->sc_supply,
140 1.3 jmcneill new_uv, new_uv);
141 1.3 jmcneill if (error != 0)
142 1.3 jmcneill return error;
143 1.3 jmcneill }
144 1.1 jmcneill }
145 1.1 jmcneill
146 1.2 jmcneill if (error == 0) {
147 1.2 jmcneill xc = xc_broadcast(0, cpufreq_dt_change_cb, sc, NULL);
148 1.2 jmcneill xc_wait(xc);
149 1.2 jmcneill
150 1.2 jmcneill pmf_event_inject(NULL, PMFE_SPEED_CHANGED);
151 1.2 jmcneill }
152 1.2 jmcneill
153 1.1 jmcneill return 0;
154 1.1 jmcneill }
155 1.1 jmcneill
156 1.2 jmcneill static void
157 1.2 jmcneill cpufreq_dt_throttle_enable(device_t dev)
158 1.2 jmcneill {
159 1.2 jmcneill struct cpufreq_dt_softc * const sc = device_private(dev);
160 1.2 jmcneill
161 1.2 jmcneill if (sc->sc_freq_throttle)
162 1.2 jmcneill return;
163 1.2 jmcneill
164 1.2 jmcneill const u_int freq_khz = sc->sc_opp[sc->sc_nopp - 1].freq_khz;
165 1.2 jmcneill
166 1.2 jmcneill while (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0)
167 1.2 jmcneill kpause("throttle", false, 1, NULL);
168 1.2 jmcneill
169 1.2 jmcneill if (cpufreq_dt_set_rate(sc, freq_khz) == 0) {
170 1.2 jmcneill aprint_debug_dev(sc->sc_dev, "throttle enabled (%u.%03u MHz)\n",
171 1.2 jmcneill freq_khz / 1000, freq_khz % 1000);
172 1.2 jmcneill sc->sc_freq_throttle = true;
173 1.2 jmcneill if (sc->sc_freq_target == 0)
174 1.2 jmcneill sc->sc_freq_target = clk_get_rate(sc->sc_clk) / 1000000;
175 1.2 jmcneill }
176 1.2 jmcneill
177 1.2 jmcneill atomic_dec_uint(&sc->sc_busy);
178 1.2 jmcneill }
179 1.2 jmcneill
180 1.2 jmcneill static void
181 1.2 jmcneill cpufreq_dt_throttle_disable(device_t dev)
182 1.2 jmcneill {
183 1.2 jmcneill struct cpufreq_dt_softc * const sc = device_private(dev);
184 1.2 jmcneill
185 1.2 jmcneill if (!sc->sc_freq_throttle)
186 1.2 jmcneill return;
187 1.2 jmcneill
188 1.2 jmcneill while (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0)
189 1.2 jmcneill kpause("throttle", false, 1, NULL);
190 1.2 jmcneill
191 1.2 jmcneill const u_int freq_khz = sc->sc_freq_target * 1000;
192 1.2 jmcneill
193 1.2 jmcneill if (cpufreq_dt_set_rate(sc, freq_khz) == 0) {
194 1.2 jmcneill aprint_debug_dev(sc->sc_dev, "throttle disabled (%u.%03u MHz)\n",
195 1.2 jmcneill freq_khz / 1000, freq_khz % 1000);
196 1.2 jmcneill sc->sc_freq_throttle = false;
197 1.2 jmcneill }
198 1.2 jmcneill
199 1.2 jmcneill atomic_dec_uint(&sc->sc_busy);
200 1.2 jmcneill }
201 1.2 jmcneill
202 1.1 jmcneill static int
203 1.1 jmcneill cpufreq_dt_sysctl_helper(SYSCTLFN_ARGS)
204 1.1 jmcneill {
205 1.1 jmcneill struct cpufreq_dt_softc * const sc = rnode->sysctl_data;
206 1.1 jmcneill struct sysctlnode node;
207 1.1 jmcneill u_int fq, oldfq = 0;
208 1.2 jmcneill int error, n;
209 1.1 jmcneill
210 1.1 jmcneill node = *rnode;
211 1.1 jmcneill node.sysctl_data = &fq;
212 1.1 jmcneill
213 1.2 jmcneill if (rnode->sysctl_num == sc->sc_node_target) {
214 1.2 jmcneill if (sc->sc_freq_target == 0)
215 1.2 jmcneill sc->sc_freq_target = clk_get_rate(sc->sc_clk) / 1000000;
216 1.2 jmcneill fq = sc->sc_freq_target;
217 1.2 jmcneill } else
218 1.2 jmcneill fq = clk_get_rate(sc->sc_clk) / 1000000;
219 1.2 jmcneill
220 1.1 jmcneill if (rnode->sysctl_num == sc->sc_node_target)
221 1.1 jmcneill oldfq = fq;
222 1.1 jmcneill
223 1.2 jmcneill if (sc->sc_freq_target == 0)
224 1.2 jmcneill sc->sc_freq_target = fq;
225 1.2 jmcneill
226 1.1 jmcneill error = sysctl_lookup(SYSCTLFN_CALL(&node));
227 1.1 jmcneill if (error || newp == NULL)
228 1.1 jmcneill return error;
229 1.1 jmcneill
230 1.1 jmcneill if (fq == oldfq || rnode->sysctl_num != sc->sc_node_target)
231 1.1 jmcneill return 0;
232 1.1 jmcneill
233 1.2 jmcneill for (n = 0; n < sc->sc_nopp; n++)
234 1.2 jmcneill if (sc->sc_opp[n].freq_khz / 1000 == fq)
235 1.2 jmcneill break;
236 1.2 jmcneill if (n == sc->sc_nopp)
237 1.2 jmcneill return EINVAL;
238 1.2 jmcneill
239 1.1 jmcneill if (atomic_cas_uint(&sc->sc_busy, 0, 1) != 0)
240 1.1 jmcneill return EBUSY;
241 1.1 jmcneill
242 1.2 jmcneill sc->sc_freq_target = fq;
243 1.1 jmcneill
244 1.2 jmcneill if (sc->sc_freq_throttle)
245 1.2 jmcneill error = 0;
246 1.2 jmcneill else
247 1.2 jmcneill error = cpufreq_dt_set_rate(sc, fq * 1000);
248 1.1 jmcneill
249 1.1 jmcneill atomic_dec_uint(&sc->sc_busy);
250 1.1 jmcneill
251 1.1 jmcneill return error;
252 1.1 jmcneill }
253 1.1 jmcneill
254 1.9 jmcneill static struct cpu_info *
255 1.9 jmcneill cpufreq_dt_cpu_lookup(cpuid_t mpidr)
256 1.9 jmcneill {
257 1.9 jmcneill CPU_INFO_ITERATOR cii;
258 1.9 jmcneill struct cpu_info *ci;
259 1.9 jmcneill
260 1.9 jmcneill for (CPU_INFO_FOREACH(cii, ci)) {
261 1.9 jmcneill if (ci->ci_cpuid == mpidr)
262 1.9 jmcneill return ci;
263 1.9 jmcneill }
264 1.9 jmcneill
265 1.9 jmcneill return NULL;
266 1.9 jmcneill }
267 1.9 jmcneill
268 1.1 jmcneill static void
269 1.1 jmcneill cpufreq_dt_init_sysctl(struct cpufreq_dt_softc *sc)
270 1.1 jmcneill {
271 1.9 jmcneill const struct sysctlnode *node, *cpunode;
272 1.1 jmcneill struct sysctllog *cpufreq_log = NULL;
273 1.9 jmcneill struct cpu_info *ci;
274 1.10 martin bus_addr_t mpidr;
275 1.1 jmcneill int error, i;
276 1.1 jmcneill
277 1.9 jmcneill if (fdtbus_get_reg(sc->sc_phandle, 0, &mpidr, 0) != 0)
278 1.9 jmcneill return;
279 1.9 jmcneill
280 1.9 jmcneill ci = cpufreq_dt_cpu_lookup(mpidr);
281 1.9 jmcneill if (ci == NULL)
282 1.9 jmcneill return;
283 1.9 jmcneill
284 1.1 jmcneill sc->sc_freq_available = kmem_zalloc(strlen("XXXX ") * sc->sc_nopp, KM_SLEEP);
285 1.1 jmcneill for (i = 0; i < sc->sc_nopp; i++) {
286 1.1 jmcneill char buf[6];
287 1.1 jmcneill snprintf(buf, sizeof(buf), i ? " %u" : "%u", sc->sc_opp[i].freq_khz / 1000);
288 1.1 jmcneill strcat(sc->sc_freq_available, buf);
289 1.1 jmcneill }
290 1.1 jmcneill
291 1.1 jmcneill error = sysctl_createv(&cpufreq_log, 0, NULL, &node,
292 1.1 jmcneill CTLFLAG_PERMANENT, CTLTYPE_NODE, "machdep", NULL,
293 1.1 jmcneill NULL, 0, NULL, 0, CTL_MACHDEP, CTL_EOL);
294 1.1 jmcneill if (error)
295 1.1 jmcneill goto sysctl_failed;
296 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &node, &node,
297 1.9 jmcneill 0, CTLTYPE_NODE, "cpufreq", NULL,
298 1.1 jmcneill NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL);
299 1.1 jmcneill if (error)
300 1.1 jmcneill goto sysctl_failed;
301 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &node, &cpunode,
302 1.9 jmcneill 0, CTLTYPE_NODE, cpu_name(ci), NULL,
303 1.1 jmcneill NULL, 0, NULL, 0, CTL_CREATE, CTL_EOL);
304 1.1 jmcneill if (error)
305 1.1 jmcneill goto sysctl_failed;
306 1.1 jmcneill
307 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node,
308 1.1 jmcneill CTLFLAG_READWRITE, CTLTYPE_INT, "target", NULL,
309 1.1 jmcneill cpufreq_dt_sysctl_helper, 0, (void *)sc, 0,
310 1.1 jmcneill CTL_CREATE, CTL_EOL);
311 1.1 jmcneill if (error)
312 1.1 jmcneill goto sysctl_failed;
313 1.1 jmcneill sc->sc_node_target = node->sysctl_num;
314 1.1 jmcneill
315 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node,
316 1.1 jmcneill CTLFLAG_READWRITE, CTLTYPE_INT, "current", NULL,
317 1.1 jmcneill cpufreq_dt_sysctl_helper, 0, (void *)sc, 0,
318 1.1 jmcneill CTL_CREATE, CTL_EOL);
319 1.1 jmcneill if (error)
320 1.1 jmcneill goto sysctl_failed;
321 1.1 jmcneill sc->sc_node_current = node->sysctl_num;
322 1.1 jmcneill
323 1.9 jmcneill error = sysctl_createv(&cpufreq_log, 0, &cpunode, &node,
324 1.1 jmcneill 0, CTLTYPE_STRING, "available", NULL,
325 1.1 jmcneill NULL, 0, sc->sc_freq_available, 0,
326 1.1 jmcneill CTL_CREATE, CTL_EOL);
327 1.1 jmcneill if (error)
328 1.1 jmcneill goto sysctl_failed;
329 1.1 jmcneill sc->sc_node_available = node->sysctl_num;
330 1.1 jmcneill
331 1.1 jmcneill return;
332 1.1 jmcneill
333 1.1 jmcneill sysctl_failed:
334 1.1 jmcneill aprint_error_dev(sc->sc_dev, "couldn't create sysctl nodes: %d\n", error);
335 1.1 jmcneill sysctl_teardown(&cpufreq_log);
336 1.1 jmcneill }
337 1.1 jmcneill
338 1.1 jmcneill static int
339 1.4 jmcneill cpufreq_dt_parse_opp(struct cpufreq_dt_softc *sc)
340 1.1 jmcneill {
341 1.1 jmcneill const int phandle = sc->sc_phandle;
342 1.1 jmcneill const u_int *opp;
343 1.1 jmcneill int len, i;
344 1.4 jmcneill
345 1.4 jmcneill opp = fdtbus_get_prop(phandle, "operating-points", &len);
346 1.4 jmcneill if (len < 8)
347 1.4 jmcneill return ENXIO;
348 1.4 jmcneill
349 1.4 jmcneill sc->sc_nopp = len / 8;
350 1.4 jmcneill sc->sc_opp = kmem_zalloc(sizeof(*sc->sc_opp) * sc->sc_nopp, KM_SLEEP);
351 1.4 jmcneill for (i = 0; i < sc->sc_nopp; i++, opp += 2) {
352 1.4 jmcneill sc->sc_opp[i].freq_khz = be32toh(opp[0]);
353 1.4 jmcneill sc->sc_opp[i].voltage_uv = be32toh(opp[1]);
354 1.4 jmcneill }
355 1.4 jmcneill
356 1.4 jmcneill return 0;
357 1.4 jmcneill }
358 1.4 jmcneill
359 1.12 jmcneill static const struct fdt_opp_info *
360 1.12 jmcneill cpufreq_dt_lookup_opp_info(const int opp_table)
361 1.12 jmcneill {
362 1.12 jmcneill __link_set_decl(fdt_opps, struct fdt_opp_info);
363 1.12 jmcneill struct fdt_opp_info * const *opp;
364 1.12 jmcneill const struct fdt_opp_info *best_opp = NULL;
365 1.12 jmcneill int match, best_match = 0;
366 1.12 jmcneill
367 1.12 jmcneill __link_set_foreach(opp, fdt_opps) {
368 1.18 thorpej const struct device_compatible_entry compat_data[] = {
369 1.18 thorpej { .compat = (*opp)->opp_compat },
370 1.18 thorpej DEVICE_COMPAT_EOL
371 1.18 thorpej };
372 1.18 thorpej
373 1.18 thorpej match = of_compatible_match(opp_table, compat_data);
374 1.12 jmcneill if (match > best_match) {
375 1.12 jmcneill best_match = match;
376 1.12 jmcneill best_opp = *opp;
377 1.12 jmcneill }
378 1.12 jmcneill }
379 1.12 jmcneill
380 1.12 jmcneill return best_opp;
381 1.12 jmcneill }
382 1.12 jmcneill
383 1.12 jmcneill static bool
384 1.13 jmcneill cpufreq_dt_opp_v2_supported(const int opp_table, const int opp_node)
385 1.13 jmcneill {
386 1.13 jmcneill return true;
387 1.13 jmcneill }
388 1.13 jmcneill
389 1.13 jmcneill FDT_OPP(opp_v2, "operating-points-v2", cpufreq_dt_opp_v2_supported);
390 1.13 jmcneill
391 1.13 jmcneill static bool
392 1.12 jmcneill cpufreq_dt_node_supported(const struct fdt_opp_info *opp_info, const int opp_table, const int opp_node)
393 1.12 jmcneill {
394 1.12 jmcneill if (!fdtbus_status_okay(opp_node))
395 1.12 jmcneill return false;
396 1.12 jmcneill if (of_hasprop(opp_node, "opp-suspend"))
397 1.12 jmcneill return false;
398 1.12 jmcneill
399 1.12 jmcneill if (opp_info != NULL)
400 1.12 jmcneill return opp_info->opp_supported(opp_table, opp_node);
401 1.12 jmcneill
402 1.13 jmcneill return false;
403 1.12 jmcneill }
404 1.12 jmcneill
405 1.4 jmcneill static int
406 1.4 jmcneill cpufreq_dt_parse_opp_v2(struct cpufreq_dt_softc *sc)
407 1.4 jmcneill {
408 1.4 jmcneill const int phandle = sc->sc_phandle;
409 1.4 jmcneill struct cpufreq_dt_table *table;
410 1.12 jmcneill const struct fdt_opp_info *opp_info;
411 1.7 jmcneill const u_int *opp_uv;
412 1.4 jmcneill uint64_t opp_hz;
413 1.11 jmcneill int opp_node, len, i, index;
414 1.4 jmcneill
415 1.4 jmcneill const int opp_table = fdtbus_get_phandle(phandle, "operating-points-v2");
416 1.4 jmcneill if (opp_table < 0)
417 1.4 jmcneill return ENOENT;
418 1.4 jmcneill
419 1.4 jmcneill /* If the table is shared, only setup a single instance */
420 1.4 jmcneill if (of_hasprop(opp_table, "opp-shared")) {
421 1.4 jmcneill TAILQ_FOREACH(table, &cpufreq_dt_tables, next)
422 1.4 jmcneill if (table->phandle == opp_table)
423 1.4 jmcneill return EEXIST;
424 1.4 jmcneill sc->sc_table.phandle = opp_table;
425 1.4 jmcneill TAILQ_INSERT_TAIL(&cpufreq_dt_tables, &sc->sc_table, next);
426 1.4 jmcneill }
427 1.4 jmcneill
428 1.12 jmcneill opp_info = cpufreq_dt_lookup_opp_info(opp_table);
429 1.12 jmcneill
430 1.4 jmcneill for (opp_node = OF_child(opp_table); opp_node; opp_node = OF_peer(opp_node)) {
431 1.12 jmcneill if (!cpufreq_dt_node_supported(opp_info, opp_table, opp_node))
432 1.11 jmcneill continue;
433 1.11 jmcneill sc->sc_nopp++;
434 1.4 jmcneill }
435 1.4 jmcneill
436 1.4 jmcneill if (sc->sc_nopp == 0)
437 1.4 jmcneill return EINVAL;
438 1.4 jmcneill
439 1.4 jmcneill sc->sc_opp = kmem_zalloc(sizeof(*sc->sc_opp) * sc->sc_nopp, KM_SLEEP);
440 1.11 jmcneill index = sc->sc_nopp - 1;
441 1.4 jmcneill for (opp_node = OF_child(opp_table), i = 0; opp_node; opp_node = OF_peer(opp_node), i++) {
442 1.12 jmcneill if (!cpufreq_dt_node_supported(opp_info, opp_table, opp_node))
443 1.11 jmcneill continue;
444 1.4 jmcneill if (of_getprop_uint64(opp_node, "opp-hz", &opp_hz) != 0)
445 1.4 jmcneill return EINVAL;
446 1.7 jmcneill opp_uv = fdtbus_get_prop(opp_node, "opp-microvolt", &len);
447 1.7 jmcneill if (opp_uv == NULL || len < 1)
448 1.4 jmcneill return EINVAL;
449 1.8 jmcneill /* Table is in reverse order */
450 1.8 jmcneill sc->sc_opp[index].freq_khz = (u_int)(opp_hz / 1000);
451 1.8 jmcneill sc->sc_opp[index].voltage_uv = be32toh(opp_uv[0]);
452 1.8 jmcneill of_getprop_uint32(opp_node, "clock-latency-ns", &sc->sc_opp[index].latency_ns);
453 1.11 jmcneill --index;
454 1.4 jmcneill }
455 1.4 jmcneill
456 1.4 jmcneill return 0;
457 1.4 jmcneill }
458 1.4 jmcneill
459 1.4 jmcneill static int
460 1.4 jmcneill cpufreq_dt_parse(struct cpufreq_dt_softc *sc)
461 1.4 jmcneill {
462 1.4 jmcneill const int phandle = sc->sc_phandle;
463 1.4 jmcneill int error, i;
464 1.1 jmcneill
465 1.3 jmcneill if (of_hasprop(phandle, "cpu-supply")) {
466 1.3 jmcneill sc->sc_supply = fdtbus_regulator_acquire(phandle, "cpu-supply");
467 1.3 jmcneill if (sc->sc_supply == NULL) {
468 1.3 jmcneill aprint_error_dev(sc->sc_dev,
469 1.3 jmcneill "couldn't acquire cpu-supply\n");
470 1.3 jmcneill return ENXIO;
471 1.3 jmcneill }
472 1.1 jmcneill }
473 1.1 jmcneill sc->sc_clk = fdtbus_clock_get_index(phandle, 0);
474 1.1 jmcneill if (sc->sc_clk == NULL) {
475 1.1 jmcneill aprint_error_dev(sc->sc_dev, "couldn't acquire clock\n");
476 1.1 jmcneill return ENXIO;
477 1.1 jmcneill }
478 1.1 jmcneill
479 1.4 jmcneill mutex_enter(&cpufreq_dt_tables_lock);
480 1.4 jmcneill if (of_hasprop(phandle, "operating-points"))
481 1.4 jmcneill error = cpufreq_dt_parse_opp(sc);
482 1.4 jmcneill else if (of_hasprop(phandle, "operating-points-v2"))
483 1.4 jmcneill error = cpufreq_dt_parse_opp_v2(sc);
484 1.4 jmcneill else
485 1.4 jmcneill error = EINVAL;
486 1.4 jmcneill mutex_exit(&cpufreq_dt_tables_lock);
487 1.1 jmcneill
488 1.4 jmcneill if (error) {
489 1.5 jmcneill if (error != EEXIST)
490 1.5 jmcneill aprint_error_dev(sc->sc_dev,
491 1.5 jmcneill "couldn't parse operating points: %d\n", error);
492 1.4 jmcneill return error;
493 1.4 jmcneill }
494 1.1 jmcneill
495 1.4 jmcneill for (i = 0; i < sc->sc_nopp; i++) {
496 1.14 jmcneill aprint_debug_dev(sc->sc_dev, "supported rate: %u.%03u MHz, %u uV\n",
497 1.1 jmcneill sc->sc_opp[i].freq_khz / 1000,
498 1.1 jmcneill sc->sc_opp[i].freq_khz % 1000,
499 1.1 jmcneill sc->sc_opp[i].voltage_uv);
500 1.1 jmcneill }
501 1.1 jmcneill
502 1.1 jmcneill return 0;
503 1.1 jmcneill }
504 1.1 jmcneill
505 1.1 jmcneill static int
506 1.1 jmcneill cpufreq_dt_match(device_t parent, cfdata_t cf, void *aux)
507 1.1 jmcneill {
508 1.1 jmcneill struct fdt_attach_args * const faa = aux;
509 1.1 jmcneill const int phandle = faa->faa_phandle;
510 1.1 jmcneill bus_addr_t addr;
511 1.1 jmcneill
512 1.1 jmcneill if (fdtbus_get_reg(phandle, 0, &addr, NULL) != 0)
513 1.1 jmcneill return 0;
514 1.4 jmcneill
515 1.4 jmcneill if (!of_hasprop(phandle, "clocks"))
516 1.1 jmcneill return 0;
517 1.1 jmcneill
518 1.4 jmcneill if (!of_hasprop(phandle, "operating-points") &&
519 1.4 jmcneill !of_hasprop(phandle, "operating-points-v2"))
520 1.1 jmcneill return 0;
521 1.1 jmcneill
522 1.1 jmcneill return 1;
523 1.1 jmcneill }
524 1.1 jmcneill
525 1.1 jmcneill static void
526 1.1 jmcneill cpufreq_dt_init(device_t self)
527 1.1 jmcneill {
528 1.1 jmcneill struct cpufreq_dt_softc * const sc = device_private(self);
529 1.1 jmcneill int error;
530 1.1 jmcneill
531 1.1 jmcneill if ((error = cpufreq_dt_parse(sc)) != 0)
532 1.1 jmcneill return;
533 1.1 jmcneill
534 1.4 jmcneill pmf_event_register(sc->sc_dev, PMFE_THROTTLE_ENABLE, cpufreq_dt_throttle_enable, true);
535 1.4 jmcneill pmf_event_register(sc->sc_dev, PMFE_THROTTLE_DISABLE, cpufreq_dt_throttle_disable, true);
536 1.4 jmcneill
537 1.1 jmcneill cpufreq_dt_init_sysctl(sc);
538 1.14 jmcneill
539 1.14 jmcneill if (sc->sc_nopp > 0) {
540 1.15 jmcneill struct cpufreq_dt_opp * const opp = &sc->sc_opp[0];
541 1.14 jmcneill
542 1.14 jmcneill aprint_normal_dev(sc->sc_dev, "rate: %u.%03u MHz, %u uV\n",
543 1.14 jmcneill opp->freq_khz / 1000, opp->freq_khz % 1000, opp->voltage_uv);
544 1.14 jmcneill cpufreq_dt_set_rate(sc, opp->freq_khz);
545 1.14 jmcneill }
546 1.1 jmcneill }
547 1.1 jmcneill
548 1.4 jmcneill static int
549 1.4 jmcneill cpufreq_dt_lock_init(void)
550 1.4 jmcneill {
551 1.4 jmcneill mutex_init(&cpufreq_dt_tables_lock, MUTEX_DEFAULT, IPL_NONE);
552 1.4 jmcneill return 0;
553 1.4 jmcneill }
554 1.4 jmcneill
555 1.1 jmcneill static void
556 1.1 jmcneill cpufreq_dt_attach(device_t parent, device_t self, void *aux)
557 1.1 jmcneill {
558 1.4 jmcneill static ONCE_DECL(locks);
559 1.1 jmcneill struct cpufreq_dt_softc * const sc = device_private(self);
560 1.1 jmcneill struct fdt_attach_args * const faa = aux;
561 1.1 jmcneill
562 1.4 jmcneill RUN_ONCE(&locks, cpufreq_dt_lock_init);
563 1.4 jmcneill
564 1.1 jmcneill sc->sc_dev = self;
565 1.1 jmcneill sc->sc_phandle = faa->faa_phandle;
566 1.1 jmcneill
567 1.1 jmcneill aprint_naive("\n");
568 1.1 jmcneill aprint_normal("\n");
569 1.1 jmcneill
570 1.1 jmcneill config_interrupts(self, cpufreq_dt_init);
571 1.1 jmcneill }
572 1.1 jmcneill
573 1.1 jmcneill CFATTACH_DECL_NEW(cpufreq_dt, sizeof(struct cpufreq_dt_softc),
574 1.1 jmcneill cpufreq_dt_match, cpufreq_dt_attach, NULL, NULL);
575