dwcmmc_fdt.c revision 1.10 1 1.10 jmcneill /* $NetBSD: dwcmmc_fdt.c,v 1.10 2020/01/01 12:18:18 jmcneill Exp $ */
2 1.1 jmcneill
3 1.1 jmcneill /*-
4 1.1 jmcneill * Copyright (c) 2015-2018 Jared McNeill <jmcneill (at) invisible.ca>
5 1.1 jmcneill * All rights reserved.
6 1.1 jmcneill *
7 1.1 jmcneill * Redistribution and use in source and binary forms, with or without
8 1.1 jmcneill * modification, are permitted provided that the following conditions
9 1.1 jmcneill * are met:
10 1.1 jmcneill * 1. Redistributions of source code must retain the above copyright
11 1.1 jmcneill * notice, this list of conditions and the following disclaimer.
12 1.1 jmcneill * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jmcneill * notice, this list of conditions and the following disclaimer in the
14 1.1 jmcneill * documentation and/or other materials provided with the distribution.
15 1.1 jmcneill *
16 1.1 jmcneill * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 1.1 jmcneill * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 1.1 jmcneill * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 1.1 jmcneill * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 1.1 jmcneill * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 1.1 jmcneill * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 1.1 jmcneill * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 1.1 jmcneill * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 1.1 jmcneill * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.1 jmcneill * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.1 jmcneill * SUCH DAMAGE.
27 1.1 jmcneill */
28 1.1 jmcneill
29 1.1 jmcneill #include <sys/cdefs.h>
30 1.10 jmcneill __KERNEL_RCSID(0, "$NetBSD: dwcmmc_fdt.c,v 1.10 2020/01/01 12:18:18 jmcneill Exp $");
31 1.1 jmcneill
32 1.1 jmcneill #include <sys/param.h>
33 1.1 jmcneill #include <sys/bus.h>
34 1.1 jmcneill #include <sys/device.h>
35 1.1 jmcneill #include <sys/intr.h>
36 1.1 jmcneill #include <sys/systm.h>
37 1.1 jmcneill #include <sys/kernel.h>
38 1.1 jmcneill #include <sys/mutex.h>
39 1.1 jmcneill #include <sys/condvar.h>
40 1.1 jmcneill #include <sys/gpio.h>
41 1.1 jmcneill
42 1.1 jmcneill #include <dev/ic/dwc_mmc_var.h>
43 1.9 jmcneill #include <dev/sdmmc/sdmmcchip.h>
44 1.1 jmcneill #include <dev/fdt/fdtvar.h>
45 1.1 jmcneill
46 1.1 jmcneill static int dwcmmc_fdt_match(device_t, cfdata_t, void *);
47 1.1 jmcneill static void dwcmmc_fdt_attach(device_t, device_t, void *);
48 1.1 jmcneill
49 1.9 jmcneill static void dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *);
50 1.9 jmcneill static void dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *);
51 1.9 jmcneill
52 1.1 jmcneill static int dwcmmc_fdt_card_detect(struct dwc_mmc_softc *);
53 1.2 jmcneill static int dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *, int);
54 1.9 jmcneill static int dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *, int);
55 1.1 jmcneill
56 1.1 jmcneill struct dwcmmc_fdt_config {
57 1.1 jmcneill u_int ciu_div;
58 1.9 jmcneill u_int flags;
59 1.1 jmcneill };
60 1.1 jmcneill
61 1.7 jmcneill static const struct dwcmmc_fdt_config dwcmmc_rk3288_config = {
62 1.1 jmcneill .ciu_div = 2,
63 1.9 jmcneill .flags = DWC_MMC_F_USE_HOLD_REG |
64 1.9 jmcneill DWC_MMC_F_DMA,
65 1.1 jmcneill };
66 1.1 jmcneill
67 1.1 jmcneill static const struct of_compat_data compat_data[] = {
68 1.7 jmcneill { "rockchip,rk3288-dw-mshc", (uintptr_t)&dwcmmc_rk3288_config },
69 1.1 jmcneill { NULL }
70 1.1 jmcneill };
71 1.1 jmcneill
72 1.1 jmcneill struct dwcmmc_fdt_softc {
73 1.1 jmcneill struct dwc_mmc_softc sc;
74 1.1 jmcneill struct clk *sc_clk_biu;
75 1.1 jmcneill struct clk *sc_clk_ciu;
76 1.1 jmcneill struct fdtbus_gpio_pin *sc_pin_cd;
77 1.1 jmcneill const struct dwcmmc_fdt_config *sc_conf;
78 1.2 jmcneill u_int sc_ciu_div;
79 1.9 jmcneill struct fdtbus_regulator *sc_vqmmc;
80 1.9 jmcneill struct fdtbus_mmc_pwrseq *sc_pwrseq;
81 1.1 jmcneill };
82 1.1 jmcneill
83 1.8 jmcneill CFATTACH_DECL_NEW(dwcmmc_fdt, sizeof(struct dwcmmc_fdt_softc),
84 1.1 jmcneill dwcmmc_fdt_match, dwcmmc_fdt_attach, NULL, NULL);
85 1.1 jmcneill
86 1.1 jmcneill static int
87 1.1 jmcneill dwcmmc_fdt_match(device_t parent, cfdata_t cf, void *aux)
88 1.1 jmcneill {
89 1.1 jmcneill struct fdt_attach_args * const faa = aux;
90 1.1 jmcneill
91 1.1 jmcneill return of_match_compat_data(faa->faa_phandle, compat_data);
92 1.1 jmcneill }
93 1.1 jmcneill
94 1.1 jmcneill static void
95 1.1 jmcneill dwcmmc_fdt_attach(device_t parent, device_t self, void *aux)
96 1.1 jmcneill {
97 1.1 jmcneill struct dwcmmc_fdt_softc *esc = device_private(self);
98 1.1 jmcneill struct dwc_mmc_softc *sc = &esc->sc;
99 1.1 jmcneill struct fdt_attach_args * const faa = aux;
100 1.1 jmcneill const int phandle = faa->faa_phandle;
101 1.1 jmcneill char intrstr[128];
102 1.3 jmcneill u_int fifo_depth;
103 1.1 jmcneill bus_addr_t addr;
104 1.1 jmcneill bus_size_t size;
105 1.1 jmcneill int error;
106 1.1 jmcneill
107 1.1 jmcneill if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
108 1.1 jmcneill aprint_error(": couldn't get registers\n");
109 1.1 jmcneill return;
110 1.1 jmcneill }
111 1.1 jmcneill
112 1.1 jmcneill if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth))
113 1.1 jmcneill fifo_depth = 0;
114 1.1 jmcneill
115 1.7 jmcneill fdtbus_clock_assign(phandle);
116 1.7 jmcneill
117 1.1 jmcneill esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu");
118 1.1 jmcneill if (esc->sc_clk_biu == NULL) {
119 1.1 jmcneill aprint_error(": couldn't get clock biu\n");
120 1.1 jmcneill return;
121 1.1 jmcneill }
122 1.1 jmcneill esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu");
123 1.1 jmcneill if (esc->sc_clk_ciu == NULL) {
124 1.1 jmcneill aprint_error(": couldn't get clock ciu\n");
125 1.1 jmcneill return;
126 1.1 jmcneill }
127 1.1 jmcneill
128 1.1 jmcneill error = clk_enable(esc->sc_clk_biu);
129 1.1 jmcneill if (error) {
130 1.1 jmcneill aprint_error(": couldn't enable clock biu: %d\n", error);
131 1.1 jmcneill return;
132 1.1 jmcneill }
133 1.1 jmcneill error = clk_enable(esc->sc_clk_ciu);
134 1.1 jmcneill if (error) {
135 1.1 jmcneill aprint_error(": couldn't enable clock ciu: %d\n", error);
136 1.1 jmcneill return;
137 1.1 jmcneill }
138 1.1 jmcneill
139 1.9 jmcneill esc->sc_vqmmc = fdtbus_regulator_acquire(phandle, "vqmmc-supply");
140 1.9 jmcneill esc->sc_pwrseq = fdtbus_mmc_pwrseq_get(phandle);
141 1.9 jmcneill
142 1.1 jmcneill sc->sc_dev = self;
143 1.1 jmcneill sc->sc_bst = faa->faa_bst;
144 1.1 jmcneill sc->sc_dmat = faa->faa_dmat;
145 1.1 jmcneill error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
146 1.1 jmcneill if (error) {
147 1.6 christos aprint_error(": couldn't map %#" PRIx64 ": %d\n",
148 1.1 jmcneill (uint64_t)addr, error);
149 1.1 jmcneill return;
150 1.1 jmcneill }
151 1.4 jmcneill esc->sc_conf = (void *)of_search_compatible(phandle, compat_data)->data;
152 1.1 jmcneill
153 1.3 jmcneill if (of_getprop_uint32(phandle, "max-frequency", &sc->sc_clock_freq) != 0)
154 1.3 jmcneill sc->sc_clock_freq = UINT_MAX;
155 1.9 jmcneill if (of_getprop_uint32(phandle, "bus-width", &sc->sc_bus_width) != 0)
156 1.9 jmcneill sc->sc_bus_width = 4;
157 1.2 jmcneill
158 1.1 jmcneill sc->sc_fifo_depth = fifo_depth;
159 1.10 jmcneill sc->sc_ciu_div = esc->sc_conf->ciu_div;
160 1.9 jmcneill sc->sc_flags = esc->sc_conf->flags;
161 1.9 jmcneill sc->sc_pre_power_on = dwcmmc_fdt_pre_power_on;
162 1.9 jmcneill sc->sc_post_power_on = dwcmmc_fdt_post_power_on;
163 1.2 jmcneill sc->sc_bus_clock = dwcmmc_fdt_bus_clock;
164 1.9 jmcneill sc->sc_signal_voltage = dwcmmc_fdt_signal_voltage;
165 1.1 jmcneill
166 1.1 jmcneill esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios",
167 1.1 jmcneill GPIO_PIN_INPUT);
168 1.1 jmcneill if (esc->sc_pin_cd)
169 1.1 jmcneill sc->sc_card_detect = dwcmmc_fdt_card_detect;
170 1.1 jmcneill
171 1.1 jmcneill aprint_naive("\n");
172 1.2 jmcneill aprint_normal(": DesignWare SD/MMC\n");
173 1.1 jmcneill
174 1.1 jmcneill if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
175 1.1 jmcneill aprint_error_dev(self, "failed to decode interrupt\n");
176 1.1 jmcneill return;
177 1.1 jmcneill }
178 1.1 jmcneill
179 1.1 jmcneill if (dwc_mmc_init(sc) != 0)
180 1.1 jmcneill return;
181 1.1 jmcneill
182 1.1 jmcneill sc->sc_ih = fdtbus_intr_establish(phandle, 0, IPL_BIO, 0,
183 1.1 jmcneill dwc_mmc_intr, sc);
184 1.1 jmcneill if (sc->sc_ih == NULL) {
185 1.1 jmcneill aprint_error_dev(self, "couldn't establish interrupt on %s\n",
186 1.1 jmcneill intrstr);
187 1.1 jmcneill return;
188 1.1 jmcneill }
189 1.1 jmcneill aprint_normal_dev(self, "interrupting on %s\n", intrstr);
190 1.1 jmcneill }
191 1.1 jmcneill
192 1.9 jmcneill static void
193 1.9 jmcneill dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *sc)
194 1.9 jmcneill {
195 1.9 jmcneill struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
196 1.9 jmcneill
197 1.9 jmcneill if (esc->sc_pwrseq != NULL)
198 1.9 jmcneill fdtbus_mmc_pwrseq_pre_power_on(esc->sc_pwrseq);
199 1.9 jmcneill }
200 1.9 jmcneill
201 1.9 jmcneill static void
202 1.9 jmcneill dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *sc)
203 1.9 jmcneill {
204 1.9 jmcneill struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
205 1.9 jmcneill
206 1.9 jmcneill if (esc->sc_pwrseq != NULL)
207 1.9 jmcneill fdtbus_mmc_pwrseq_post_power_on(esc->sc_pwrseq);
208 1.9 jmcneill }
209 1.9 jmcneill
210 1.1 jmcneill static int
211 1.1 jmcneill dwcmmc_fdt_card_detect(struct dwc_mmc_softc *sc)
212 1.1 jmcneill {
213 1.1 jmcneill struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
214 1.1 jmcneill
215 1.1 jmcneill KASSERT(esc->sc_pin_cd != NULL);
216 1.1 jmcneill
217 1.1 jmcneill return fdtbus_gpio_read(esc->sc_pin_cd);
218 1.1 jmcneill }
219 1.2 jmcneill
220 1.2 jmcneill static int
221 1.2 jmcneill dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *sc, int rate)
222 1.2 jmcneill {
223 1.2 jmcneill struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
224 1.10 jmcneill const u_int ciu_div = sc->sc_ciu_div > 0 ? sc->sc_ciu_div : 1;
225 1.2 jmcneill int error;
226 1.2 jmcneill
227 1.2 jmcneill error = clk_set_rate(esc->sc_clk_ciu, 1000 * rate * ciu_div);
228 1.2 jmcneill if (error != 0) {
229 1.2 jmcneill aprint_error_dev(sc->sc_dev, "failed to set rate to %u kHz: %d\n",
230 1.2 jmcneill rate * ciu_div, error);
231 1.2 jmcneill return error;
232 1.2 jmcneill }
233 1.2 jmcneill
234 1.9 jmcneill sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu);
235 1.2 jmcneill
236 1.2 jmcneill aprint_debug_dev(sc->sc_dev, "set clock rate to %u kHz (target %u kHz)\n",
237 1.2 jmcneill sc->sc_clock_freq, rate);
238 1.2 jmcneill
239 1.2 jmcneill return 0;
240 1.2 jmcneill }
241 1.9 jmcneill
242 1.9 jmcneill static int
243 1.9 jmcneill dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *sc, int signal_voltage)
244 1.9 jmcneill {
245 1.9 jmcneill struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
246 1.9 jmcneill u_int uvol;
247 1.9 jmcneill int error;
248 1.9 jmcneill
249 1.9 jmcneill if (esc->sc_vqmmc == NULL)
250 1.9 jmcneill return 0;
251 1.9 jmcneill
252 1.9 jmcneill switch (signal_voltage) {
253 1.9 jmcneill case SDMMC_SIGNAL_VOLTAGE_180:
254 1.9 jmcneill uvol = 1800000;
255 1.9 jmcneill break;
256 1.9 jmcneill case SDMMC_SIGNAL_VOLTAGE_330:
257 1.9 jmcneill uvol = 3300000;
258 1.9 jmcneill break;
259 1.9 jmcneill default:
260 1.9 jmcneill return EINVAL;
261 1.9 jmcneill }
262 1.9 jmcneill
263 1.9 jmcneill error = fdtbus_regulator_supports_voltage(esc->sc_vqmmc, uvol, uvol);
264 1.9 jmcneill if (error != 0)
265 1.9 jmcneill return 0;
266 1.9 jmcneill
267 1.9 jmcneill error = fdtbus_regulator_set_voltage(esc->sc_vqmmc, uvol, uvol);
268 1.9 jmcneill if (error != 0)
269 1.9 jmcneill return error;
270 1.9 jmcneill
271 1.9 jmcneill return fdtbus_regulator_enable(esc->sc_vqmmc);
272 1.9 jmcneill }
273