| History log of /src/sys/dev/fdt/dwcmmc_fdt.c |
| Revision | | Date | Author | Comments |
| 1.24 |
| 19-Aug-2024 |
skrll | Match "starfive,jh7110-mmc"
|
| 1.23 |
| 09-Feb-2024 |
skrll | Restrict dwcmmc to 32bit DMA (<4GB) regardless of attachment
|
| 1.22 |
| 09-Feb-2024 |
skrll | Limit DMA to below 4GB - the supported controllers are limited this
way.
Thanks to jmcneill for a version of this patch.
|
| 1.21 |
| 09-Feb-2024 |
skrll | spaces to tabs
|
| 1.20 |
| 29-Dec-2023 |
skrll | dwcmmc_fdt_bus_clock: fix an aprint_debug_dev frequency units botch.
|
| 1.19 |
| 06-Feb-2022 |
jmcneill | fdt: dwcmmc: Honour broken-cd and non-removable DT properties
|
| 1.18 |
| 24-Mar-2021 |
skrll | Fix previous
|
| 1.17 |
| 23-Mar-2021 |
jmcneill | Match generic "snps,dw-mshc" compat string as found in BeagleV.
|
| 1.16 |
| 27-Jan-2021 |
thorpej | branches: 1.16.2;
Rename of_match_compat_data() to of_compatible_match(). Similarly,
rename of_search_compatible() to of_compatible_lookup().
Standardize on of_compatible_match() for driver matching, and adapt
all call sites.
|
| 1.15 |
| 27-Jan-2021 |
thorpej | Use DEVICE_COMPAT_EOL.
|
| 1.14 |
| 25-Jan-2021 |
thorpej | Since we're using designated initialisers for compat data, we should
use a completely empty initializer for the sentinel.
|
| 1.13 |
| 18-Jan-2021 |
thorpej | Remove "struct of_compat_data" and replace its usage with
"struct device_compatible_entry"; they are ABI-compatible.
Fix several "loses const qualifier" bugs encountered during
this conversion.
|
| 1.12 |
| 15-Jan-2021 |
ryo | use fdtbus_intr_establish_xname
|
| 1.11 |
| 22-Jan-2020 |
jmcneill | branches: 1.11.6;
dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers
|
| 1.10 |
| 01-Jan-2020 |
jmcneill | branches: 1.10.2;
Fix performance regression with previous
|
| 1.9 |
| 01-Jan-2020 |
jmcneill | dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
|
| 1.8 |
| 30-Apr-2019 |
jmcneill | branches: 1.8.2;
Use correct size of softc in CFATTACH_DECL_NEW
|
| 1.7 |
| 12-Aug-2018 |
jmcneill | Use more generic rk3288 compatible string, and do clock assignments when present
|
| 1.6 |
| 17-Jul-2018 |
christos | Use PRI?64 instead of ll?
|
| 1.5 |
| 02-Jul-2018 |
jmcneill | sc_clock_freq is in Hz, not kHz
|
| 1.4 |
| 01-Jul-2018 |
jmcneill | Fix 32-bit build
|
| 1.3 |
| 22-Jun-2018 |
jmcneill | branches: 1.3.2; 1.3.4;
If max-frequency is not specified, use UINT_MAX instead of the rate programmed by the bootloader.
|
| 1.2 |
| 19-Jun-2018 |
jmcneill | dwcmmc: set ciu clock rate rather than assuming fixed input rate
|
| 1.1 |
| 16-Jun-2018 |
jmcneill | Add initial support for Rockchip RK3328 SoC.
|
| 1.3.4.2 |
| 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.3.4.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.3.2.4 |
| 06-Sep-2018 |
pgoyette | Sync with HEAD
Resolve a couple of conflicts (result of the uimin/uimax changes)
|
| 1.3.2.3 |
| 28-Jul-2018 |
pgoyette | Sync with HEAD
|
| 1.3.2.2 |
| 25-Jun-2018 |
pgoyette | Sync with HEAD
|
| 1.3.2.1 |
| 22-Jun-2018 |
pgoyette | file dwcmmc_fdt.c was added on branch pgoyette-compat on 2018-06-25 07:25:49 +0000
|
| 1.8.2.2 |
| 25-Feb-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #717):
sys/dev/fdt/dwcmmc_fdt.c 1.11
sys/dev/ic/bwfm.c 1.15-1.18
sys/dev/ic/bwfmreg.h 1.4-1.6
sys/dev/ic/bwfmvar.h 1.4,1.5
sys/dev/ic/dwc_mmc.c 1.21,1.22
sys/dev/ic/dwc_mmc_reg.h 1.8,1.9,1.12,1.13
sys/dev/pcmcia/pcmciareg.h 1.11
sys/dev/sdmmc/if_bwfm_sdio.c 1.4,1.6-1.12
sys/dev/sdmmc/if_bwfm_sdio.h 1.1,1.2
sys/dev/sdmmc/sdhc.c 1.105,1.106
sys/dev/sdmmc/sdmmc.c 1.37,1.39
sys/dev/sdmmc/sdmmc_cis.c 1.6,1.8
sys/dev/sdmmc/sdmmc_io.c 1.15-1.19
sys/dev/sdmmc/sdmmc_ioreg.h 1.4,1.5
sys/dev/sdmmc/sdmmc_mem.c 1.69-1.71
sys/dev/sdmmc/sdmmcdevs 1.5-1.8
sys/dev/sdmmc/sdmmcvar.h 1.31,1.33,1.34
sys/net/if_media.h 1.66
Add Broadcom devices
-
Fix typo
-
add PCMCIA_CISTPL_SDIO definition.
-
From OpenBSD:
- move event handling to workqueue
- check for save/restore capability
-
Tag work queue as MPsafe and increase length.
-
Juse use bpf_mtap(), the 802.11 encapsulation is handled by firmware.
-
From OpenBSD:
- support block length per function
- add functions to read/write regions
-
Decode (but not use) SDIO tuple in CIS.
-
Fix locking.
-
Add more SDIO defines (partially from version 3.0).
-
From OpenBSD:
- All the missing pieces (firmware load, chip setup, protocol handling)
TX queue and interrupt handling via sdmmc_task.
-
Fix locking.
-
Fix packet parsing.
-
Add parser for original firmware config files.
-
tagging work queue as MPSAFE was premature. Revert.
-
SD_IO_RW_EXTENDED is a data transfer command, so set ADTC flag instead of AC
Use correct function to verify if a task has been queued. Avoids race
that can corrupt the task queue.
-
More register definitions.
-
Add IFM_IEEE80211_VHT subtype, IFM_IEEE80211_11AC operating mode, and missing descriptions
-
If firmware is connected in HT or VHT mode, report it to SIOCGIFMEDIA
-
white space police.
Skip setting power when the voltage doesn't change.
Also increase some timeouts.
-
Add and use sdmmc_pause to avoid long-term busy waits.
-
Add sdio abort function.
-
Additional error messages.
-
Print parameters for SDIO devices.
-
Minor cosmetics.
-
Simplyfy sdmmc_io_set_blocklen function signature by dropping the
extra softc pointer. Aligns with OpenBSD.
-
Missing commit for sdio abort function.
-
More code from OpenBSD
-
no need to splnet() when enqueing packets
-
explicit structure padding
-
make internal functions static
-
also prepare for GPIO interrupts.
-
Avoid warnings for tautological shifts as sole conditional.
-
Follow the Linux driver an use the FDT "compatible" property to build a
filename for the nvram config file, fall back to the standard filename.
E.g.
[Caching 123 nodes and 1093 properties]
compatible 73696e6f 766f6970 2c627069 2d6d322d "sinovoip,bpi-m2-
0010: 7a65726f 00...... ........ ........ zero"
0015: 616c6c77 696e6e65 722c7375 6e38692d "allwinner,sun8i-
0025: 68322d70 6c757300 ........ ........ h2-plus"
interrupt-parent 00000001 ........ ........ ........ ....
model 42616e61 6e612050 69204250 492d4d32 "Banana Pi BPI-M2
0010: 2d5a6572 6f00.... ........ ........ -Zero"
name 00...... ........ ........ ........ ""
serial-number 30326330 30303432 65636431 36376566 02c00042ecd167ef
0010: 00...... ........ ........ ........ .
-rw-r--r-- 1 root wheel 875 Nov 2 12:06 brcmfmac43430-sdio.AP6212.txt
lrwxr-xr-x 1 root wheel 29 Dec 30 16:19 brcmfmac43430-sdio.sinovoip,bpi-m2-zero.txt -> brcmfmac43430-sdio.AP6212.txt
-rw-r--r-- 1 root wheel 874 Jun 30 2019 brcmfmac43430-sdio.raspberrypi,3-model-b.txt
-rw-r--r-- 1 root wheel 1864 Jun 30 2019 brcmfmac43455-sdio.raspberrypi,3-model-b-plus.txt
lrwxr-xr-x 1 root wheel 29 Dec 30 11:24 brcmfmac43455-sdio.raspberrypi,4-model-b-plus.txt -> brcmfmac43455-sdio.raspberrypi,3-model-b-plus.txt
-
Add product ID for Broadcom BCM43455
-
Use correct firmware for BCM43456
-
size check was backwards.
-
Be less noisy for some commands.
-
Fix DWC_MMC_INT_SDIO_INT bit
-
dwc_mmc fixes:
- Rockchip uses a different SDIO int bit, so take this into consideration
- Avoid unnecessary resets and always wait for resets to complete
- kpause instead of delay while holding spinlock
- Do not attempt autostop for SD_IO_RW_EXTENDED commands
- Allow for sub-blklen byte counts for single block transfers
-
More SDIO stability and performance fixes
|
| 1.8.2.1 |
| 21-Jan-2020 |
martin | Pull up following revision(s) (requested by mrg in ticket #616):
sys/dev/ic/anx_dp.c: revision 1.2
sys/arch/evbarm/conf/GENERIC64: revision 1.126
sys/dev/ic/anx_dp.h: revision 1.1
sys/arch/evbarm/conf/GENERIC64: revision 1.128
sys/dev/ic/anx_dp.h: revision 1.2
sys/dev/fdt/dwcmmc_fdt.c: revision 1.9
sys/dev/i2c/cwfg.c: revision 1.1
sys/conf/files: revision 1.1247
sys/dev/fdt/pwm_backlight.c: revision 1.5
sys/dev/fdt/pwm_backlight.c: revision 1.6
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.14
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.15
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.16
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.17
sys/dev/ic/dwc_mmc.c: revision 1.20
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.18
sys/arch/arm/rockchip/rk3399_cru.c: revision 1.19
sys/dev/usb/usbdevs: revision 1.775
sys/arch/arm/rockchip/rk_dwhdmi.c: revision 1.4
sys/dev/fdt/simple_amplifier.c: revision 1.1
sys/dev/i2c/files.i2c: revision 1.105
sys/arch/evbarm/conf/GENERIC64: revision 1.117
sys/arch/evbarm/conf/GENERIC64: revision 1.118
sys/dev/i2c/files.i2c: revision 1.107
sys/dev/fdt/files.fdt: revision 1.49
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.1
sys/dev/ic/dwc_mmc_var.h: revision 1.9
sys/dev/i2c/rkpmic.c: revision 1.4
sys/arch/arm/rockchip/rk_anxdp.c: revision 1.2
sys/dev/i2c/rkpmic.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.6
sys/arch/arm/rockchip/rk_vop.c: revision 1.4
sys/arch/arm/rockchip/rk_vop.c: revision 1.5
sys/dev/i2c/rkpmic.c: revision 1.8
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.1
sys/dev/usb/ums.c: revision 1.96 (via patch)
sys/arch/arm/rockchip/rk_pwm.c: revision 1.3
sys/arch/arm/dts/rk3399-pinebook-pro.dts: revision 1.2
sys/dev/i2c/es8316ac.c: revision 1.1
sys/dev/fdt/dwcmmc_fdt.c: revision 1.10
sys/dev/i2c/es8316ac.c: revision 1.2
sys/dev/fdt/fdt_panel.c: revision 1.1
sys/dev/ic/dwc_mmc.c: revision 1.18
sys/dev/fdt/fdt_panel.c: revision 1.2
sys/dev/ic/dwc_mmc.c: revision 1.19
sys/arch/arm/dts/rk3399-rockpro64.dts: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.5
sys/dev/ic/dwc_mmc_var.h: revision 1.10
sys/dev/fdt/fdt_port.c: revision 1.6
sys/arch/evbarm/conf/GENERIC64: revision 1.122
sys/dev/ic/dwc_mmc_var.h: revision 1.11
sys/dev/fdt/files.fdt: revision 1.50
sys/arch/evbarm/conf/GENERIC64: revision 1.123
sys/arch/arm/rockchip/rk_i2s.c: revision 1.2
sys/arch/arm/rockchip/files.rockchip: revision 1.23
sys/arch/evbarm/conf/GENERIC64: revision 1.124
sys/dev/ic/anx_dp.c: revision 1.1
rkpmic: add RTC support; register w/ todr(9)
rkpmic: correct delay
Add support for SDIO interrupts.
fix copy/paste error in mux_pll_src_cpll_gpll_ppll_parents[]
add RK3399 eDP clocks
add RK3399 DisplayPort clocks
style fix/KNF
rk3399_cru: implement dclk_vop0_frac and dclk_vop1_frac
Move drm_encoder from rkvop(4) to the SoC-layer output pipe drivers (rk_dwhdmi).
rkvop: set stride using virtual framebuffer width instead of display mode
rk3399_cru: Reparent dclk_vop[01] to gpll via dclk_vop[01]_frac.
The previous source of dclk_vop[01] was vpll via dclk_vop[01]_div.
vpll is apparently used directly as a pixel clock source for the
HDMI PHY, and we don't want the other VOP's dclk changing out from
under it because we can't handle finding a replacement clock source
with the right rate yet.
gpll happens to run at 594MHz, which works well as a basis for pixel
clocks.
Linux suggests that the source clock of the fractional divider needs
to be more than twenty times greater than the resulting clock (or some
intermediate clock?) for output stability. This may not be the case
with 594MHz and the common pixel clocks I see used by displays in my
area of the wild, but it works for now.
add Analogix DisplayPort core driver
add Rockchip (RK3399) glue for Analogix DisplayPort core
add anxdp(4)
Add another panel@fdt driver, this time for DRM-style panels.
To do: migrate away from other panel driver.
enable panel at fdt drivers
paper over the rkpwm get_conf function that otherwise doesn't seem to
let things work
add template bits for optional eDP panel on RockPro64
Abort panel driver attach if required regulator is missing.
Add clk provider
Add Pinebook Pro dts, from Manjaro Linux.
https://gitlab.manjaro.org/tsys/linux-pinebook-pro/blob/877ca0e7283596f37845de50dc36bff5b88b91e1/arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
+ rk3399-pinebook-pro.dts
Attach mmcpwrseq resource earlier
dwcmmc improvements:
- Use mmcpwrseq resources if available
- Only set 4- or 8-bit mode if specified in the dt properties
- Add quirk for implementations with inverted power enable logic
- Support switching signal voltage between 1.8V and 3.3V
- Fix a clock divider issue on Rockchip SoCs
Fix performance regression with previous
Quiet chatty printfs
No need to print all supported levels at attach, print the range and total number of steps
Disable SPI for now (rkspi driver hangs at boot)
Add driver for simple-audio-amplifier binding
Add driver for Everest Semi ES8316 Low Power Audio CODEC
add es8316, simpleamp
Avoid sleeping while the audio intr lock is held.
If the rockchip,system-power-controller property is present, try to power off with the PMIC
Add HAILUCK keyboard (product 1e)
Add a quirk for the HAILUCK USB keyboard / touchpad device with product 1e.
The keyboard does not function properly unless the touchpad's intr endpoint
is active.
Add driver for CellWise CW2015 Fuel Gauge IC.
add cwfg
Emit PMFE_DISPLAY_{ON,OFF} events in response to DPMS requests.
If the backlight node does not have an enable gpio, set the lowest duty
cycle to turn the display off instead.
Attach psci as early as possible. This allows other power controllers to
register their own poweroff / reset callbacks with a higher preference.
Add 2000 MHz to available armclkb rates
Remove debug printfs
|
| 1.10.2.1 |
| 25-Jan-2020 |
ad | Sync with head.
|
| 1.11.6.1 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
| 1.16.2.1 |
| 03-Apr-2021 |
thorpej | Sync with HEAD.
|
