dwcmmc_fdt.c revision 1.11.6.1 1 /* $NetBSD: dwcmmc_fdt.c,v 1.11.6.1 2021/04/03 22:28:44 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill (at) invisible.ca>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __KERNEL_RCSID(0, "$NetBSD: dwcmmc_fdt.c,v 1.11.6.1 2021/04/03 22:28:44 thorpej Exp $");
31
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/device.h>
35 #include <sys/intr.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/mutex.h>
39 #include <sys/condvar.h>
40 #include <sys/gpio.h>
41
42 #include <dev/ic/dwc_mmc_var.h>
43 #include <dev/sdmmc/sdmmcchip.h>
44 #include <dev/fdt/fdtvar.h>
45
46 static int dwcmmc_fdt_match(device_t, cfdata_t, void *);
47 static void dwcmmc_fdt_attach(device_t, device_t, void *);
48
49 static void dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *);
50 static void dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *);
51
52 static int dwcmmc_fdt_card_detect(struct dwc_mmc_softc *);
53 static int dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *, int);
54 static int dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *, int);
55
56 struct dwcmmc_fdt_config {
57 u_int ciu_div;
58 u_int flags;
59 uint32_t intr_cardmask;
60 };
61
62 static const struct dwcmmc_fdt_config dwcmmc_rk3288_config = {
63 .ciu_div = 2,
64 .flags = DWC_MMC_F_USE_HOLD_REG |
65 DWC_MMC_F_DMA,
66 .intr_cardmask = __BIT(24),
67 };
68
69 static const struct dwcmmc_fdt_config dwmmc_default_config = {
70 .flags = DWC_MMC_F_USE_HOLD_REG |
71 DWC_MMC_F_DMA,
72 };
73
74 static const struct device_compatible_entry compat_data[] = {
75 { .compat = "rockchip,rk3288-dw-mshc", .data = &dwcmmc_rk3288_config },
76 { .compat = "snps,dw-mshc", .data = &dwmmc_default_config },
77 DEVICE_COMPAT_EOL
78 };
79
80 struct dwcmmc_fdt_softc {
81 struct dwc_mmc_softc sc;
82 struct clk *sc_clk_biu;
83 struct clk *sc_clk_ciu;
84 struct fdtbus_gpio_pin *sc_pin_cd;
85 const struct dwcmmc_fdt_config *sc_conf;
86 u_int sc_ciu_div;
87 struct fdtbus_regulator *sc_vqmmc;
88 struct fdtbus_mmc_pwrseq *sc_pwrseq;
89 };
90
91 CFATTACH_DECL_NEW(dwcmmc_fdt, sizeof(struct dwcmmc_fdt_softc),
92 dwcmmc_fdt_match, dwcmmc_fdt_attach, NULL, NULL);
93
94 static int
95 dwcmmc_fdt_match(device_t parent, cfdata_t cf, void *aux)
96 {
97 struct fdt_attach_args * const faa = aux;
98
99 return of_compatible_match(faa->faa_phandle, compat_data);
100 }
101
102 static void
103 dwcmmc_fdt_attach(device_t parent, device_t self, void *aux)
104 {
105 struct dwcmmc_fdt_softc *esc = device_private(self);
106 struct dwc_mmc_softc *sc = &esc->sc;
107 struct fdt_attach_args * const faa = aux;
108 const int phandle = faa->faa_phandle;
109 char intrstr[128];
110 u_int fifo_depth;
111 bus_addr_t addr;
112 bus_size_t size;
113 int error;
114
115 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) {
116 aprint_error(": couldn't get registers\n");
117 return;
118 }
119
120 if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth))
121 fifo_depth = 0;
122
123 fdtbus_clock_assign(phandle);
124
125 esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu");
126 if (esc->sc_clk_biu == NULL) {
127 aprint_error(": couldn't get clock biu\n");
128 return;
129 }
130 esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu");
131 if (esc->sc_clk_ciu == NULL) {
132 aprint_error(": couldn't get clock ciu\n");
133 return;
134 }
135
136 error = clk_enable(esc->sc_clk_biu);
137 if (error) {
138 aprint_error(": couldn't enable clock biu: %d\n", error);
139 return;
140 }
141 error = clk_enable(esc->sc_clk_ciu);
142 if (error) {
143 aprint_error(": couldn't enable clock ciu: %d\n", error);
144 return;
145 }
146
147 esc->sc_vqmmc = fdtbus_regulator_acquire(phandle, "vqmmc-supply");
148 esc->sc_pwrseq = fdtbus_mmc_pwrseq_get(phandle);
149
150 sc->sc_dev = self;
151 sc->sc_bst = faa->faa_bst;
152 sc->sc_dmat = faa->faa_dmat;
153 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
154 if (error) {
155 aprint_error(": couldn't map %#" PRIx64 ": %d\n",
156 (uint64_t)addr, error);
157 return;
158 }
159 esc->sc_conf = of_compatible_lookup(phandle, compat_data)->data;
160
161 if (of_getprop_uint32(phandle, "max-frequency", &sc->sc_clock_freq) != 0)
162 sc->sc_clock_freq = UINT_MAX;
163 if (of_getprop_uint32(phandle, "bus-width", &sc->sc_bus_width) != 0)
164 sc->sc_bus_width = 4;
165
166 sc->sc_fifo_depth = fifo_depth;
167 sc->sc_intr_cardmask = esc->sc_conf->intr_cardmask;
168 sc->sc_ciu_div = esc->sc_conf->ciu_div;
169 sc->sc_flags = esc->sc_conf->flags;
170 sc->sc_pre_power_on = dwcmmc_fdt_pre_power_on;
171 sc->sc_post_power_on = dwcmmc_fdt_post_power_on;
172 sc->sc_bus_clock = dwcmmc_fdt_bus_clock;
173 sc->sc_signal_voltage = dwcmmc_fdt_signal_voltage;
174
175 esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios",
176 GPIO_PIN_INPUT);
177 if (esc->sc_pin_cd)
178 sc->sc_card_detect = dwcmmc_fdt_card_detect;
179
180 aprint_naive("\n");
181 aprint_normal(": DesignWare SD/MMC\n");
182
183 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) {
184 aprint_error_dev(self, "failed to decode interrupt\n");
185 return;
186 }
187
188 if (dwc_mmc_init(sc) != 0)
189 return;
190
191 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_BIO, 0,
192 dwc_mmc_intr, sc, device_xname(self));
193 if (sc->sc_ih == NULL) {
194 aprint_error_dev(self, "couldn't establish interrupt on %s\n",
195 intrstr);
196 return;
197 }
198 aprint_normal_dev(self, "interrupting on %s\n", intrstr);
199 }
200
201 static void
202 dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *sc)
203 {
204 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
205
206 if (esc->sc_pwrseq != NULL)
207 fdtbus_mmc_pwrseq_pre_power_on(esc->sc_pwrseq);
208 }
209
210 static void
211 dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *sc)
212 {
213 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
214
215 if (esc->sc_pwrseq != NULL)
216 fdtbus_mmc_pwrseq_post_power_on(esc->sc_pwrseq);
217 }
218
219 static int
220 dwcmmc_fdt_card_detect(struct dwc_mmc_softc *sc)
221 {
222 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
223
224 KASSERT(esc->sc_pin_cd != NULL);
225
226 return fdtbus_gpio_read(esc->sc_pin_cd);
227 }
228
229 static int
230 dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *sc, int rate)
231 {
232 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
233 const u_int ciu_div = sc->sc_ciu_div > 0 ? sc->sc_ciu_div : 1;
234 int error;
235
236 error = clk_set_rate(esc->sc_clk_ciu, 1000 * rate * ciu_div);
237 if (error != 0) {
238 aprint_error_dev(sc->sc_dev, "failed to set rate to %u kHz: %d\n",
239 rate * ciu_div, error);
240 return error;
241 }
242
243 sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu);
244
245 aprint_debug_dev(sc->sc_dev, "set clock rate to %u kHz (target %u kHz)\n",
246 sc->sc_clock_freq, rate);
247
248 return 0;
249 }
250
251 static int
252 dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *sc, int signal_voltage)
253 {
254 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev);
255 u_int uvol;
256 int error;
257
258 if (esc->sc_vqmmc == NULL)
259 return 0;
260
261 switch (signal_voltage) {
262 case SDMMC_SIGNAL_VOLTAGE_180:
263 uvol = 1800000;
264 break;
265 case SDMMC_SIGNAL_VOLTAGE_330:
266 uvol = 3300000;
267 break;
268 default:
269 return EINVAL;
270 }
271
272 error = fdtbus_regulator_supports_voltage(esc->sc_vqmmc, uvol, uvol);
273 if (error != 0)
274 return 0;
275
276 error = fdtbus_regulator_set_voltage(esc->sc_vqmmc, uvol, uvol);
277 if (error != 0)
278 return error;
279
280 return fdtbus_regulator_enable(esc->sc_vqmmc);
281 }
282