dwcmmc_fdt.c revision 1.13
1 /* $NetBSD: dwcmmc_fdt.c,v 1.13 2021/01/18 02:35:49 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: dwcmmc_fdt.c,v 1.13 2021/01/18 02:35:49 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/mutex.h> 39 #include <sys/condvar.h> 40 #include <sys/gpio.h> 41 42 #include <dev/ic/dwc_mmc_var.h> 43 #include <dev/sdmmc/sdmmcchip.h> 44 #include <dev/fdt/fdtvar.h> 45 46 static int dwcmmc_fdt_match(device_t, cfdata_t, void *); 47 static void dwcmmc_fdt_attach(device_t, device_t, void *); 48 49 static void dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *); 50 static void dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *); 51 52 static int dwcmmc_fdt_card_detect(struct dwc_mmc_softc *); 53 static int dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *, int); 54 static int dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *, int); 55 56 struct dwcmmc_fdt_config { 57 u_int ciu_div; 58 u_int flags; 59 uint32_t intr_cardmask; 60 }; 61 62 static const struct dwcmmc_fdt_config dwcmmc_rk3288_config = { 63 .ciu_div = 2, 64 .flags = DWC_MMC_F_USE_HOLD_REG | 65 DWC_MMC_F_DMA, 66 .intr_cardmask = __BIT(24), 67 }; 68 69 static const struct device_compatible_entry compat_data[] = { 70 { .compat = "rockchip,rk3288-dw-mshc", .data = &dwcmmc_rk3288_config }, 71 72 { 0 } 73 }; 74 75 struct dwcmmc_fdt_softc { 76 struct dwc_mmc_softc sc; 77 struct clk *sc_clk_biu; 78 struct clk *sc_clk_ciu; 79 struct fdtbus_gpio_pin *sc_pin_cd; 80 const struct dwcmmc_fdt_config *sc_conf; 81 u_int sc_ciu_div; 82 struct fdtbus_regulator *sc_vqmmc; 83 struct fdtbus_mmc_pwrseq *sc_pwrseq; 84 }; 85 86 CFATTACH_DECL_NEW(dwcmmc_fdt, sizeof(struct dwcmmc_fdt_softc), 87 dwcmmc_fdt_match, dwcmmc_fdt_attach, NULL, NULL); 88 89 static int 90 dwcmmc_fdt_match(device_t parent, cfdata_t cf, void *aux) 91 { 92 struct fdt_attach_args * const faa = aux; 93 94 return of_match_compat_data(faa->faa_phandle, compat_data); 95 } 96 97 static void 98 dwcmmc_fdt_attach(device_t parent, device_t self, void *aux) 99 { 100 struct dwcmmc_fdt_softc *esc = device_private(self); 101 struct dwc_mmc_softc *sc = &esc->sc; 102 struct fdt_attach_args * const faa = aux; 103 const int phandle = faa->faa_phandle; 104 char intrstr[128]; 105 u_int fifo_depth; 106 bus_addr_t addr; 107 bus_size_t size; 108 int error; 109 110 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 111 aprint_error(": couldn't get registers\n"); 112 return; 113 } 114 115 if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth)) 116 fifo_depth = 0; 117 118 fdtbus_clock_assign(phandle); 119 120 esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu"); 121 if (esc->sc_clk_biu == NULL) { 122 aprint_error(": couldn't get clock biu\n"); 123 return; 124 } 125 esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu"); 126 if (esc->sc_clk_ciu == NULL) { 127 aprint_error(": couldn't get clock ciu\n"); 128 return; 129 } 130 131 error = clk_enable(esc->sc_clk_biu); 132 if (error) { 133 aprint_error(": couldn't enable clock biu: %d\n", error); 134 return; 135 } 136 error = clk_enable(esc->sc_clk_ciu); 137 if (error) { 138 aprint_error(": couldn't enable clock ciu: %d\n", error); 139 return; 140 } 141 142 esc->sc_vqmmc = fdtbus_regulator_acquire(phandle, "vqmmc-supply"); 143 esc->sc_pwrseq = fdtbus_mmc_pwrseq_get(phandle); 144 145 sc->sc_dev = self; 146 sc->sc_bst = faa->faa_bst; 147 sc->sc_dmat = faa->faa_dmat; 148 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 149 if (error) { 150 aprint_error(": couldn't map %#" PRIx64 ": %d\n", 151 (uint64_t)addr, error); 152 return; 153 } 154 esc->sc_conf = of_search_compatible(phandle, compat_data)->data; 155 156 if (of_getprop_uint32(phandle, "max-frequency", &sc->sc_clock_freq) != 0) 157 sc->sc_clock_freq = UINT_MAX; 158 if (of_getprop_uint32(phandle, "bus-width", &sc->sc_bus_width) != 0) 159 sc->sc_bus_width = 4; 160 161 sc->sc_fifo_depth = fifo_depth; 162 sc->sc_intr_cardmask = esc->sc_conf->intr_cardmask; 163 sc->sc_ciu_div = esc->sc_conf->ciu_div; 164 sc->sc_flags = esc->sc_conf->flags; 165 sc->sc_pre_power_on = dwcmmc_fdt_pre_power_on; 166 sc->sc_post_power_on = dwcmmc_fdt_post_power_on; 167 sc->sc_bus_clock = dwcmmc_fdt_bus_clock; 168 sc->sc_signal_voltage = dwcmmc_fdt_signal_voltage; 169 170 esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios", 171 GPIO_PIN_INPUT); 172 if (esc->sc_pin_cd) 173 sc->sc_card_detect = dwcmmc_fdt_card_detect; 174 175 aprint_naive("\n"); 176 aprint_normal(": DesignWare SD/MMC\n"); 177 178 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 179 aprint_error_dev(self, "failed to decode interrupt\n"); 180 return; 181 } 182 183 if (dwc_mmc_init(sc) != 0) 184 return; 185 186 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_BIO, 0, 187 dwc_mmc_intr, sc, device_xname(self)); 188 if (sc->sc_ih == NULL) { 189 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 190 intrstr); 191 return; 192 } 193 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 194 } 195 196 static void 197 dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *sc) 198 { 199 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 200 201 if (esc->sc_pwrseq != NULL) 202 fdtbus_mmc_pwrseq_pre_power_on(esc->sc_pwrseq); 203 } 204 205 static void 206 dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *sc) 207 { 208 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 209 210 if (esc->sc_pwrseq != NULL) 211 fdtbus_mmc_pwrseq_post_power_on(esc->sc_pwrseq); 212 } 213 214 static int 215 dwcmmc_fdt_card_detect(struct dwc_mmc_softc *sc) 216 { 217 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 218 219 KASSERT(esc->sc_pin_cd != NULL); 220 221 return fdtbus_gpio_read(esc->sc_pin_cd); 222 } 223 224 static int 225 dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *sc, int rate) 226 { 227 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 228 const u_int ciu_div = sc->sc_ciu_div > 0 ? sc->sc_ciu_div : 1; 229 int error; 230 231 error = clk_set_rate(esc->sc_clk_ciu, 1000 * rate * ciu_div); 232 if (error != 0) { 233 aprint_error_dev(sc->sc_dev, "failed to set rate to %u kHz: %d\n", 234 rate * ciu_div, error); 235 return error; 236 } 237 238 sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu); 239 240 aprint_debug_dev(sc->sc_dev, "set clock rate to %u kHz (target %u kHz)\n", 241 sc->sc_clock_freq, rate); 242 243 return 0; 244 } 245 246 static int 247 dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *sc, int signal_voltage) 248 { 249 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 250 u_int uvol; 251 int error; 252 253 if (esc->sc_vqmmc == NULL) 254 return 0; 255 256 switch (signal_voltage) { 257 case SDMMC_SIGNAL_VOLTAGE_180: 258 uvol = 1800000; 259 break; 260 case SDMMC_SIGNAL_VOLTAGE_330: 261 uvol = 3300000; 262 break; 263 default: 264 return EINVAL; 265 } 266 267 error = fdtbus_regulator_supports_voltage(esc->sc_vqmmc, uvol, uvol); 268 if (error != 0) 269 return 0; 270 271 error = fdtbus_regulator_set_voltage(esc->sc_vqmmc, uvol, uvol); 272 if (error != 0) 273 return error; 274 275 return fdtbus_regulator_enable(esc->sc_vqmmc); 276 } 277
Indexes created Mon Sep 22 21:09:42 GMT 2025