dwcmmc_fdt.c revision 1.16
1 /* $NetBSD: dwcmmc_fdt.c,v 1.16 2021/01/27 03:10:21 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: dwcmmc_fdt.c,v 1.16 2021/01/27 03:10:21 thorpej Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/mutex.h> 39 #include <sys/condvar.h> 40 #include <sys/gpio.h> 41 42 #include <dev/ic/dwc_mmc_var.h> 43 #include <dev/sdmmc/sdmmcchip.h> 44 #include <dev/fdt/fdtvar.h> 45 46 static int dwcmmc_fdt_match(device_t, cfdata_t, void *); 47 static void dwcmmc_fdt_attach(device_t, device_t, void *); 48 49 static void dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *); 50 static void dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *); 51 52 static int dwcmmc_fdt_card_detect(struct dwc_mmc_softc *); 53 static int dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *, int); 54 static int dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *, int); 55 56 struct dwcmmc_fdt_config { 57 u_int ciu_div; 58 u_int flags; 59 uint32_t intr_cardmask; 60 }; 61 62 static const struct dwcmmc_fdt_config dwcmmc_rk3288_config = { 63 .ciu_div = 2, 64 .flags = DWC_MMC_F_USE_HOLD_REG | 65 DWC_MMC_F_DMA, 66 .intr_cardmask = __BIT(24), 67 }; 68 69 static const struct device_compatible_entry compat_data[] = { 70 { .compat = "rockchip,rk3288-dw-mshc", .data = &dwcmmc_rk3288_config }, 71 DEVICE_COMPAT_EOL 72 }; 73 74 struct dwcmmc_fdt_softc { 75 struct dwc_mmc_softc sc; 76 struct clk *sc_clk_biu; 77 struct clk *sc_clk_ciu; 78 struct fdtbus_gpio_pin *sc_pin_cd; 79 const struct dwcmmc_fdt_config *sc_conf; 80 u_int sc_ciu_div; 81 struct fdtbus_regulator *sc_vqmmc; 82 struct fdtbus_mmc_pwrseq *sc_pwrseq; 83 }; 84 85 CFATTACH_DECL_NEW(dwcmmc_fdt, sizeof(struct dwcmmc_fdt_softc), 86 dwcmmc_fdt_match, dwcmmc_fdt_attach, NULL, NULL); 87 88 static int 89 dwcmmc_fdt_match(device_t parent, cfdata_t cf, void *aux) 90 { 91 struct fdt_attach_args * const faa = aux; 92 93 return of_compatible_match(faa->faa_phandle, compat_data); 94 } 95 96 static void 97 dwcmmc_fdt_attach(device_t parent, device_t self, void *aux) 98 { 99 struct dwcmmc_fdt_softc *esc = device_private(self); 100 struct dwc_mmc_softc *sc = &esc->sc; 101 struct fdt_attach_args * const faa = aux; 102 const int phandle = faa->faa_phandle; 103 char intrstr[128]; 104 u_int fifo_depth; 105 bus_addr_t addr; 106 bus_size_t size; 107 int error; 108 109 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 110 aprint_error(": couldn't get registers\n"); 111 return; 112 } 113 114 if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth)) 115 fifo_depth = 0; 116 117 fdtbus_clock_assign(phandle); 118 119 esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu"); 120 if (esc->sc_clk_biu == NULL) { 121 aprint_error(": couldn't get clock biu\n"); 122 return; 123 } 124 esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu"); 125 if (esc->sc_clk_ciu == NULL) { 126 aprint_error(": couldn't get clock ciu\n"); 127 return; 128 } 129 130 error = clk_enable(esc->sc_clk_biu); 131 if (error) { 132 aprint_error(": couldn't enable clock biu: %d\n", error); 133 return; 134 } 135 error = clk_enable(esc->sc_clk_ciu); 136 if (error) { 137 aprint_error(": couldn't enable clock ciu: %d\n", error); 138 return; 139 } 140 141 esc->sc_vqmmc = fdtbus_regulator_acquire(phandle, "vqmmc-supply"); 142 esc->sc_pwrseq = fdtbus_mmc_pwrseq_get(phandle); 143 144 sc->sc_dev = self; 145 sc->sc_bst = faa->faa_bst; 146 sc->sc_dmat = faa->faa_dmat; 147 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 148 if (error) { 149 aprint_error(": couldn't map %#" PRIx64 ": %d\n", 150 (uint64_t)addr, error); 151 return; 152 } 153 esc->sc_conf = of_compatible_lookup(phandle, compat_data)->data; 154 155 if (of_getprop_uint32(phandle, "max-frequency", &sc->sc_clock_freq) != 0) 156 sc->sc_clock_freq = UINT_MAX; 157 if (of_getprop_uint32(phandle, "bus-width", &sc->sc_bus_width) != 0) 158 sc->sc_bus_width = 4; 159 160 sc->sc_fifo_depth = fifo_depth; 161 sc->sc_intr_cardmask = esc->sc_conf->intr_cardmask; 162 sc->sc_ciu_div = esc->sc_conf->ciu_div; 163 sc->sc_flags = esc->sc_conf->flags; 164 sc->sc_pre_power_on = dwcmmc_fdt_pre_power_on; 165 sc->sc_post_power_on = dwcmmc_fdt_post_power_on; 166 sc->sc_bus_clock = dwcmmc_fdt_bus_clock; 167 sc->sc_signal_voltage = dwcmmc_fdt_signal_voltage; 168 169 esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios", 170 GPIO_PIN_INPUT); 171 if (esc->sc_pin_cd) 172 sc->sc_card_detect = dwcmmc_fdt_card_detect; 173 174 aprint_naive("\n"); 175 aprint_normal(": DesignWare SD/MMC\n"); 176 177 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 178 aprint_error_dev(self, "failed to decode interrupt\n"); 179 return; 180 } 181 182 if (dwc_mmc_init(sc) != 0) 183 return; 184 185 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_BIO, 0, 186 dwc_mmc_intr, sc, device_xname(self)); 187 if (sc->sc_ih == NULL) { 188 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 189 intrstr); 190 return; 191 } 192 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 193 } 194 195 static void 196 dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *sc) 197 { 198 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 199 200 if (esc->sc_pwrseq != NULL) 201 fdtbus_mmc_pwrseq_pre_power_on(esc->sc_pwrseq); 202 } 203 204 static void 205 dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *sc) 206 { 207 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 208 209 if (esc->sc_pwrseq != NULL) 210 fdtbus_mmc_pwrseq_post_power_on(esc->sc_pwrseq); 211 } 212 213 static int 214 dwcmmc_fdt_card_detect(struct dwc_mmc_softc *sc) 215 { 216 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 217 218 KASSERT(esc->sc_pin_cd != NULL); 219 220 return fdtbus_gpio_read(esc->sc_pin_cd); 221 } 222 223 static int 224 dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *sc, int rate) 225 { 226 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 227 const u_int ciu_div = sc->sc_ciu_div > 0 ? sc->sc_ciu_div : 1; 228 int error; 229 230 error = clk_set_rate(esc->sc_clk_ciu, 1000 * rate * ciu_div); 231 if (error != 0) { 232 aprint_error_dev(sc->sc_dev, "failed to set rate to %u kHz: %d\n", 233 rate * ciu_div, error); 234 return error; 235 } 236 237 sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu); 238 239 aprint_debug_dev(sc->sc_dev, "set clock rate to %u kHz (target %u kHz)\n", 240 sc->sc_clock_freq, rate); 241 242 return 0; 243 } 244 245 static int 246 dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *sc, int signal_voltage) 247 { 248 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 249 u_int uvol; 250 int error; 251 252 if (esc->sc_vqmmc == NULL) 253 return 0; 254 255 switch (signal_voltage) { 256 case SDMMC_SIGNAL_VOLTAGE_180: 257 uvol = 1800000; 258 break; 259 case SDMMC_SIGNAL_VOLTAGE_330: 260 uvol = 3300000; 261 break; 262 default: 263 return EINVAL; 264 } 265 266 error = fdtbus_regulator_supports_voltage(esc->sc_vqmmc, uvol, uvol); 267 if (error != 0) 268 return 0; 269 270 error = fdtbus_regulator_set_voltage(esc->sc_vqmmc, uvol, uvol); 271 if (error != 0) 272 return error; 273 274 return fdtbus_regulator_enable(esc->sc_vqmmc); 275 } 276
Indexes created Tue Sep 23 14:10:03 GMT 2025