dwcmmc_fdt.c revision 1.24
1 /* $NetBSD: dwcmmc_fdt.c,v 1.24 2024/08/19 07:35:16 skrll Exp $ */ 2 3 /*- 4 * Copyright (c) 2015-2018 Jared McNeill <jmcneill (at) invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: dwcmmc_fdt.c,v 1.24 2024/08/19 07:35:16 skrll Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/mutex.h> 39 #include <sys/condvar.h> 40 #include <sys/gpio.h> 41 42 #include <dev/ic/dwc_mmc_var.h> 43 #include <dev/sdmmc/sdmmcchip.h> 44 #include <dev/fdt/fdtvar.h> 45 46 static int dwcmmc_fdt_match(device_t, cfdata_t, void *); 47 static void dwcmmc_fdt_attach(device_t, device_t, void *); 48 49 static void dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *); 50 static void dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *); 51 52 static int dwcmmc_fdt_card_detect(struct dwc_mmc_softc *); 53 static int dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *, int); 54 static int dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *, int); 55 56 struct dwcmmc_fdt_config { 57 u_int ciu_div; 58 u_int flags; 59 uint32_t intr_cardmask; 60 }; 61 62 static const struct dwcmmc_fdt_config dwcmmc_rk3288_config = { 63 .ciu_div = 2, 64 .flags = DWC_MMC_F_USE_HOLD_REG | 65 DWC_MMC_F_DMA, 66 .intr_cardmask = __BIT(24), 67 }; 68 69 static const struct dwcmmc_fdt_config dwmmc_default_config = { 70 .flags = DWC_MMC_F_USE_HOLD_REG | 71 DWC_MMC_F_DMA, 72 }; 73 74 static const struct device_compatible_entry compat_data[] = { 75 { .compat = "rockchip,rk3288-dw-mshc", .data = &dwcmmc_rk3288_config }, 76 { .compat = "snps,dw-mshc", .data = &dwmmc_default_config }, 77 { .compat = "starfive,jh7110-mmc", .data = &dwmmc_default_config }, 78 DEVICE_COMPAT_EOL 79 }; 80 81 struct dwcmmc_fdt_softc { 82 struct dwc_mmc_softc sc; 83 struct clk *sc_clk_biu; 84 struct clk *sc_clk_ciu; 85 struct fdtbus_gpio_pin *sc_pin_cd; 86 const struct dwcmmc_fdt_config *sc_conf; 87 u_int sc_ciu_div; 88 struct fdtbus_regulator *sc_vqmmc; 89 struct fdtbus_mmc_pwrseq *sc_pwrseq; 90 }; 91 92 CFATTACH_DECL_NEW(dwcmmc_fdt, sizeof(struct dwcmmc_fdt_softc), 93 dwcmmc_fdt_match, dwcmmc_fdt_attach, NULL, NULL); 94 95 static int 96 dwcmmc_fdt_match(device_t parent, cfdata_t cf, void *aux) 97 { 98 struct fdt_attach_args * const faa = aux; 99 100 return of_compatible_match(faa->faa_phandle, compat_data); 101 } 102 103 static void 104 dwcmmc_fdt_attach(device_t parent, device_t self, void *aux) 105 { 106 struct dwcmmc_fdt_softc *esc = device_private(self); 107 struct dwc_mmc_softc *sc = &esc->sc; 108 struct fdt_attach_args * const faa = aux; 109 const int phandle = faa->faa_phandle; 110 char intrstr[128]; 111 u_int fifo_depth; 112 bus_addr_t addr; 113 bus_size_t size; 114 int error; 115 116 if (fdtbus_get_reg(phandle, 0, &addr, &size) != 0) { 117 aprint_error(": couldn't get registers\n"); 118 return; 119 } 120 121 if (of_getprop_uint32(phandle, "fifo-depth", &fifo_depth)) 122 fifo_depth = 0; 123 124 fdtbus_clock_assign(phandle); 125 126 esc->sc_clk_biu = fdtbus_clock_get(phandle, "biu"); 127 if (esc->sc_clk_biu == NULL) { 128 aprint_error(": couldn't get clock biu\n"); 129 return; 130 } 131 esc->sc_clk_ciu = fdtbus_clock_get(phandle, "ciu"); 132 if (esc->sc_clk_ciu == NULL) { 133 aprint_error(": couldn't get clock ciu\n"); 134 return; 135 } 136 137 error = clk_enable(esc->sc_clk_biu); 138 if (error) { 139 aprint_error(": couldn't enable clock biu: %d\n", error); 140 return; 141 } 142 error = clk_enable(esc->sc_clk_ciu); 143 if (error) { 144 aprint_error(": couldn't enable clock ciu: %d\n", error); 145 return; 146 } 147 148 esc->sc_vqmmc = fdtbus_regulator_acquire(phandle, "vqmmc-supply"); 149 esc->sc_pwrseq = fdtbus_mmc_pwrseq_get(phandle); 150 151 sc->sc_dev = self; 152 sc->sc_bst = faa->faa_bst; 153 sc->sc_dmat = faa->faa_dmat; 154 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 155 if (error) { 156 aprint_error(": couldn't map %#" PRIx64 ": %d\n", 157 (uint64_t)addr, error); 158 return; 159 } 160 esc->sc_conf = of_compatible_lookup(phandle, compat_data)->data; 161 162 if (of_getprop_uint32(phandle, "max-frequency", &sc->sc_clock_freq) != 0) 163 sc->sc_clock_freq = UINT_MAX; 164 if (of_getprop_uint32(phandle, "bus-width", &sc->sc_bus_width) != 0) 165 sc->sc_bus_width = 4; 166 167 sc->sc_fifo_depth = fifo_depth; 168 sc->sc_intr_cardmask = esc->sc_conf->intr_cardmask; 169 sc->sc_ciu_div = esc->sc_conf->ciu_div; 170 sc->sc_flags = esc->sc_conf->flags; 171 if (of_getprop_bool(phandle, "non-removable")) { 172 sc->sc_flags |= DWC_MMC_F_NON_REMOVABLE; 173 } 174 if (of_getprop_bool(phandle, "broken-cd")) { 175 sc->sc_flags |= DWC_MMC_F_BROKEN_CD; 176 } 177 sc->sc_pre_power_on = dwcmmc_fdt_pre_power_on; 178 sc->sc_post_power_on = dwcmmc_fdt_post_power_on; 179 sc->sc_bus_clock = dwcmmc_fdt_bus_clock; 180 sc->sc_signal_voltage = dwcmmc_fdt_signal_voltage; 181 182 esc->sc_pin_cd = fdtbus_gpio_acquire(phandle, "cd-gpios", 183 GPIO_PIN_INPUT); 184 if (esc->sc_pin_cd) 185 sc->sc_card_detect = dwcmmc_fdt_card_detect; 186 187 aprint_naive("\n"); 188 aprint_normal(": DesignWare SD/MMC\n"); 189 190 if (!fdtbus_intr_str(phandle, 0, intrstr, sizeof(intrstr))) { 191 aprint_error_dev(self, "failed to decode interrupt\n"); 192 return; 193 } 194 195 if (dwc_mmc_init(sc) != 0) 196 return; 197 198 sc->sc_ih = fdtbus_intr_establish_xname(phandle, 0, IPL_BIO, 0, 199 dwc_mmc_intr, sc, device_xname(self)); 200 if (sc->sc_ih == NULL) { 201 aprint_error_dev(self, "couldn't establish interrupt on %s\n", 202 intrstr); 203 return; 204 } 205 aprint_normal_dev(self, "interrupting on %s\n", intrstr); 206 } 207 208 static void 209 dwcmmc_fdt_pre_power_on(struct dwc_mmc_softc *sc) 210 { 211 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 212 213 if (esc->sc_pwrseq != NULL) 214 fdtbus_mmc_pwrseq_pre_power_on(esc->sc_pwrseq); 215 } 216 217 static void 218 dwcmmc_fdt_post_power_on(struct dwc_mmc_softc *sc) 219 { 220 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 221 222 if (esc->sc_pwrseq != NULL) 223 fdtbus_mmc_pwrseq_post_power_on(esc->sc_pwrseq); 224 } 225 226 static int 227 dwcmmc_fdt_card_detect(struct dwc_mmc_softc *sc) 228 { 229 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 230 231 KASSERT(esc->sc_pin_cd != NULL); 232 233 return fdtbus_gpio_read(esc->sc_pin_cd); 234 } 235 236 static int 237 dwcmmc_fdt_bus_clock(struct dwc_mmc_softc *sc, int rate) 238 { 239 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 240 const u_int ciu_div = sc->sc_ciu_div > 0 ? sc->sc_ciu_div : 1; 241 int error; 242 243 error = clk_set_rate(esc->sc_clk_ciu, 1000 * rate * ciu_div); 244 if (error != 0) { 245 aprint_error_dev(sc->sc_dev, "failed to set rate to %u kHz: %d\n", 246 rate * ciu_div, error); 247 return error; 248 } 249 250 sc->sc_clock_freq = clk_get_rate(esc->sc_clk_ciu); 251 252 aprint_debug_dev(sc->sc_dev, "set clock rate to %u kHz (target %u kHz)\n", 253 sc->sc_clock_freq / 1000, rate); 254 255 return 0; 256 } 257 258 static int 259 dwcmmc_fdt_signal_voltage(struct dwc_mmc_softc *sc, int signal_voltage) 260 { 261 struct dwcmmc_fdt_softc *esc = device_private(sc->sc_dev); 262 u_int uvol; 263 int error; 264 265 if (esc->sc_vqmmc == NULL) 266 return 0; 267 268 switch (signal_voltage) { 269 case SDMMC_SIGNAL_VOLTAGE_180: 270 uvol = 1800000; 271 break; 272 case SDMMC_SIGNAL_VOLTAGE_330: 273 uvol = 3300000; 274 break; 275 default: 276 return EINVAL; 277 } 278 279 error = fdtbus_regulator_supports_voltage(esc->sc_vqmmc, uvol, uvol); 280 if (error != 0) 281 return 0; 282 283 error = fdtbus_regulator_set_voltage(esc->sc_vqmmc, uvol, uvol); 284 if (error != 0) 285 return error; 286 287 return fdtbus_regulator_enable(esc->sc_vqmmc); 288 } 289
Indexes created Tue Sep 23 02:09:52 GMT 2025