pl061gpio_fdt.c revision 1.1 1 1.1 jakllsch /* $NetBSD: pl061gpio_fdt.c,v 1.1 2018/06/15 19:52:01 jakllsch Exp $ */
2 1.1 jakllsch
3 1.1 jakllsch /*
4 1.1 jakllsch * Copyright (c) 2018 Jonathan A. Kollasch
5 1.1 jakllsch * All rights reserved.
6 1.1 jakllsch *
7 1.1 jakllsch * Redistribution and use in source and binary forms, with or without
8 1.1 jakllsch * modification, are permitted provided that the following conditions
9 1.1 jakllsch * are met:
10 1.1 jakllsch * 1. Redistributions of source code must retain the above copyright
11 1.1 jakllsch * notice, this list of conditions and the following disclaimer.
12 1.1 jakllsch * 2. Redistributions in binary form must reproduce the above copyright
13 1.1 jakllsch * notice, this list of conditions and the following disclaimer in the
14 1.1 jakllsch * documentation and/or other materials provided with the distribution.
15 1.1 jakllsch *
16 1.1 jakllsch * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 1.1 jakllsch * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18 1.1 jakllsch * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19 1.1 jakllsch * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
20 1.1 jakllsch * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
21 1.1 jakllsch * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
22 1.1 jakllsch * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
23 1.1 jakllsch * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
24 1.1 jakllsch * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
25 1.1 jakllsch * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
26 1.1 jakllsch * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 1.1 jakllsch */
28 1.1 jakllsch
29 1.1 jakllsch #include <sys/cdefs.h>
30 1.1 jakllsch __KERNEL_RCSID(0, "$NetBSD: pl061gpio_fdt.c,v 1.1 2018/06/15 19:52:01 jakllsch Exp $");
31 1.1 jakllsch
32 1.1 jakllsch #include <sys/param.h>
33 1.1 jakllsch #include <sys/bus.h>
34 1.1 jakllsch #include <sys/device.h>
35 1.1 jakllsch #include <sys/intr.h>
36 1.1 jakllsch #include <sys/systm.h>
37 1.1 jakllsch #include <sys/kernel.h>
38 1.1 jakllsch #include <sys/kmem.h>
39 1.1 jakllsch #include <sys/gpio.h>
40 1.1 jakllsch
41 1.1 jakllsch #include <dev/gpio/gpiovar.h>
42 1.1 jakllsch #include "gpio.h"
43 1.1 jakllsch
44 1.1 jakllsch #include <dev/ic/pl061reg.h>
45 1.1 jakllsch
46 1.1 jakllsch #include <dev/fdt/fdtvar.h>
47 1.1 jakllsch
48 1.1 jakllsch static int pl061_gpio_match(device_t, cfdata_t, void *);
49 1.1 jakllsch static void pl061_gpio_attach(device_t, device_t, void *);
50 1.1 jakllsch
51 1.1 jakllsch static void * pl061_gpio_fdt_acquire(device_t, const void *,
52 1.1 jakllsch size_t, int);
53 1.1 jakllsch static void pl061_gpio_fdt_release(device_t, void *);
54 1.1 jakllsch static int pl061_gpio_fdt_read(device_t, void *, bool);
55 1.1 jakllsch static void pl061_gpio_fdt_write(device_t, void *, int, bool);
56 1.1 jakllsch
57 1.1 jakllsch struct fdtbus_gpio_controller_func pl061_gpio_funcs = {
58 1.1 jakllsch .acquire = pl061_gpio_fdt_acquire,
59 1.1 jakllsch .release = pl061_gpio_fdt_release,
60 1.1 jakllsch .read = pl061_gpio_fdt_read,
61 1.1 jakllsch .write = pl061_gpio_fdt_write
62 1.1 jakllsch };
63 1.1 jakllsch
64 1.1 jakllsch struct pl061_gpio_softc {
65 1.1 jakllsch device_t sc_dev;
66 1.1 jakllsch bus_space_tag_t sc_bst;
67 1.1 jakllsch bus_space_handle_t sc_bsh;
68 1.1 jakllsch
69 1.1 jakllsch struct gpio_chipset_tag sc_gc;
70 1.1 jakllsch gpio_pin_t sc_pins[8];
71 1.1 jakllsch };
72 1.1 jakllsch
73 1.1 jakllsch struct pl061_gpio_pin {
74 1.1 jakllsch struct pl061_gpio_softc *pin_sc;
75 1.1 jakllsch int pin_no;
76 1.1 jakllsch u_int pin_flags;
77 1.1 jakllsch bool pin_actlo;
78 1.1 jakllsch };
79 1.1 jakllsch
80 1.1 jakllsch static int pl061_gpio_pin_read(void *, int);
81 1.1 jakllsch static void pl061_gpio_pin_write(void *, int, int);
82 1.1 jakllsch static void pl061_gpio_pin_ctl(void *, int, int);
83 1.1 jakllsch
84 1.1 jakllsch CFATTACH_DECL_NEW(pl061gpio_fdt, sizeof(struct pl061_gpio_softc),
85 1.1 jakllsch pl061_gpio_match, pl061_gpio_attach, NULL, NULL);
86 1.1 jakllsch
87 1.1 jakllsch #define PL061_WRITE(sc, reg, val) \
88 1.1 jakllsch bus_space_write_1((sc)->sc_bst, (sc)->sc_bsh, (reg)/4, (val))
89 1.1 jakllsch #define PL061_READ(sc, reg) \
90 1.1 jakllsch bus_space_read_1((sc)->sc_bst, (sc)->sc_bsh, (reg)/4)
91 1.1 jakllsch
92 1.1 jakllsch static int
93 1.1 jakllsch pl061_gpio_match(device_t parent, cfdata_t cf, void *aux)
94 1.1 jakllsch {
95 1.1 jakllsch const char * const compatible[] = {
96 1.1 jakllsch "arm,pl061",
97 1.1 jakllsch NULL
98 1.1 jakllsch };
99 1.1 jakllsch struct fdt_attach_args * const faa = aux;
100 1.1 jakllsch
101 1.1 jakllsch return of_match_compatible(faa->faa_phandle, compatible);
102 1.1 jakllsch }
103 1.1 jakllsch
104 1.1 jakllsch static void
105 1.1 jakllsch pl061_gpio_attach(device_t parent, device_t self, void *aux)
106 1.1 jakllsch {
107 1.1 jakllsch struct pl061_gpio_softc * const sc = device_private(self);
108 1.1 jakllsch struct fdt_attach_args * const faa = aux;
109 1.1 jakllsch bus_addr_t addr;
110 1.1 jakllsch bus_size_t size;
111 1.1 jakllsch int error;
112 1.1 jakllsch struct gpiobus_attach_args gba;
113 1.1 jakllsch u_int pin;
114 1.1 jakllsch
115 1.1 jakllsch
116 1.1 jakllsch if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) {
117 1.1 jakllsch aprint_error(": couldn't get registers\n");
118 1.1 jakllsch return;
119 1.1 jakllsch }
120 1.1 jakllsch
121 1.1 jakllsch sc->sc_dev = self;
122 1.1 jakllsch sc->sc_bst = faa->faa_a4x_bst;
123 1.1 jakllsch error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh);
124 1.1 jakllsch if (error) {
125 1.1 jakllsch aprint_error(": couldn't map %#llx: %d", (uint64_t)addr, error);
126 1.1 jakllsch return;
127 1.1 jakllsch }
128 1.1 jakllsch
129 1.1 jakllsch aprint_naive("\n");
130 1.1 jakllsch aprint_normal(": GPIO\n");
131 1.1 jakllsch
132 1.1 jakllsch sc->sc_gc.gp_cookie = sc;
133 1.1 jakllsch sc->sc_gc.gp_pin_read = pl061_gpio_pin_read;
134 1.1 jakllsch sc->sc_gc.gp_pin_write = pl061_gpio_pin_write;
135 1.1 jakllsch sc->sc_gc.gp_pin_ctl = pl061_gpio_pin_ctl;
136 1.1 jakllsch
137 1.1 jakllsch const uint32_t cnf = PL061_READ(sc, PL061_GPIOAFSEL_REG);
138 1.1 jakllsch
139 1.1 jakllsch for (pin = 0; pin < 8; pin++) {
140 1.1 jakllsch sc->sc_pins[pin].pin_num = pin;
141 1.1 jakllsch /* skip pins in hardware control mode */
142 1.1 jakllsch if ((cnf & __BIT(pin)) != 0)
143 1.1 jakllsch continue;
144 1.1 jakllsch sc->sc_pins[pin].pin_caps =
145 1.1 jakllsch GPIO_PIN_INPUT | GPIO_PIN_OUTPUT |
146 1.1 jakllsch GPIO_PIN_TRISTATE;
147 1.1 jakllsch sc->sc_pins[pin].pin_state =
148 1.1 jakllsch pl061_gpio_pin_read(sc, pin);
149 1.1 jakllsch }
150 1.1 jakllsch
151 1.1 jakllsch memset(&gba, 0, sizeof(gba));
152 1.1 jakllsch gba.gba_gc = &sc->sc_gc;
153 1.1 jakllsch gba.gba_pins = sc->sc_pins;
154 1.1 jakllsch gba.gba_npins = 8;
155 1.1 jakllsch
156 1.1 jakllsch #if NGPIO > 0
157 1.1 jakllsch (void)config_found_ia(sc->sc_dev, "gpiobus", &gba,
158 1.1 jakllsch gpiobus_print);
159 1.1 jakllsch #endif
160 1.1 jakllsch
161 1.1 jakllsch fdtbus_register_gpio_controller(self, faa->faa_phandle,
162 1.1 jakllsch &pl061_gpio_funcs);
163 1.1 jakllsch
164 1.1 jakllsch }
165 1.1 jakllsch
166 1.1 jakllsch static int
167 1.1 jakllsch pl061_gpio_pin_read(void *priv, int pin)
168 1.1 jakllsch {
169 1.1 jakllsch struct pl061_gpio_softc * const sc = priv;
170 1.1 jakllsch
171 1.1 jakllsch const uint32_t v = PL061_READ(sc, PL061_GPIODATA_REG(1<<pin));
172 1.1 jakllsch
173 1.1 jakllsch return (v >> pin) & 1;
174 1.1 jakllsch }
175 1.1 jakllsch
176 1.1 jakllsch static void
177 1.1 jakllsch pl061_gpio_pin_write(void *priv, int pin, int val)
178 1.1 jakllsch {
179 1.1 jakllsch struct pl061_gpio_softc * const sc = priv;
180 1.1 jakllsch
181 1.1 jakllsch PL061_WRITE(sc, PL061_GPIODATA_REG(1 << pin), val << pin);
182 1.1 jakllsch }
183 1.1 jakllsch
184 1.1 jakllsch static void
185 1.1 jakllsch pl061_gpio_pin_ctl(void *priv, int pin, int flags)
186 1.1 jakllsch {
187 1.1 jakllsch struct pl061_gpio_softc * const sc = priv;
188 1.1 jakllsch uint32_t v;
189 1.1 jakllsch
190 1.1 jakllsch if (flags & GPIO_PIN_INPUT) {
191 1.1 jakllsch v = PL061_READ(sc, PL061_GPIODIR_REG);
192 1.1 jakllsch v &= ~(1 << pin);
193 1.1 jakllsch PL061_WRITE(sc, PL061_GPIODIR_REG, v);
194 1.1 jakllsch } else if (flags & GPIO_PIN_OUTPUT) {
195 1.1 jakllsch v = PL061_READ(sc, PL061_GPIODIR_REG);
196 1.1 jakllsch v |= (1 << pin);
197 1.1 jakllsch PL061_WRITE(sc, PL061_GPIODIR_REG, v);
198 1.1 jakllsch }
199 1.1 jakllsch }
200 1.1 jakllsch
201 1.1 jakllsch static void *
202 1.1 jakllsch pl061_gpio_fdt_acquire(device_t dev, const void *data, size_t len, int flags)
203 1.1 jakllsch {
204 1.1 jakllsch struct pl061_gpio_softc * const sc = device_private(dev);
205 1.1 jakllsch struct pl061_gpio_pin *gpin;
206 1.1 jakllsch const u_int *gpio = data;
207 1.1 jakllsch
208 1.1 jakllsch if (len != 12)
209 1.1 jakllsch return NULL;
210 1.1 jakllsch
211 1.1 jakllsch const u_int pin = be32toh(gpio[1]);
212 1.1 jakllsch const bool actlo = be32toh(gpio[2]) & 1;
213 1.1 jakllsch
214 1.1 jakllsch if (pin > 8)
215 1.1 jakllsch return NULL;
216 1.1 jakllsch
217 1.1 jakllsch const uint32_t cnf = PL061_READ(sc, PL061_GPIOAFSEL_REG);
218 1.1 jakllsch if ((cnf & __BIT(pin)) != 0)
219 1.1 jakllsch PL061_WRITE(sc, PL061_GPIOAFSEL_REG, cnf & ~__BIT(pin));
220 1.1 jakllsch
221 1.1 jakllsch gpin = kmem_zalloc(sizeof(*gpin), KM_SLEEP);
222 1.1 jakllsch gpin->pin_sc = sc;
223 1.1 jakllsch gpin->pin_no = pin;
224 1.1 jakllsch gpin->pin_flags = flags;
225 1.1 jakllsch gpin->pin_actlo = actlo;
226 1.1 jakllsch
227 1.1 jakllsch pl061_gpio_pin_ctl(gpin->pin_sc, gpin->pin_no, gpin->pin_flags);
228 1.1 jakllsch
229 1.1 jakllsch return gpin;
230 1.1 jakllsch }
231 1.1 jakllsch
232 1.1 jakllsch static void
233 1.1 jakllsch pl061_gpio_fdt_release(device_t dev, void *priv)
234 1.1 jakllsch {
235 1.1 jakllsch struct pl061_gpio_pin * const gpin = priv;
236 1.1 jakllsch
237 1.1 jakllsch pl061_gpio_pin_ctl(gpin->pin_sc, gpin->pin_no, GPIO_PIN_INPUT);
238 1.1 jakllsch kmem_free(gpin, sizeof(*gpin));
239 1.1 jakllsch }
240 1.1 jakllsch
241 1.1 jakllsch static int
242 1.1 jakllsch pl061_gpio_fdt_read(device_t dev, void *priv, bool raw)
243 1.1 jakllsch {
244 1.1 jakllsch struct pl061_gpio_pin * const gpin = priv;
245 1.1 jakllsch int val;
246 1.1 jakllsch
247 1.1 jakllsch val = pl061_gpio_pin_read(gpin->pin_sc, gpin->pin_no);
248 1.1 jakllsch
249 1.1 jakllsch if (!raw && gpin->pin_actlo)
250 1.1 jakllsch val = !val;
251 1.1 jakllsch
252 1.1 jakllsch return val;
253 1.1 jakllsch }
254 1.1 jakllsch
255 1.1 jakllsch static void
256 1.1 jakllsch pl061_gpio_fdt_write(device_t dev, void *priv, int val, bool raw)
257 1.1 jakllsch {
258 1.1 jakllsch struct pl061_gpio_pin * const gpin = priv;
259 1.1 jakllsch
260 1.1 jakllsch if (!raw && gpin->pin_actlo)
261 1.1 jakllsch val = !val;
262 1.1 jakllsch
263 1.1 jakllsch pl061_gpio_pin_write(gpin->pin_sc, gpin->pin_no, val);
264 1.1 jakllsch }
265