pl061gpio_fdt.c revision 1.1.2.4
1 /* $NetBSD: pl061gpio_fdt.c,v 1.1.2.4 2018/10/20 06:58:31 pgoyette Exp $ */ 2 3 /* 4 * Copyright (c) 2018 Jonathan A. Kollasch 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 18 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 19 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 20 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 21 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 22 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 23 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 25 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 26 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __KERNEL_RCSID(0, "$NetBSD: pl061gpio_fdt.c,v 1.1.2.4 2018/10/20 06:58:31 pgoyette Exp $"); 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/device.h> 35 #include <sys/intr.h> 36 #include <sys/systm.h> 37 #include <sys/kernel.h> 38 #include <sys/kmem.h> 39 #include <sys/gpio.h> 40 41 #include <dev/gpio/gpiovar.h> 42 43 #include <dev/ic/pl061reg.h> 44 #include <dev/ic/pl061var.h> 45 46 #include <dev/fdt/fdtvar.h> 47 48 static int plgpio_fdt_match(device_t, cfdata_t, void *); 49 static void plgpio_fdt_attach(device_t, device_t, void *); 50 51 static void * plgpio_fdt_acquire(device_t, const void *, 52 size_t, int); 53 static void plgpio_fdt_release(device_t, void *); 54 static int plgpio_fdt_read(device_t, void *, bool); 55 static void plgpio_fdt_write(device_t, void *, int, bool); 56 57 struct fdtbus_gpio_controller_func plgpio_fdt_funcs = { 58 .acquire = plgpio_fdt_acquire, 59 .release = plgpio_fdt_release, 60 .read = plgpio_fdt_read, 61 .write = plgpio_fdt_write 62 }; 63 64 struct plgpio_fdt_pin { 65 struct plgpio_softc * pin_sc; 66 int pin_no; 67 u_int pin_flags; 68 bool pin_actlo; 69 }; 70 71 CFATTACH_DECL_NEW(plgpio_fdt, sizeof(struct plgpio_softc), 72 plgpio_fdt_match, plgpio_fdt_attach, NULL, NULL); 73 74 static int 75 plgpio_fdt_match(device_t parent, cfdata_t cf, void *aux) 76 { 77 const char * const compatible[] = { 78 "arm,pl061", 79 NULL 80 }; 81 struct fdt_attach_args * const faa = aux; 82 83 return of_match_compatible(faa->faa_phandle, compatible); 84 } 85 86 static void 87 plgpio_fdt_attach(device_t parent, device_t self, void *aux) 88 { 89 struct plgpio_softc * const sc = device_private(self); 90 struct fdt_attach_args * const faa = aux; 91 bus_addr_t addr; 92 bus_size_t size; 93 int error; 94 95 if (fdtbus_get_reg(faa->faa_phandle, 0, &addr, &size) != 0) { 96 aprint_error(": couldn't get registers\n"); 97 return; 98 } 99 100 sc->sc_dev = self; 101 sc->sc_bst = faa->faa_bst; 102 error = bus_space_map(sc->sc_bst, addr, size, 0, &sc->sc_bsh); 103 if (error) { 104 aprint_error(": couldn't map %#"PRIx64": %d", (uint64_t)addr, error); 105 return; 106 } 107 108 aprint_naive("\n"); 109 aprint_normal(": GPIO\n"); 110 111 plgpio_attach(sc); 112 113 fdtbus_register_gpio_controller(self, faa->faa_phandle, 114 &plgpio_fdt_funcs); 115 } 116 117 static void * 118 plgpio_fdt_acquire(device_t dev, const void *data, size_t len, int flags) 119 { 120 struct plgpio_softc * const sc = device_private(dev); 121 struct plgpio_fdt_pin *gpin; 122 const u_int *gpio = data; 123 124 if (len != 12) 125 return NULL; 126 127 const u_int pin = be32toh(gpio[1]); 128 const bool actlo = be32toh(gpio[2]) & 1; 129 130 if (pin > 8) 131 return NULL; 132 133 const uint32_t cnf = PLGPIO_READ(sc, PL061_GPIOAFSEL_REG); 134 if ((cnf & __BIT(pin)) != 0) 135 PLGPIO_WRITE(sc, PL061_GPIOAFSEL_REG, cnf & ~__BIT(pin)); 136 137 gpin = kmem_zalloc(sizeof(*gpin), KM_SLEEP); 138 gpin->pin_sc = sc; 139 gpin->pin_no = pin; 140 gpin->pin_flags = flags; 141 gpin->pin_actlo = actlo; 142 143 plgpio_pin_ctl(gpin->pin_sc, gpin->pin_no, gpin->pin_flags); 144 145 return gpin; 146 } 147 148 static void 149 plgpio_fdt_release(device_t dev, void *priv) 150 { 151 struct plgpio_fdt_pin * const gpin = priv; 152 153 plgpio_pin_ctl(gpin->pin_sc, gpin->pin_no, GPIO_PIN_INPUT); 154 kmem_free(gpin, sizeof(*gpin)); 155 } 156 157 static int 158 plgpio_fdt_read(device_t dev, void *priv, bool raw) 159 { 160 struct plgpio_fdt_pin * const gpin = priv; 161 int val; 162 163 val = plgpio_pin_read(gpin->pin_sc, gpin->pin_no); 164 165 if (!raw && gpin->pin_actlo) 166 val = !val; 167 168 return val; 169 } 170 171 static void 172 plgpio_fdt_write(device_t dev, void *priv, int val, bool raw) 173 { 174 struct plgpio_fdt_pin * const gpin = priv; 175 176 if (!raw && gpin->pin_actlo) 177 val = !val; 178 179 plgpio_pin_write(gpin->pin_sc, gpin->pin_no, val); 180 } 181
Indexes created Tue Sep 30 11:09:46 GMT 2025