pcai2cmux.c revision 1.1 1 /* $NetBSD: pcai2cmux.c,v 1.1 2020/12/29 01:47:51 thorpej Exp $ */
2
3 /*-
4 * Copyright (c) 2020 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Jason R. Thorpe.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 *
19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 * POSSIBILITY OF SUCH DAMAGE.
30 */
31
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: pcai2cmux.c,v 1.1 2020/12/29 01:47:51 thorpej Exp $");
34
35 /*
36 * Driver for NXP PCA954x / PCA984x I2C switches and multiplexers.
37 *
38 * There are two flavors of this device:
39 *
40 * - Multiplexers, which connect the upstream bus to one downstream bus
41 * at a time.
42 *
43 * - Switches, which can connect the upstream bus to one or more downstream
44 * busses at a time (which is useful when using an all-call address for
45 * a large array of PCA9685 LED controllers, for example).
46 *
47 * Alas, the device tree bindings don't have anything specifically for
48 * switches, so we treat the switch variants as basic multiplexers,
49 * only enabling one downstream bus at a time.
50 *
51 * Note that some versions of these chips also have interrupt mux
52 * capability. XXX We do not support this yet.
53 */
54
55 #include <sys/param.h>
56 #include <sys/systm.h>
57 #include <sys/device.h>
58
59 #include <dev/fdt/fdtvar.h>
60 #include <dev/i2c/i2cmuxvar.h>
61
62 /* There are a maximum of 8 busses supported. */
63 #define PCAIICMUX_MAX_BUSSES 8
64
65 struct pcaiicmux_type {
66 unsigned int nchannels; /* # of downstream channels */
67 uint8_t enable_bit; /* if 0, chip is switch type */
68 };
69
70 static const struct pcaiicmux_type mux2_type = {
71 .nchannels = 2,
72 .enable_bit = __BIT(2),
73 };
74
75 static const struct pcaiicmux_type switch2_type = {
76 .nchannels = 2,
77 .enable_bit = 0,
78 };
79
80 static const struct pcaiicmux_type mux4_type = {
81 .nchannels = 4,
82 .enable_bit = __BIT(2),
83 };
84
85 static const struct pcaiicmux_type switch4_type = {
86 .nchannels = 4,
87 .enable_bit = 0,
88 };
89
90 static const struct pcaiicmux_type mux8_type = {
91 .nchannels = 8,
92 .enable_bit = __BIT(3),
93 };
94
95 static const struct pcaiicmux_type switch8_type = {
96 .nchannels = 8,
97 .enable_bit = 0,
98 };
99
100 static const struct device_compatible_entry compat_data[] = {
101 /* PCA9540 - 2 channel i2c mux */
102 { .compat = "nxp,pca9540",
103 .data = (uintptr_t)&mux2_type },
104
105 /* PCA9542 - 2 channel i2c mux with interrupts */
106 { .compat = "nxp,pca9542",
107 .data = (uintptr_t)&mux2_type },
108
109 /* PCA9543 - 2 channel i2c switch with interrupts */
110 { .compat = "nxp,pca9543",
111 .data = (uintptr_t)&switch2_type },
112
113 /* PCA9544 - 4 channel i2c mux with interrupts */
114 { .compat = "nxp,pca9544",
115 .data = (uintptr_t)&mux4_type },
116
117 /* PCA9545 - 4 channel i2c switch with interrupts */
118 { .compat = "nxp,pca9545",
119 .data = (uintptr_t)&switch4_type },
120
121 /* PCA9546 - 4 channel i2c switch */
122 { .compat = "nxp,pca9546",
123 .data = (uintptr_t)&switch4_type },
124
125 /* PCA9547 - 8 channel i2c mux */
126 { .compat = "nxp,pca9547",
127 .data = (uintptr_t)&mux8_type },
128
129 /* PCA9548 - 8 channel i2c switch */
130 { .compat = "nxp,pca9548",
131 .data = (uintptr_t)&switch8_type },
132
133 /* PCA9846 - 4 channel i2c switch */
134 { .compat = "nxp,pca9846",
135 .data = (uintptr_t)&switch4_type },
136
137 /* PCA9847 - 8 channel i2c mux */
138 { .compat = "nxp,pca9847",
139 .data = (uintptr_t)&mux8_type },
140
141 /* PCA9848 - 8 channel i2c switch */
142 { .compat = "nxp,pca9848",
143 .data = (uintptr_t)&switch8_type },
144
145 /* PCA9849 - 4 channel i2c mux */
146 { .compat = "nxp,pca9849",
147 .data = (uintptr_t)&mux4_type },
148
149 { NULL }
150 };
151
152 struct pcaiicmux_softc {
153 struct iicmux_softc sc_iicmux;
154
155 i2c_addr_t sc_addr;
156 int sc_cur_value;
157
158 const struct pcaiicmux_type *sc_type;
159 struct fdtbus_gpio_pin *sc_reset_gpio;
160
161 bool sc_idle_disconnect;
162
163 struct pcaiicmux_bus_info {
164 uint8_t enable_value;
165 } sc_bus_info[PCAIICMUX_MAX_BUSSES];
166 };
167
168 static int
169 pcaiicmux_write(struct pcaiicmux_softc * const sc, uint8_t const val,
170 int const flags)
171 {
172 if ((int)val == sc->sc_cur_value) {
173 return 0;
174 }
175 sc->sc_cur_value = (int)val;
176
177 int const error =
178 iic_smbus_send_byte(sc->sc_iicmux.sc_i2c_parent, sc->sc_addr, val,
179 flags & ~I2C_F_SPEED);
180 if (error) {
181 sc->sc_cur_value = -1;
182 }
183
184 return error;
185 }
186
187 /*****************************************************************************/
188
189 static void *
190 pcaiicmux_get_mux_info(struct iicmux_softc * const iicmux)
191 {
192 return container_of(iicmux, struct pcaiicmux_softc, sc_iicmux);
193 }
194
195 static void *
196 pcaiicmux_get_bus_info(struct iicmux_bus * const bus)
197 {
198 struct iicmux_softc * const iicmux = bus->mux;
199 struct pcaiicmux_softc * const sc = iicmux->sc_mux_data;
200 bus_addr_t addr;
201 int error;
202
203 if (bus->busidx >= sc->sc_type->nchannels) {
204 aprint_error_dev(iicmux->sc_dev,
205 "device tree error: bus index %d out of range\n",
206 bus->busidx);
207 return NULL;
208 }
209
210 struct pcaiicmux_bus_info * const bus_info =
211 &sc->sc_bus_info[bus->busidx];
212
213 error = fdtbus_get_reg(bus->phandle, 0, &addr, NULL);
214 if (error) {
215 aprint_error_dev(iicmux->sc_dev,
216 "unable to get reg property for bus %d\n", bus->busidx);
217 return NULL;
218 }
219
220 if (addr >= sc->sc_type->nchannels) {
221 aprint_error_dev(iicmux->sc_dev,
222 "device tree error: reg property %llu out of range\n",
223 (unsigned long long)addr);
224 return NULL;
225 }
226
227 /*
228 * If it's a mux type, the enable value is the channel number
229 * (from the reg property) OR'd with the enable bit.
230 *
231 * If it's a switch type, the enable value is 1 << channel number
232 * (from the reg property).
233 */
234 if (sc->sc_type->enable_bit) {
235 bus_info->enable_value =
236 (uint8_t)addr | sc->sc_type->enable_bit;
237 } else {
238 bus_info->enable_value = 1 << addr;
239 }
240
241 return bus_info;
242 }
243
244 static int
245 pcaiicmux_acquire_bus(struct iicmux_bus * const bus, int const flags)
246 {
247 struct pcaiicmux_softc * const sc = bus->mux->sc_mux_data;
248 struct pcaiicmux_bus_info * const bus_info = bus->bus_data;
249
250 return pcaiicmux_write(sc, bus_info->enable_value, flags);
251 }
252
253 static void
254 pcaiicmux_release_bus(struct iicmux_bus * const bus, int const flags)
255 {
256 struct pcaiicmux_softc * const sc = bus->mux->sc_mux_data;
257
258 if (sc->sc_idle_disconnect) {
259 (void) pcaiicmux_write(sc, 0, flags);
260 }
261 }
262
263 static const struct iicmux_config pcaiicmux_config = {
264 .desc = "PCA954x",
265 .get_mux_info = pcaiicmux_get_mux_info,
266 .get_bus_info = pcaiicmux_get_bus_info,
267 .acquire_bus = pcaiicmux_acquire_bus,
268 .release_bus = pcaiicmux_release_bus,
269 };
270
271 /*****************************************************************************/
272
273 static const struct pcaiicmux_type *
274 pcaiicmux_type_by_compat(const struct i2c_attach_args * const ia)
275 {
276 const struct pcaiicmux_type *type = NULL;
277 const struct device_compatible_entry *dce;
278
279 if (iic_compatible_match(ia, compat_data, &dce))
280 type = (void *)dce->data;
281
282 return type;
283 }
284
285 static int
286 pcaiicmux_match(device_t parent, cfdata_t cf, void *aux)
287 {
288 struct i2c_attach_args * const ia = aux;
289 int match_result;
290
291 if (iic_use_direct_match(ia, cf, compat_data, &match_result)) {
292 return match_result;
293 }
294
295 /* This device is direct-config only. */
296
297 return 0;
298 }
299
300 static void
301 pcaiicmux_attach(device_t parent, device_t self, void *aux)
302 {
303 struct pcaiicmux_softc * const sc = device_private(self);
304 struct i2c_attach_args * const ia = aux;
305 const int phandle = (int)ia->ia_cookie;
306 int error;
307
308 sc->sc_iicmux.sc_dev = self;
309 sc->sc_iicmux.sc_phandle = phandle;
310 sc->sc_iicmux.sc_config = &pcaiicmux_config;
311 sc->sc_iicmux.sc_i2c_parent = ia->ia_tag;
312 sc->sc_addr = ia->ia_addr;
313
314 sc->sc_type = pcaiicmux_type_by_compat(ia);
315 KASSERT(sc->sc_type != NULL);
316
317 aprint_naive("\n");
318 aprint_normal(": PCA954x I2C %s\n",
319 sc->sc_type->enable_bit ? "mux" : "switch");
320
321 if (of_hasprop(phandle, "i2c-mux-idle-disconnect")) {
322 sc->sc_idle_disconnect = true;
323 }
324
325 /* Reset the mux if a reset GPIO is specified. */
326 sc->sc_reset_gpio =
327 fdtbus_gpio_acquire(phandle, "reset-gpios", GPIO_PIN_OUTPUT);
328 if (sc->sc_reset_gpio) {
329 fdtbus_gpio_write(sc->sc_reset_gpio, 1);
330 delay(10);
331 fdtbus_gpio_write(sc->sc_reset_gpio, 0);
332 delay(10);
333 }
334
335 /* Force the mux into a disconnected state. */
336 sc->sc_cur_value = -1;
337 error = iic_acquire_bus(ia->ia_tag, 0);
338 if (error) {
339 aprint_error_dev(self, "failed to acquire I2C bus\n");
340 return;
341 }
342 error = pcaiicmux_write(sc, 0, 0);
343 iic_release_bus(ia->ia_tag, 0);
344 if (error) {
345 aprint_error_dev(self,
346 "failed to set mux to disconnected state\n");
347 return;
348 }
349
350 iicmux_attach(&sc->sc_iicmux);
351 }
352
353 CFATTACH_DECL_NEW(pcaiicmux, sizeof(struct pcaiicmux_softc),
354 pcaiicmux_match, pcaiicmux_attach, NULL, NULL);
355