1 1.64 andvar /* $NetBSD: cac.c,v 1.64 2024/02/10 09:24:17 andvar Exp $ */ 2 1.1 ad 3 1.1 ad /*- 4 1.39 ad * Copyright (c) 2000, 2006, 2007 The NetBSD Foundation, Inc. 5 1.1 ad * All rights reserved. 6 1.1 ad * 7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation 8 1.6 ad * by Andrew Doran. 9 1.1 ad * 10 1.1 ad * Redistribution and use in source and binary forms, with or without 11 1.1 ad * modification, are permitted provided that the following conditions 12 1.1 ad * are met: 13 1.1 ad * 1. Redistributions of source code must retain the above copyright 14 1.1 ad * notice, this list of conditions and the following disclaimer. 15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright 16 1.1 ad * notice, this list of conditions and the following disclaimer in the 17 1.1 ad * documentation and/or other materials provided with the distribution. 18 1.1 ad * 19 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 1.1 ad * POSSIBILITY OF SUCH DAMAGE. 30 1.1 ad */ 31 1.1 ad 32 1.1 ad /* 33 1.1 ad * Driver for Compaq array controllers. 34 1.1 ad */ 35 1.19 lukem 36 1.19 lukem #include <sys/cdefs.h> 37 1.64 andvar __KERNEL_RCSID(0, "$NetBSD: cac.c,v 1.64 2024/02/10 09:24:17 andvar Exp $"); 38 1.44 mhitch 39 1.57 pgoyette #if defined(_KERNEL_OPT) 40 1.44 mhitch #include "bio.h" 41 1.57 pgoyette #endif 42 1.1 ad 43 1.1 ad #include <sys/param.h> 44 1.1 ad #include <sys/systm.h> 45 1.1 ad #include <sys/kernel.h> 46 1.1 ad #include <sys/device.h> 47 1.1 ad #include <sys/queue.h> 48 1.1 ad #include <sys/proc.h> 49 1.1 ad #include <sys/buf.h> 50 1.1 ad #include <sys/endian.h> 51 1.1 ad #include <sys/malloc.h> 52 1.1 ad #include <sys/pool.h> 53 1.57 pgoyette #include <sys/module.h> 54 1.34 dsl #include <sys/bswap.h> 55 1.42 ad #include <sys/bus.h> 56 1.1 ad 57 1.1 ad #include <dev/ic/cacreg.h> 58 1.1 ad #include <dev/ic/cacvar.h> 59 1.1 ad 60 1.44 mhitch #if NBIO > 0 61 1.44 mhitch #include <dev/biovar.h> 62 1.44 mhitch #endif /* NBIO > 0 */ 63 1.44 mhitch 64 1.58 riastrad #include "ioconf.h" 65 1.28 drochner #include "locators.h" 66 1.28 drochner 67 1.27 thorpej static struct cac_ccb *cac_ccb_alloc(struct cac_softc *, int); 68 1.27 thorpej static void cac_ccb_done(struct cac_softc *, struct cac_ccb *); 69 1.27 thorpej static void cac_ccb_free(struct cac_softc *, struct cac_ccb *); 70 1.27 thorpej static int cac_ccb_poll(struct cac_softc *, struct cac_ccb *, int); 71 1.27 thorpej static int cac_ccb_start(struct cac_softc *, struct cac_ccb *); 72 1.27 thorpej static int cac_print(void *, const char *); 73 1.27 thorpej static void cac_shutdown(void *); 74 1.27 thorpej 75 1.27 thorpej static struct cac_ccb *cac_l0_completed(struct cac_softc *); 76 1.27 thorpej static int cac_l0_fifo_full(struct cac_softc *); 77 1.27 thorpej static void cac_l0_intr_enable(struct cac_softc *, int); 78 1.27 thorpej static int cac_l0_intr_pending(struct cac_softc *); 79 1.27 thorpej static void cac_l0_submit(struct cac_softc *, struct cac_ccb *); 80 1.10 ad 81 1.10 ad static void *cac_sdh; /* shutdown hook */ 82 1.10 ad 83 1.44 mhitch #if NBIO > 0 84 1.49 cegger int cac_ioctl(device_t, u_long, void *); 85 1.44 mhitch int cac_ioctl_vol(struct cac_softc *, struct bioc_vol *); 86 1.44 mhitch int cac_create_sensors(struct cac_softc *); 87 1.44 mhitch void cac_sensor_refresh(struct sysmon_envsys *, envsys_data_t *); 88 1.44 mhitch #endif /* NBIO > 0 */ 89 1.44 mhitch 90 1.20 ad const struct cac_linkage cac_l0 = { 91 1.10 ad cac_l0_completed, 92 1.10 ad cac_l0_fifo_full, 93 1.10 ad cac_l0_intr_enable, 94 1.10 ad cac_l0_intr_pending, 95 1.10 ad cac_l0_submit 96 1.10 ad }; 97 1.1 ad 98 1.1 ad /* 99 1.1 ad * Initialise our interface to the controller. 100 1.1 ad */ 101 1.1 ad int 102 1.10 ad cac_init(struct cac_softc *sc, const char *intrstr, int startfw) 103 1.1 ad { 104 1.1 ad struct cac_controller_info cinfo; 105 1.1 ad int error, rseg, size, i; 106 1.1 ad bus_dma_segment_t seg; 107 1.1 ad struct cac_ccb *ccb; 108 1.38 ad char firm[8]; 109 1.29 perry 110 1.1 ad if (intrstr != NULL) 111 1.56 msaitoh aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr); 112 1.1 ad 113 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_free); 114 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_queue); 115 1.43 ad mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM); 116 1.39 ad cv_init(&sc->sc_ccb_cv, "cacccb"); 117 1.1 ad 118 1.1 ad size = sizeof(struct cac_ccb) * CAC_MAX_CCBS; 119 1.1 ad 120 1.29 perry if ((error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1, 121 1.1 ad &rseg, BUS_DMA_NOWAIT)) != 0) { 122 1.54 chs aprint_error_dev(sc->sc_dev, "unable to allocate CCBs, error = %d\n", 123 1.45 cegger error); 124 1.1 ad return (-1); 125 1.1 ad } 126 1.1 ad 127 1.29 perry if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size, 128 1.40 christos (void **)&sc->sc_ccbs, 129 1.10 ad BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) { 130 1.54 chs aprint_error_dev(sc->sc_dev, "unable to map CCBs, error = %d\n", 131 1.45 cegger error); 132 1.1 ad return (-1); 133 1.1 ad } 134 1.1 ad 135 1.29 perry if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0, 136 1.1 ad BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) { 137 1.54 chs aprint_error_dev(sc->sc_dev, "unable to create CCB DMA map, error = %d\n", 138 1.45 cegger error); 139 1.1 ad return (-1); 140 1.1 ad } 141 1.1 ad 142 1.29 perry if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ccbs, 143 1.1 ad size, NULL, BUS_DMA_NOWAIT)) != 0) { 144 1.54 chs aprint_error_dev(sc->sc_dev, "unable to load CCB DMA map, error = %d\n", 145 1.45 cegger error); 146 1.1 ad return (-1); 147 1.1 ad } 148 1.1 ad 149 1.1 ad sc->sc_ccbs_paddr = sc->sc_dmamap->dm_segs[0].ds_addr; 150 1.1 ad memset(sc->sc_ccbs, 0, size); 151 1.1 ad ccb = (struct cac_ccb *)sc->sc_ccbs; 152 1.1 ad 153 1.1 ad for (i = 0; i < CAC_MAX_CCBS; i++, ccb++) { 154 1.1 ad /* Create the DMA map for this CCB's data */ 155 1.12 ad error = bus_dmamap_create(sc->sc_dmat, CAC_MAX_XFER, 156 1.12 ad CAC_SG_SIZE, CAC_MAX_XFER, 0, 157 1.12 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 158 1.12 ad &ccb->ccb_dmamap_xfer); 159 1.10 ad 160 1.1 ad if (error) { 161 1.54 chs aprint_error_dev(sc->sc_dev, "can't create ccb dmamap (%d)\n", 162 1.45 cegger error); 163 1.1 ad break; 164 1.1 ad } 165 1.1 ad 166 1.1 ad ccb->ccb_flags = 0; 167 1.1 ad ccb->ccb_paddr = sc->sc_ccbs_paddr + i * sizeof(struct cac_ccb); 168 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_chain); 169 1.1 ad } 170 1.29 perry 171 1.10 ad /* Start firmware background tasks, if needed. */ 172 1.10 ad if (startfw) { 173 1.10 ad if (cac_cmd(sc, CAC_CMD_START_FIRMWARE, &cinfo, sizeof(cinfo), 174 1.10 ad 0, 0, CAC_CCB_DATA_IN, NULL)) { 175 1.54 chs aprint_error_dev(sc->sc_dev, "CAC_CMD_START_FIRMWARE failed\n"); 176 1.10 ad return (-1); 177 1.10 ad } 178 1.10 ad } 179 1.10 ad 180 1.29 perry if (cac_cmd(sc, CAC_CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 0, 0, 181 1.1 ad CAC_CCB_DATA_IN, NULL)) { 182 1.54 chs aprint_error_dev(sc->sc_dev, "CAC_CMD_GET_CTRL_INFO failed\n"); 183 1.1 ad return (-1); 184 1.1 ad } 185 1.1 ad 186 1.38 ad strlcpy(firm, cinfo.firm_rev, 4+1); 187 1.54 chs printf("%s: %d channels, firmware <%s>\n", device_xname(sc->sc_dev), 188 1.38 ad cinfo.scsi_chips, firm); 189 1.38 ad 190 1.57 pgoyette /* Limit number of units to size of our sc_unitmask */ 191 1.14 ad sc->sc_nunits = cinfo.num_drvs; 192 1.57 pgoyette if (sc->sc_nunits > sizeof(sc->sc_unitmask) * NBBY) 193 1.57 pgoyette sc->sc_nunits = sizeof(sc->sc_unitmask) * NBBY; 194 1.28 drochner 195 1.57 pgoyette /* Attach our units */ 196 1.57 pgoyette sc->sc_unitmask = 0; 197 1.62 thorpej cac_rescan(sc->sc_dev, NULL, NULL); 198 1.1 ad 199 1.10 ad /* Set our `shutdownhook' before we start any device activity. */ 200 1.4 ad if (cac_sdh == NULL) 201 1.1 ad cac_sdh = shutdownhook_establish(cac_shutdown, NULL); 202 1.29 perry 203 1.39 ad mutex_enter(&sc->sc_mutex); 204 1.20 ad (*sc->sc_cl.cl_intr_enable)(sc, CAC_INTR_ENABLE); 205 1.39 ad mutex_exit(&sc->sc_mutex); 206 1.39 ad 207 1.44 mhitch #if NBIO > 0 208 1.54 chs if (bio_register(sc->sc_dev, cac_ioctl) != 0) 209 1.54 chs aprint_error_dev(sc->sc_dev, "controller registration failed"); 210 1.44 mhitch else 211 1.44 mhitch sc->sc_ioctl = cac_ioctl; 212 1.44 mhitch if (cac_create_sensors(sc) != 0) 213 1.54 chs aprint_error_dev(sc->sc_dev, "unable to create sensors\n"); 214 1.44 mhitch #endif 215 1.44 mhitch 216 1.1 ad return (0); 217 1.1 ad } 218 1.1 ad 219 1.57 pgoyette int 220 1.62 thorpej cac_rescan(device_t self, const char *attr, const int *locs) 221 1.57 pgoyette { 222 1.57 pgoyette struct cac_softc *sc; 223 1.57 pgoyette struct cac_attach_args caca; 224 1.62 thorpej int mlocs[CACCF_NLOCS]; 225 1.57 pgoyette int i; 226 1.57 pgoyette 227 1.57 pgoyette sc = device_private(self); 228 1.57 pgoyette for (i = 0; i < sc->sc_nunits; i++) { 229 1.57 pgoyette if (sc->sc_unitmask & (1 << i)) 230 1.57 pgoyette continue; 231 1.57 pgoyette caca.caca_unit = i; 232 1.57 pgoyette 233 1.62 thorpej mlocs[CACCF_UNIT] = i; 234 1.57 pgoyette 235 1.62 thorpej if (config_found(self, &caca, cac_print, 236 1.63 thorpej CFARGS(.submatch = config_stdsubmatch, 237 1.63 thorpej .locators = mlocs)) != NULL) 238 1.57 pgoyette sc->sc_unitmask |= 1 << i; 239 1.57 pgoyette } 240 1.57 pgoyette return 0; 241 1.57 pgoyette } 242 1.57 pgoyette 243 1.1 ad /* 244 1.10 ad * Shut down all `cac' controllers. 245 1.1 ad */ 246 1.27 thorpej static void 247 1.36 christos cac_shutdown(void *cookie) 248 1.1 ad { 249 1.1 ad struct cac_softc *sc; 250 1.30 christos u_int8_t tbuf[512]; 251 1.4 ad int i; 252 1.1 ad 253 1.4 ad for (i = 0; i < cac_cd.cd_ndevs; i++) { 254 1.47 tsutsui if ((sc = device_lookup_private(&cac_cd, i)) == NULL) 255 1.29 perry continue; 256 1.30 christos memset(tbuf, 0, sizeof(tbuf)); 257 1.30 christos tbuf[0] = 1; 258 1.30 christos cac_cmd(sc, CAC_CMD_FLUSH_CACHE, tbuf, sizeof(tbuf), 0, 0, 259 1.1 ad CAC_CCB_DATA_OUT, NULL); 260 1.1 ad } 261 1.29 perry } 262 1.1 ad 263 1.1 ad /* 264 1.10 ad * Print autoconfiguration message for a sub-device. 265 1.1 ad */ 266 1.27 thorpej static int 267 1.10 ad cac_print(void *aux, const char *pnp) 268 1.1 ad { 269 1.1 ad struct cac_attach_args *caca; 270 1.1 ad 271 1.1 ad caca = (struct cac_attach_args *)aux; 272 1.1 ad 273 1.10 ad if (pnp != NULL) 274 1.23 thorpej aprint_normal("block device at %s", pnp); 275 1.23 thorpej aprint_normal(" unit %d", caca->caca_unit); 276 1.1 ad return (UNCONF); 277 1.1 ad } 278 1.1 ad 279 1.1 ad /* 280 1.1 ad * Handle an interrupt from the controller: process finished CCBs and 281 1.1 ad * dequeue any waiting CCBs. 282 1.1 ad */ 283 1.1 ad int 284 1.10 ad cac_intr(void *cookie) 285 1.1 ad { 286 1.1 ad struct cac_softc *sc; 287 1.1 ad struct cac_ccb *ccb; 288 1.39 ad int rv; 289 1.1 ad 290 1.54 chs sc = cookie; 291 1.1 ad 292 1.39 ad mutex_enter(&sc->sc_mutex); 293 1.39 ad 294 1.39 ad if ((*sc->sc_cl.cl_intr_pending)(sc)) { 295 1.39 ad while ((ccb = (*sc->sc_cl.cl_completed)(sc)) != NULL) { 296 1.39 ad cac_ccb_done(sc, ccb); 297 1.39 ad cac_ccb_start(sc, NULL); 298 1.39 ad } 299 1.39 ad rv = 1; 300 1.39 ad } else 301 1.39 ad rv = 0; 302 1.1 ad 303 1.39 ad mutex_exit(&sc->sc_mutex); 304 1.1 ad 305 1.39 ad return (rv); 306 1.1 ad } 307 1.1 ad 308 1.1 ad /* 309 1.1 ad * Execute a [polled] command. 310 1.1 ad */ 311 1.1 ad int 312 1.10 ad cac_cmd(struct cac_softc *sc, int command, void *data, int datasize, 313 1.10 ad int drive, int blkno, int flags, struct cac_context *context) 314 1.1 ad { 315 1.1 ad struct cac_ccb *ccb; 316 1.1 ad struct cac_sgb *sgb; 317 1.39 ad int i, rv, size, nsegs; 318 1.2 ad 319 1.2 ad size = 0; 320 1.1 ad 321 1.26 pk if ((ccb = cac_ccb_alloc(sc, 1)) == NULL) { 322 1.54 chs aprint_error_dev(sc->sc_dev, "unable to alloc CCB"); 323 1.26 pk return (EAGAIN); 324 1.1 ad } 325 1.1 ad 326 1.1 ad if ((flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) { 327 1.10 ad bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, 328 1.17 thorpej (void *)data, datasize, NULL, BUS_DMA_NOWAIT | 329 1.18 thorpej BUS_DMA_STREAMING | ((flags & CAC_CCB_DATA_IN) ? 330 1.18 thorpej BUS_DMA_READ : BUS_DMA_WRITE)); 331 1.10 ad 332 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, datasize, 333 1.1 ad (flags & CAC_CCB_DATA_IN) != 0 ? BUS_DMASYNC_PREREAD : 334 1.1 ad BUS_DMASYNC_PREWRITE); 335 1.29 perry 336 1.1 ad sgb = ccb->ccb_seg; 337 1.59 riastrad nsegs = uimin(ccb->ccb_dmamap_xfer->dm_nsegs, CAC_SG_SIZE); 338 1.1 ad 339 1.2 ad for (i = 0; i < nsegs; i++, sgb++) { 340 1.2 ad size += ccb->ccb_dmamap_xfer->dm_segs[i].ds_len; 341 1.29 perry sgb->length = 342 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len); 343 1.29 perry sgb->addr = 344 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr); 345 1.1 ad } 346 1.2 ad } else { 347 1.2 ad size = datasize; 348 1.2 ad nsegs = 0; 349 1.1 ad } 350 1.2 ad 351 1.1 ad ccb->ccb_hdr.drive = drive; 352 1.37 ad ccb->ccb_hdr.priority = 0; 353 1.29 perry ccb->ccb_hdr.size = htole16((sizeof(struct cac_req) + 354 1.1 ad sizeof(struct cac_sgb) * CAC_SG_SIZE) >> 2); 355 1.1 ad 356 1.37 ad ccb->ccb_req.next = 0; 357 1.37 ad ccb->ccb_req.error = 0; 358 1.37 ad ccb->ccb_req.reserved = 0; 359 1.2 ad ccb->ccb_req.bcount = htole16(howmany(size, DEV_BSIZE)); 360 1.1 ad ccb->ccb_req.command = command; 361 1.5 thorpej ccb->ccb_req.sgcount = nsegs; 362 1.1 ad ccb->ccb_req.blkno = htole32(blkno); 363 1.29 perry 364 1.1 ad ccb->ccb_flags = flags; 365 1.2 ad ccb->ccb_datasize = size; 366 1.1 ad 367 1.39 ad mutex_enter(&sc->sc_mutex); 368 1.39 ad 369 1.1 ad if (context == NULL) { 370 1.1 ad memset(&ccb->ccb_context, 0, sizeof(struct cac_context)); 371 1.10 ad 372 1.64 andvar /* Synchronous commands mustn't wait. */ 373 1.20 ad if ((*sc->sc_cl.cl_fifo_full)(sc)) { 374 1.1 ad cac_ccb_free(sc, ccb); 375 1.26 pk rv = EAGAIN; 376 1.1 ad } else { 377 1.12 ad #ifdef DIAGNOSTIC 378 1.12 ad ccb->ccb_flags |= CAC_CCB_ACTIVE; 379 1.12 ad #endif 380 1.20 ad (*sc->sc_cl.cl_submit)(sc, ccb); 381 1.13 ad rv = cac_ccb_poll(sc, ccb, 2000); 382 1.1 ad cac_ccb_free(sc, ccb); 383 1.1 ad } 384 1.1 ad } else { 385 1.1 ad memcpy(&ccb->ccb_context, context, sizeof(struct cac_context)); 386 1.26 pk (void)cac_ccb_start(sc, ccb); 387 1.26 pk rv = 0; 388 1.1 ad } 389 1.29 perry 390 1.39 ad mutex_exit(&sc->sc_mutex); 391 1.1 ad return (rv); 392 1.1 ad } 393 1.1 ad 394 1.1 ad /* 395 1.39 ad * Wait for the specified CCB to complete. 396 1.1 ad */ 397 1.27 thorpej static int 398 1.10 ad cac_ccb_poll(struct cac_softc *sc, struct cac_ccb *wantccb, int timo) 399 1.10 ad { 400 1.1 ad struct cac_ccb *ccb; 401 1.13 ad 402 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 403 1.39 ad 404 1.38 ad timo *= 1000; 405 1.1 ad 406 1.10 ad do { 407 1.10 ad for (; timo != 0; timo--) { 408 1.20 ad ccb = (*sc->sc_cl.cl_completed)(sc); 409 1.20 ad if (ccb != NULL) 410 1.1 ad break; 411 1.38 ad DELAY(1); 412 1.1 ad } 413 1.1 ad 414 1.13 ad if (timo == 0) { 415 1.54 chs printf("%s: timeout\n", device_xname(sc->sc_dev)); 416 1.13 ad return (EBUSY); 417 1.13 ad } 418 1.10 ad cac_ccb_done(sc, ccb); 419 1.10 ad } while (ccb != wantccb); 420 1.13 ad 421 1.13 ad return (0); 422 1.1 ad } 423 1.1 ad 424 1.1 ad /* 425 1.29 perry * Enqueue the specified command (if any) and attempt to start all enqueued 426 1.39 ad * commands. 427 1.1 ad */ 428 1.27 thorpej static int 429 1.10 ad cac_ccb_start(struct cac_softc *sc, struct cac_ccb *ccb) 430 1.1 ad { 431 1.10 ad 432 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 433 1.39 ad 434 1.1 ad if (ccb != NULL) 435 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain); 436 1.1 ad 437 1.1 ad while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) { 438 1.20 ad if ((*sc->sc_cl.cl_fifo_full)(sc)) 439 1.26 pk return (EAGAIN); 440 1.21 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain); 441 1.10 ad #ifdef DIAGNOSTIC 442 1.10 ad ccb->ccb_flags |= CAC_CCB_ACTIVE; 443 1.10 ad #endif 444 1.20 ad (*sc->sc_cl.cl_submit)(sc, ccb); 445 1.1 ad } 446 1.29 perry 447 1.1 ad return (0); 448 1.1 ad } 449 1.1 ad 450 1.1 ad /* 451 1.1 ad * Process a finished CCB. 452 1.1 ad */ 453 1.27 thorpej static void 454 1.10 ad cac_ccb_done(struct cac_softc *sc, struct cac_ccb *ccb) 455 1.1 ad { 456 1.49 cegger device_t dv; 457 1.14 ad void *context; 458 1.1 ad int error; 459 1.1 ad 460 1.1 ad error = 0; 461 1.1 ad 462 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 463 1.39 ad 464 1.10 ad #ifdef DIAGNOSTIC 465 1.10 ad if ((ccb->ccb_flags & CAC_CCB_ACTIVE) == 0) 466 1.10 ad panic("cac_ccb_done: CCB not active"); 467 1.10 ad ccb->ccb_flags &= ~CAC_CCB_ACTIVE; 468 1.10 ad #endif 469 1.10 ad 470 1.1 ad if ((ccb->ccb_flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) { 471 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, 472 1.1 ad ccb->ccb_datasize, ccb->ccb_flags & CAC_CCB_DATA_IN ? 473 1.1 ad BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 474 1.1 ad bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer); 475 1.1 ad } 476 1.1 ad 477 1.16 ad error = ccb->ccb_req.error; 478 1.10 ad if (ccb->ccb_context.cc_handler != NULL) { 479 1.14 ad dv = ccb->ccb_context.cc_dv; 480 1.14 ad context = ccb->ccb_context.cc_context; 481 1.10 ad cac_ccb_free(sc, ccb); 482 1.14 ad (*ccb->ccb_context.cc_handler)(dv, context, error); 483 1.16 ad } else { 484 1.16 ad if ((error & CAC_RET_SOFT_ERROR) != 0) 485 1.54 chs aprint_error_dev(sc->sc_dev, "soft error; array may be degraded\n"); 486 1.16 ad if ((error & CAC_RET_HARD_ERROR) != 0) 487 1.54 chs aprint_error_dev(sc->sc_dev, "hard error\n"); 488 1.16 ad if ((error & CAC_RET_CMD_REJECTED) != 0) { 489 1.16 ad error = 1; 490 1.54 chs aprint_error_dev(sc->sc_dev, "invalid request\n"); 491 1.16 ad } 492 1.10 ad } 493 1.1 ad } 494 1.1 ad 495 1.1 ad /* 496 1.10 ad * Allocate a CCB. 497 1.1 ad */ 498 1.27 thorpej static struct cac_ccb * 499 1.10 ad cac_ccb_alloc(struct cac_softc *sc, int nosleep) 500 1.1 ad { 501 1.1 ad struct cac_ccb *ccb; 502 1.1 ad 503 1.39 ad mutex_enter(&sc->sc_mutex); 504 1.1 ad 505 1.1 ad for (;;) { 506 1.1 ad if ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)) != NULL) { 507 1.21 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb_chain); 508 1.1 ad break; 509 1.1 ad } 510 1.1 ad if (nosleep) { 511 1.1 ad ccb = NULL; 512 1.1 ad break; 513 1.1 ad } 514 1.39 ad cv_wait(&sc->sc_ccb_cv, &sc->sc_mutex); 515 1.1 ad } 516 1.1 ad 517 1.39 ad mutex_exit(&sc->sc_mutex); 518 1.1 ad return (ccb); 519 1.1 ad } 520 1.1 ad 521 1.1 ad /* 522 1.1 ad * Put a CCB onto the freelist. 523 1.1 ad */ 524 1.27 thorpej static void 525 1.10 ad cac_ccb_free(struct cac_softc *sc, struct cac_ccb *ccb) 526 1.1 ad { 527 1.39 ad 528 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 529 1.1 ad 530 1.13 ad ccb->ccb_flags = 0; 531 1.39 ad if (SIMPLEQ_EMPTY(&sc->sc_ccb_free)) 532 1.39 ad cv_signal(&sc->sc_ccb_cv); 533 1.1 ad SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_chain); 534 1.10 ad } 535 1.10 ad 536 1.10 ad /* 537 1.10 ad * Board specific linkage shared between multiple bus types. 538 1.10 ad */ 539 1.10 ad 540 1.27 thorpej static int 541 1.10 ad cac_l0_fifo_full(struct cac_softc *sc) 542 1.10 ad { 543 1.10 ad 544 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 545 1.39 ad 546 1.10 ad return (cac_inl(sc, CAC_REG_CMD_FIFO) == 0); 547 1.10 ad } 548 1.10 ad 549 1.27 thorpej static void 550 1.10 ad cac_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb) 551 1.10 ad { 552 1.10 ad 553 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 554 1.39 ad 555 1.40 christos bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, 556 1.40 christos (char *)ccb - (char *)sc->sc_ccbs, 557 1.10 ad sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD); 558 1.10 ad cac_outl(sc, CAC_REG_CMD_FIFO, ccb->ccb_paddr); 559 1.10 ad } 560 1.10 ad 561 1.27 thorpej static struct cac_ccb * 562 1.10 ad cac_l0_completed(struct cac_softc *sc) 563 1.10 ad { 564 1.10 ad struct cac_ccb *ccb; 565 1.10 ad paddr_t off; 566 1.10 ad 567 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 568 1.39 ad 569 1.20 ad if ((off = cac_inl(sc, CAC_REG_DONE_FIFO)) == 0) 570 1.20 ad return (NULL); 571 1.20 ad 572 1.20 ad if ((off & 3) != 0) 573 1.54 chs aprint_error_dev(sc->sc_dev, "failed command list returned: %lx\n", 574 1.45 cegger (long)off); 575 1.20 ad 576 1.20 ad off = (off & ~3) - sc->sc_ccbs_paddr; 577 1.40 christos ccb = (struct cac_ccb *)((char *)sc->sc_ccbs + off); 578 1.10 ad 579 1.10 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb), 580 1.10 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD); 581 1.10 ad 582 1.37 ad if ((off & 3) != 0 && ccb->ccb_req.error == 0) 583 1.37 ad ccb->ccb_req.error = CAC_RET_CMD_REJECTED; 584 1.37 ad 585 1.10 ad return (ccb); 586 1.10 ad } 587 1.10 ad 588 1.27 thorpej static int 589 1.10 ad cac_l0_intr_pending(struct cac_softc *sc) 590 1.10 ad { 591 1.10 ad 592 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 593 1.39 ad 594 1.20 ad return (cac_inl(sc, CAC_REG_INTR_PENDING) & CAC_INTR_ENABLE); 595 1.10 ad } 596 1.10 ad 597 1.27 thorpej static void 598 1.10 ad cac_l0_intr_enable(struct cac_softc *sc, int state) 599 1.10 ad { 600 1.10 ad 601 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex)); 602 1.39 ad 603 1.10 ad cac_outl(sc, CAC_REG_INTR_MASK, 604 1.10 ad state ? CAC_INTR_ENABLE : CAC_INTR_DISABLE); 605 1.1 ad } 606 1.44 mhitch 607 1.44 mhitch #if NBIO > 0 608 1.44 mhitch const int cac_level[] = { 0, 4, 1, 5, 51, 7 }; 609 1.44 mhitch const int cac_stat[] = { BIOC_SVONLINE, BIOC_SVOFFLINE, BIOC_SVOFFLINE, 610 1.44 mhitch BIOC_SVDEGRADED, BIOC_SVREBUILD, BIOC_SVREBUILD, BIOC_SVDEGRADED, 611 1.44 mhitch BIOC_SVDEGRADED, BIOC_SVINVALID, BIOC_SVINVALID, BIOC_SVBUILDING, 612 1.44 mhitch BIOC_SVOFFLINE, BIOC_SVBUILDING }; 613 1.44 mhitch 614 1.44 mhitch int 615 1.49 cegger cac_ioctl(device_t dev, u_long cmd, void *addr) 616 1.44 mhitch { 617 1.54 chs struct cac_softc *sc = device_private(dev); 618 1.44 mhitch struct bioc_inq *bi; 619 1.44 mhitch struct bioc_disk *bd; 620 1.44 mhitch cac_lock_t lock; 621 1.44 mhitch int error = 0; 622 1.44 mhitch 623 1.44 mhitch lock = CAC_LOCK(sc); 624 1.44 mhitch switch (cmd) { 625 1.44 mhitch case BIOCINQ: 626 1.44 mhitch bi = (struct bioc_inq *)addr; 627 1.54 chs strlcpy(bi->bi_dev, device_xname(sc->sc_dev), sizeof(bi->bi_dev)); 628 1.44 mhitch bi->bi_novol = sc->sc_nunits; 629 1.44 mhitch bi->bi_nodisk = 0; 630 1.44 mhitch break; 631 1.44 mhitch 632 1.44 mhitch case BIOCVOL: 633 1.44 mhitch error = cac_ioctl_vol(sc, (struct bioc_vol *)addr); 634 1.44 mhitch break; 635 1.44 mhitch 636 1.44 mhitch case BIOCDISK: 637 1.44 mhitch case BIOCDISK_NOVOL: 638 1.44 mhitch bd = (struct bioc_disk *)addr; 639 1.44 mhitch if (bd->bd_volid > sc->sc_nunits) { 640 1.44 mhitch error = EINVAL; 641 1.44 mhitch break; 642 1.44 mhitch } 643 1.44 mhitch /* No disk information yet */ 644 1.44 mhitch break; 645 1.44 mhitch 646 1.44 mhitch default: 647 1.44 mhitch error = EINVAL; 648 1.44 mhitch } 649 1.44 mhitch CAC_UNLOCK(sc, lock); 650 1.44 mhitch 651 1.44 mhitch return (error); 652 1.44 mhitch } 653 1.44 mhitch 654 1.44 mhitch int 655 1.44 mhitch cac_ioctl_vol(struct cac_softc *sc, struct bioc_vol *bv) 656 1.44 mhitch { 657 1.44 mhitch struct cac_drive_info dinfo; 658 1.44 mhitch struct cac_drive_status dstatus; 659 1.44 mhitch u_int32_t blks; 660 1.44 mhitch 661 1.44 mhitch if (bv->bv_volid > sc->sc_nunits) { 662 1.44 mhitch return EINVAL; 663 1.44 mhitch } 664 1.44 mhitch if (cac_cmd(sc, CAC_CMD_GET_LOG_DRV_INFO, &dinfo, sizeof(dinfo), 665 1.44 mhitch bv->bv_volid, 0, CAC_CCB_DATA_IN, NULL)) { 666 1.44 mhitch return EIO; 667 1.44 mhitch } 668 1.44 mhitch if (cac_cmd(sc, CAC_CMD_SENSE_DRV_STATUS, &dstatus, sizeof(dstatus), 669 1.44 mhitch bv->bv_volid, 0, CAC_CCB_DATA_IN, NULL)) { 670 1.44 mhitch return EIO; 671 1.44 mhitch } 672 1.44 mhitch blks = CAC_GET2(dinfo.ncylinders) * CAC_GET1(dinfo.nheads) * 673 1.44 mhitch CAC_GET1(dinfo.nsectors); 674 1.44 mhitch bv->bv_size = (off_t)blks * CAC_GET2(dinfo.secsize); 675 1.44 mhitch bv->bv_level = cac_level[CAC_GET1(dinfo.mirror)]; /*XXX limit check */ 676 1.44 mhitch bv->bv_nodisk = 0; /* XXX */ 677 1.44 mhitch bv->bv_status = 0; /* XXX */ 678 1.44 mhitch bv->bv_percent = -1; 679 1.44 mhitch bv->bv_seconds = 0; 680 1.44 mhitch if (dstatus.stat < sizeof(cac_stat)/sizeof(cac_stat[0])) 681 1.44 mhitch bv->bv_status = cac_stat[dstatus.stat]; 682 1.44 mhitch if (bv->bv_status == BIOC_SVREBUILD || 683 1.44 mhitch bv->bv_status == BIOC_SVBUILDING) 684 1.44 mhitch bv->bv_percent = ((blks - CAC_GET4(dstatus.prog)) * 1000ULL) / 685 1.44 mhitch blks; 686 1.44 mhitch return 0; 687 1.44 mhitch } 688 1.44 mhitch 689 1.44 mhitch int 690 1.44 mhitch cac_create_sensors(struct cac_softc *sc) 691 1.44 mhitch { 692 1.44 mhitch int i; 693 1.44 mhitch int nsensors = sc->sc_nunits; 694 1.44 mhitch 695 1.44 mhitch sc->sc_sme = sysmon_envsys_create(); 696 1.44 mhitch sc->sc_sensor = malloc(sizeof(envsys_data_t) * nsensors, 697 1.61 chs M_DEVBUF, M_WAITOK | M_ZERO); 698 1.44 mhitch for (i = 0; i < nsensors; i++) { 699 1.44 mhitch sc->sc_sensor[i].units = ENVSYS_DRIVE; 700 1.52 pgoyette sc->sc_sensor[i].state = ENVSYS_SINVALID; 701 1.53 pgoyette sc->sc_sensor[i].value_cur = ENVSYS_DRIVE_EMPTY; 702 1.44 mhitch /* Enable monitoring for drive state changes */ 703 1.44 mhitch sc->sc_sensor[i].flags |= ENVSYS_FMONSTCHANGED; 704 1.44 mhitch /* logical drives */ 705 1.44 mhitch snprintf(sc->sc_sensor[i].desc, 706 1.44 mhitch sizeof(sc->sc_sensor[i].desc), "%s:%d", 707 1.54 chs device_xname(sc->sc_dev), i); 708 1.44 mhitch if (sysmon_envsys_sensor_attach(sc->sc_sme, 709 1.44 mhitch &sc->sc_sensor[i])) 710 1.44 mhitch goto out; 711 1.44 mhitch } 712 1.54 chs sc->sc_sme->sme_name = device_xname(sc->sc_dev); 713 1.44 mhitch sc->sc_sme->sme_cookie = sc; 714 1.44 mhitch sc->sc_sme->sme_refresh = cac_sensor_refresh; 715 1.44 mhitch if (sysmon_envsys_register(sc->sc_sme)) { 716 1.54 chs aprint_error_dev(sc->sc_dev, "unable to register with sysmon\n"); 717 1.44 mhitch return(1); 718 1.44 mhitch } 719 1.44 mhitch return (0); 720 1.44 mhitch 721 1.44 mhitch out: 722 1.44 mhitch free(sc->sc_sensor, M_DEVBUF); 723 1.44 mhitch sysmon_envsys_destroy(sc->sc_sme); 724 1.44 mhitch return EINVAL; 725 1.44 mhitch } 726 1.44 mhitch 727 1.44 mhitch void 728 1.44 mhitch cac_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *edata) 729 1.44 mhitch { 730 1.44 mhitch struct cac_softc *sc = sme->sme_cookie; 731 1.44 mhitch struct bioc_vol bv; 732 1.44 mhitch int s; 733 1.44 mhitch 734 1.44 mhitch if (edata->sensor >= sc->sc_nunits) 735 1.44 mhitch return; 736 1.44 mhitch 737 1.48 cegger memset(&bv, 0, sizeof(bv)); 738 1.44 mhitch bv.bv_volid = edata->sensor; 739 1.44 mhitch s = splbio(); 740 1.55 christos if (cac_ioctl_vol(sc, &bv)) 741 1.55 christos bv.bv_status = BIOC_SVINVALID; 742 1.44 mhitch splx(s); 743 1.44 mhitch 744 1.55 christos bio_vol_to_envsys(edata, &bv); 745 1.44 mhitch } 746 1.44 mhitch #endif /* NBIO > 0 */ 747 1.57 pgoyette 748 1.57 pgoyette MODULE(MODULE_CLASS_DRIVER, cac, NULL); 749 1.57 pgoyette 750 1.57 pgoyette #ifdef _MODULE 751 1.57 pgoyette CFDRIVER_DECL(cac, DV_DISK, NULL); 752 1.57 pgoyette #endif 753 1.57 pgoyette 754 1.57 pgoyette static int 755 1.57 pgoyette cac_modcmd(modcmd_t cmd, void *opaque) 756 1.57 pgoyette { 757 1.57 pgoyette int error = 0; 758 1.57 pgoyette 759 1.57 pgoyette #ifdef _MODULE 760 1.57 pgoyette switch (cmd) { 761 1.57 pgoyette case MODULE_CMD_INIT: 762 1.57 pgoyette error = config_cfdriver_attach(&cac_cd); 763 1.57 pgoyette break; 764 1.57 pgoyette case MODULE_CMD_FINI: 765 1.57 pgoyette error = config_cfdriver_detach(&cac_cd); 766 1.57 pgoyette break; 767 1.57 pgoyette default: 768 1.57 pgoyette error = ENOTTY; 769 1.57 pgoyette break; 770 1.57 pgoyette } 771 1.57 pgoyette #endif 772 1.57 pgoyette return error; 773 1.57 pgoyette } 774