cac.c revision 1.11 1 1.11 ad /* $NetBSD: cac.c,v 1.11 2000/09/01 14:17:15 ad Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.1 ad * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.6 ad * by Andrew Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad * 3. All advertising materials mentioning features or use of this software
19 1.1 ad * must display the following acknowledgement:
20 1.1 ad * This product includes software developed by the NetBSD
21 1.1 ad * Foundation, Inc. and its contributors.
22 1.1 ad * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 ad * contributors may be used to endorse or promote products derived
24 1.1 ad * from this software without specific prior written permission.
25 1.1 ad *
26 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
37 1.1 ad */
38 1.1 ad
39 1.1 ad /*
40 1.1 ad * Driver for Compaq array controllers.
41 1.1 ad */
42 1.1 ad
43 1.1 ad #include <sys/param.h>
44 1.1 ad #include <sys/systm.h>
45 1.1 ad #include <sys/kernel.h>
46 1.1 ad #include <sys/device.h>
47 1.1 ad #include <sys/queue.h>
48 1.1 ad #include <sys/proc.h>
49 1.1 ad #include <sys/buf.h>
50 1.1 ad #include <sys/endian.h>
51 1.1 ad #include <sys/malloc.h>
52 1.1 ad #include <sys/pool.h>
53 1.1 ad
54 1.1 ad #include <machine/bswap.h>
55 1.1 ad #include <machine/bus.h>
56 1.1 ad
57 1.1 ad #include <dev/ic/cacreg.h>
58 1.1 ad #include <dev/ic/cacvar.h>
59 1.1 ad
60 1.10 ad static struct cac_ccb *cac_ccb_alloc(struct cac_softc *, int);
61 1.10 ad static void cac_ccb_done(struct cac_softc *, struct cac_ccb *);
62 1.10 ad static void cac_ccb_free(struct cac_softc *, struct cac_ccb *);
63 1.10 ad static void cac_ccb_poll(struct cac_softc *, struct cac_ccb *, int);
64 1.10 ad static int cac_ccb_start(struct cac_softc *, struct cac_ccb *);
65 1.10 ad static int cac_print(void *, const char *);
66 1.10 ad static void cac_shutdown(void *);
67 1.10 ad static int cac_submatch(struct device *, struct cfdata *, void *);
68 1.10 ad
69 1.10 ad static struct cac_ccb *cac_l0_completed(struct cac_softc *);
70 1.10 ad static int cac_l0_fifo_full(struct cac_softc *);
71 1.10 ad static void cac_l0_intr_enable(struct cac_softc *, int);
72 1.10 ad static int cac_l0_intr_pending(struct cac_softc *);
73 1.10 ad static void cac_l0_submit(struct cac_softc *, struct cac_ccb *);
74 1.10 ad
75 1.10 ad static void *cac_sdh; /* shutdown hook */
76 1.10 ad
77 1.10 ad struct cac_linkage cac_l0 = {
78 1.10 ad cac_l0_completed,
79 1.10 ad cac_l0_fifo_full,
80 1.10 ad cac_l0_intr_enable,
81 1.10 ad cac_l0_intr_pending,
82 1.10 ad cac_l0_submit
83 1.10 ad };
84 1.1 ad
85 1.1 ad /*
86 1.1 ad * Initialise our interface to the controller.
87 1.1 ad */
88 1.1 ad int
89 1.10 ad cac_init(struct cac_softc *sc, const char *intrstr, int startfw)
90 1.1 ad {
91 1.1 ad struct cac_controller_info cinfo;
92 1.1 ad struct cac_attach_args caca;
93 1.1 ad int error, rseg, size, i;
94 1.1 ad bus_dma_segment_t seg;
95 1.1 ad struct cac_ccb *ccb;
96 1.1 ad
97 1.1 ad if (intrstr != NULL)
98 1.10 ad printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname,
99 1.10 ad intrstr);
100 1.1 ad
101 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_free);
102 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_queue);
103 1.1 ad
104 1.1 ad size = sizeof(struct cac_ccb) * CAC_MAX_CCBS;
105 1.1 ad
106 1.1 ad if ((error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, 0, &seg, 1,
107 1.1 ad &rseg, BUS_DMA_NOWAIT)) != 0) {
108 1.1 ad printf("%s: unable to allocate CCBs, error = %d\n",
109 1.1 ad sc->sc_dv.dv_xname, error);
110 1.1 ad return (-1);
111 1.1 ad }
112 1.1 ad
113 1.1 ad if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
114 1.10 ad (caddr_t *)&sc->sc_ccbs,
115 1.10 ad BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
116 1.1 ad printf("%s: unable to map CCBs, error = %d\n",
117 1.1 ad sc->sc_dv.dv_xname, error);
118 1.1 ad return (-1);
119 1.1 ad }
120 1.1 ad
121 1.1 ad if ((error = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0,
122 1.1 ad BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
123 1.1 ad printf("%s: unable to create CCB DMA map, error = %d\n",
124 1.1 ad sc->sc_dv.dv_xname, error);
125 1.1 ad return (-1);
126 1.1 ad }
127 1.1 ad
128 1.1 ad if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ccbs,
129 1.1 ad size, NULL, BUS_DMA_NOWAIT)) != 0) {
130 1.1 ad printf("%s: unable to load CCB DMA map, error = %d\n",
131 1.1 ad sc->sc_dv.dv_xname, error);
132 1.1 ad return (-1);
133 1.1 ad }
134 1.1 ad
135 1.1 ad sc->sc_ccbs_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
136 1.1 ad memset(sc->sc_ccbs, 0, size);
137 1.1 ad ccb = (struct cac_ccb *)sc->sc_ccbs;
138 1.1 ad
139 1.1 ad for (i = 0; i < CAC_MAX_CCBS; i++, ccb++) {
140 1.1 ad /* Create the DMA map for this CCB's data */
141 1.1 ad error = bus_dmamap_create(sc->sc_dmat, CAC_MAX_XFER,
142 1.1 ad CAC_SG_SIZE, CAC_MAX_XFER, 0,
143 1.1 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap_xfer);
144 1.10 ad
145 1.1 ad if (error) {
146 1.1 ad printf("%s: can't create ccb dmamap (%d)\n",
147 1.10 ad sc->sc_dv.dv_xname, error);
148 1.1 ad break;
149 1.1 ad }
150 1.1 ad
151 1.1 ad ccb->ccb_flags = 0;
152 1.1 ad ccb->ccb_paddr = sc->sc_ccbs_paddr + i * sizeof(struct cac_ccb);
153 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_chain);
154 1.1 ad }
155 1.1 ad
156 1.10 ad /* Start firmware background tasks, if needed. */
157 1.10 ad if (startfw) {
158 1.10 ad if (cac_cmd(sc, CAC_CMD_START_FIRMWARE, &cinfo, sizeof(cinfo),
159 1.10 ad 0, 0, CAC_CCB_DATA_IN, NULL)) {
160 1.10 ad printf("%s: CAC_CMD_START_FIRMWARE failed\n",
161 1.10 ad sc->sc_dv.dv_xname);
162 1.10 ad return (-1);
163 1.10 ad }
164 1.10 ad }
165 1.10 ad
166 1.1 ad if (cac_cmd(sc, CAC_CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 0, 0,
167 1.1 ad CAC_CCB_DATA_IN, NULL)) {
168 1.1 ad printf("%s: CAC_CMD_GET_CTRL_INFO failed\n",
169 1.1 ad sc->sc_dv.dv_xname);
170 1.1 ad return (-1);
171 1.1 ad }
172 1.1 ad
173 1.1 ad for (i = 0; i < cinfo.num_drvs; i++) {
174 1.1 ad caca.caca_unit = i;
175 1.1 ad config_found_sm(&sc->sc_dv, &caca, cac_print, cac_submatch);
176 1.1 ad }
177 1.1 ad
178 1.10 ad /* Set our `shutdownhook' before we start any device activity. */
179 1.4 ad if (cac_sdh == NULL)
180 1.1 ad cac_sdh = shutdownhook_establish(cac_shutdown, NULL);
181 1.10 ad
182 1.10 ad (*sc->sc_cl->cl_intr_enable)(sc, CAC_INTR_ENABLE);
183 1.1 ad return (0);
184 1.1 ad }
185 1.1 ad
186 1.1 ad /*
187 1.10 ad * Shut down all `cac' controllers.
188 1.1 ad */
189 1.1 ad static void
190 1.10 ad cac_shutdown(void *cookie)
191 1.1 ad {
192 1.4 ad extern struct cfdriver cac_cd;
193 1.1 ad struct cac_softc *sc;
194 1.11 ad u_int8_t buf[512];
195 1.4 ad int i;
196 1.1 ad
197 1.4 ad for (i = 0; i < cac_cd.cd_ndevs; i++) {
198 1.7 thorpej if ((sc = device_lookup(&cac_cd, i)) == NULL)
199 1.4 ad continue;
200 1.11 ad memset(buf, 0, sizeof(buf));
201 1.1 ad buf[0] = 1;
202 1.1 ad cac_cmd(sc, CAC_CMD_FLUSH_CACHE, buf, sizeof(buf), 0, 0,
203 1.1 ad CAC_CCB_DATA_OUT, NULL);
204 1.1 ad }
205 1.1 ad }
206 1.1 ad
207 1.1 ad /*
208 1.10 ad * Print autoconfiguration message for a sub-device.
209 1.1 ad */
210 1.1 ad static int
211 1.10 ad cac_print(void *aux, const char *pnp)
212 1.1 ad {
213 1.1 ad struct cac_attach_args *caca;
214 1.1 ad
215 1.1 ad caca = (struct cac_attach_args *)aux;
216 1.1 ad
217 1.10 ad if (pnp != NULL)
218 1.1 ad printf("block device at %s", pnp);
219 1.1 ad printf(" unit %d", caca->caca_unit);
220 1.1 ad return (UNCONF);
221 1.1 ad }
222 1.1 ad
223 1.1 ad /*
224 1.10 ad * Match a sub-device.
225 1.1 ad */
226 1.1 ad static int
227 1.10 ad cac_submatch(struct device *parent, struct cfdata *cf, void *aux)
228 1.1 ad {
229 1.1 ad struct cac_attach_args *caca;
230 1.1 ad
231 1.1 ad caca = (struct cac_attach_args *)aux;
232 1.1 ad
233 1.1 ad if (cf->cacacf_unit != CACACF_UNIT_UNKNOWN &&
234 1.1 ad cf->cacacf_unit != caca->caca_unit)
235 1.1 ad return (0);
236 1.1 ad
237 1.1 ad return (cf->cf_attach->ca_match(parent, cf, aux));
238 1.1 ad }
239 1.1 ad
240 1.1 ad /*
241 1.1 ad * Handle an interrupt from the controller: process finished CCBs and
242 1.1 ad * dequeue any waiting CCBs.
243 1.1 ad */
244 1.1 ad int
245 1.10 ad cac_intr(void *cookie)
246 1.1 ad {
247 1.1 ad struct cac_softc *sc;
248 1.1 ad struct cac_ccb *ccb;
249 1.1 ad
250 1.10 ad sc = (struct cac_softc *)cookie;
251 1.1 ad
252 1.10 ad if (!(*sc->sc_cl->cl_intr_pending)(sc)) {
253 1.10 ad #ifdef DEBUG
254 1.10 ad printf("%s: spurious intr\n", sc->sc_dv.dv_xname);
255 1.10 ad #endif
256 1.1 ad return (0);
257 1.10 ad }
258 1.1 ad
259 1.10 ad while ((ccb = (*sc->sc_cl->cl_completed)(sc)) != NULL) {
260 1.1 ad cac_ccb_done(sc, ccb);
261 1.10 ad cac_ccb_start(sc, NULL);
262 1.1 ad }
263 1.1 ad
264 1.1 ad return (1);
265 1.1 ad }
266 1.1 ad
267 1.1 ad /*
268 1.1 ad * Execute a [polled] command.
269 1.1 ad */
270 1.1 ad int
271 1.10 ad cac_cmd(struct cac_softc *sc, int command, void *data, int datasize,
272 1.10 ad int drive, int blkno, int flags, struct cac_context *context)
273 1.1 ad {
274 1.1 ad struct cac_ccb *ccb;
275 1.1 ad struct cac_sgb *sgb;
276 1.2 ad int s, i, rv, size, nsegs;
277 1.2 ad
278 1.2 ad size = 0;
279 1.1 ad
280 1.1 ad if ((ccb = cac_ccb_alloc(sc, 0)) == NULL) {
281 1.1 ad printf("%s: unable to alloc CCB", sc->sc_dv.dv_xname);
282 1.1 ad return (1);
283 1.1 ad }
284 1.1 ad
285 1.1 ad if ((flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
286 1.10 ad bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer,
287 1.10 ad (void *)data, datasize, NULL, BUS_DMA_NOWAIT);
288 1.10 ad
289 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, datasize,
290 1.1 ad (flags & CAC_CCB_DATA_IN) != 0 ? BUS_DMASYNC_PREREAD :
291 1.1 ad BUS_DMASYNC_PREWRITE);
292 1.1 ad
293 1.1 ad sgb = ccb->ccb_seg;
294 1.2 ad nsegs = min(ccb->ccb_dmamap_xfer->dm_nsegs, CAC_SG_SIZE);
295 1.1 ad
296 1.2 ad for (i = 0; i < nsegs; i++, sgb++) {
297 1.2 ad size += ccb->ccb_dmamap_xfer->dm_segs[i].ds_len;
298 1.1 ad sgb->length =
299 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
300 1.1 ad sgb->addr =
301 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
302 1.1 ad }
303 1.2 ad } else {
304 1.2 ad size = datasize;
305 1.2 ad nsegs = 0;
306 1.1 ad }
307 1.2 ad
308 1.1 ad ccb->ccb_hdr.drive = drive;
309 1.1 ad ccb->ccb_hdr.size = htole16((sizeof(struct cac_req) +
310 1.1 ad sizeof(struct cac_sgb) * CAC_SG_SIZE) >> 2);
311 1.1 ad
312 1.2 ad ccb->ccb_req.bcount = htole16(howmany(size, DEV_BSIZE));
313 1.1 ad ccb->ccb_req.command = command;
314 1.5 thorpej ccb->ccb_req.sgcount = nsegs;
315 1.1 ad ccb->ccb_req.blkno = htole32(blkno);
316 1.1 ad
317 1.1 ad ccb->ccb_flags = flags;
318 1.2 ad ccb->ccb_datasize = size;
319 1.1 ad
320 1.1 ad if (context == NULL) {
321 1.1 ad memset(&ccb->ccb_context, 0, sizeof(struct cac_context));
322 1.1 ad s = splbio();
323 1.10 ad
324 1.10 ad /* Synchronous commands musn't wait. */
325 1.10 ad if ((*sc->sc_cl->cl_fifo_full)(sc)) {
326 1.1 ad cac_ccb_free(sc, ccb);
327 1.1 ad rv = -1;
328 1.1 ad } else {
329 1.10 ad (*sc->sc_cl->cl_submit)(sc, ccb);
330 1.1 ad cac_ccb_poll(sc, ccb, 2000);
331 1.1 ad cac_ccb_free(sc, ccb);
332 1.1 ad rv = 0;
333 1.1 ad }
334 1.1 ad } else {
335 1.1 ad memcpy(&ccb->ccb_context, context, sizeof(struct cac_context));
336 1.4 ad s = splbio();
337 1.1 ad rv = cac_ccb_start(sc, ccb);
338 1.1 ad }
339 1.1 ad
340 1.4 ad splx(s);
341 1.1 ad return (rv);
342 1.1 ad }
343 1.1 ad
344 1.1 ad /*
345 1.10 ad * Wait for the specified CCB to complete. Must be called at splbio.
346 1.1 ad */
347 1.1 ad static void
348 1.10 ad cac_ccb_poll(struct cac_softc *sc, struct cac_ccb *wantccb, int timo)
349 1.10 ad {
350 1.1 ad struct cac_ccb *ccb;
351 1.2 ad
352 1.9 ad timo *= 10;
353 1.1 ad
354 1.10 ad do {
355 1.10 ad for (; timo != 0; timo--) {
356 1.10 ad if ((ccb = (*sc->sc_cl->cl_completed)(sc)) != NULL)
357 1.1 ad break;
358 1.1 ad DELAY(100);
359 1.1 ad }
360 1.1 ad
361 1.1 ad if (timo == 0)
362 1.1 ad panic("%s: cac_ccb_poll: timeout", sc->sc_dv.dv_xname);
363 1.1 ad
364 1.10 ad cac_ccb_done(sc, ccb);
365 1.10 ad } while (ccb != wantccb);
366 1.1 ad }
367 1.1 ad
368 1.1 ad /*
369 1.1 ad * Enqueue the specifed command (if any) and attempt to start all enqueued
370 1.10 ad * commands. Must be called at splbio.
371 1.1 ad */
372 1.10 ad static int
373 1.10 ad cac_ccb_start(struct cac_softc *sc, struct cac_ccb *ccb)
374 1.1 ad {
375 1.10 ad
376 1.1 ad if (ccb != NULL)
377 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain);
378 1.1 ad
379 1.1 ad while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) {
380 1.10 ad if ((*sc->sc_cl->cl_fifo_full)(sc))
381 1.1 ad return (-1);
382 1.1 ad SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb, ccb_chain);
383 1.10 ad #ifdef DIAGNOSTIC
384 1.10 ad ccb->ccb_flags |= CAC_CCB_ACTIVE;
385 1.10 ad #endif
386 1.10 ad (*sc->sc_cl->cl_submit)(sc, ccb);
387 1.1 ad }
388 1.1 ad
389 1.1 ad return (0);
390 1.1 ad }
391 1.1 ad
392 1.1 ad /*
393 1.1 ad * Process a finished CCB.
394 1.1 ad */
395 1.1 ad static void
396 1.10 ad cac_ccb_done(struct cac_softc *sc, struct cac_ccb *ccb)
397 1.1 ad {
398 1.10 ad const char *errdvn;
399 1.1 ad int error;
400 1.1 ad
401 1.1 ad error = 0;
402 1.1 ad
403 1.10 ad #ifdef DIAGNOSTIC
404 1.10 ad if ((ccb->ccb_flags & CAC_CCB_ACTIVE) == 0)
405 1.10 ad panic("cac_ccb_done: CCB not active");
406 1.10 ad ccb->ccb_flags &= ~CAC_CCB_ACTIVE;
407 1.10 ad #endif
408 1.10 ad
409 1.1 ad if ((ccb->ccb_flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
410 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
411 1.1 ad ccb->ccb_datasize, ccb->ccb_flags & CAC_CCB_DATA_IN ?
412 1.1 ad BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
413 1.1 ad bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
414 1.1 ad }
415 1.1 ad
416 1.10 ad if (ccb->ccb_context.cc_dv != NULL)
417 1.10 ad errdvn = ccb->ccb_context.cc_dv->dv_xname;
418 1.10 ad else
419 1.10 ad errdvn = sc->sc_dv.dv_xname;
420 1.10 ad
421 1.1 ad if ((ccb->ccb_req.error & CAC_RET_SOFT_ERROR) != 0)
422 1.10 ad printf("%s: soft error; corrected\n", errdvn);
423 1.1 ad if ((ccb->ccb_req.error & CAC_RET_HARD_ERROR) != 0) {
424 1.1 ad error = 1;
425 1.10 ad printf("%s: hard error\n", errdvn);
426 1.1 ad }
427 1.1 ad if ((ccb->ccb_req.error & CAC_RET_CMD_REJECTED) != 0) {
428 1.1 ad error = 1;
429 1.10 ad printf("%s: invalid request\n", errdvn);
430 1.1 ad }
431 1.1 ad
432 1.10 ad if (ccb->ccb_context.cc_handler != NULL) {
433 1.10 ad (*ccb->ccb_context.cc_handler)(ccb, error);
434 1.10 ad cac_ccb_free(sc, ccb);
435 1.10 ad }
436 1.1 ad }
437 1.1 ad
438 1.1 ad /*
439 1.10 ad * Allocate a CCB.
440 1.1 ad */
441 1.1 ad struct cac_ccb *
442 1.10 ad cac_ccb_alloc(struct cac_softc *sc, int nosleep)
443 1.1 ad {
444 1.1 ad struct cac_ccb *ccb;
445 1.1 ad int s;
446 1.1 ad
447 1.1 ad s = splbio();
448 1.1 ad
449 1.1 ad for (;;) {
450 1.1 ad if ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)) != NULL) {
451 1.1 ad SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
452 1.1 ad break;
453 1.1 ad }
454 1.1 ad if (nosleep) {
455 1.1 ad ccb = NULL;
456 1.1 ad break;
457 1.1 ad }
458 1.1 ad tsleep(&sc->sc_ccb_free, PRIBIO, "cacccb", 0);
459 1.1 ad }
460 1.1 ad
461 1.1 ad splx(s);
462 1.1 ad return (ccb);
463 1.1 ad }
464 1.1 ad
465 1.1 ad /*
466 1.1 ad * Put a CCB onto the freelist.
467 1.1 ad */
468 1.1 ad void
469 1.10 ad cac_ccb_free(struct cac_softc *sc, struct cac_ccb *ccb)
470 1.1 ad {
471 1.1 ad int s;
472 1.1 ad
473 1.1 ad s = splbio();
474 1.1 ad ccb->ccb_flags = 0;
475 1.1 ad SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
476 1.1 ad if (SIMPLEQ_NEXT(ccb, ccb_chain) == NULL)
477 1.10 ad wakeup_one(&sc->sc_ccb_free);
478 1.1 ad splx(s);
479 1.1 ad }
480 1.1 ad
481 1.1 ad /*
482 1.1 ad * Adjust the size of a transfer.
483 1.1 ad */
484 1.1 ad void
485 1.10 ad cac_minphys(struct buf *bp)
486 1.1 ad {
487 1.1 ad
488 1.2 ad if (bp->b_bcount > CAC_MAX_XFER)
489 1.2 ad bp->b_bcount = CAC_MAX_XFER;
490 1.2 ad minphys(bp);
491 1.10 ad }
492 1.10 ad
493 1.10 ad /*
494 1.10 ad * Board specific linkage shared between multiple bus types.
495 1.10 ad */
496 1.10 ad
497 1.10 ad static int
498 1.10 ad cac_l0_fifo_full(struct cac_softc *sc)
499 1.10 ad {
500 1.10 ad
501 1.10 ad return (cac_inl(sc, CAC_REG_CMD_FIFO) == 0);
502 1.10 ad }
503 1.10 ad
504 1.10 ad static void
505 1.10 ad cac_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
506 1.10 ad {
507 1.10 ad
508 1.10 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, (caddr_t)ccb - sc->sc_ccbs,
509 1.10 ad sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
510 1.10 ad cac_outl(sc, CAC_REG_CMD_FIFO, ccb->ccb_paddr);
511 1.10 ad }
512 1.10 ad
513 1.10 ad static struct cac_ccb *
514 1.10 ad cac_l0_completed(struct cac_softc *sc)
515 1.10 ad {
516 1.10 ad struct cac_ccb *ccb;
517 1.10 ad paddr_t off;
518 1.10 ad
519 1.10 ad off = (cac_inl(sc, CAC_REG_DONE_FIFO) & ~3) - sc->sc_ccbs_paddr;
520 1.10 ad ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
521 1.10 ad
522 1.10 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
523 1.10 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
524 1.10 ad
525 1.10 ad return (ccb);
526 1.10 ad }
527 1.10 ad
528 1.10 ad static int
529 1.10 ad cac_l0_intr_pending(struct cac_softc *sc)
530 1.10 ad {
531 1.10 ad
532 1.10 ad return (cac_inl(sc, CAC_REG_INTR_PENDING));
533 1.10 ad }
534 1.10 ad
535 1.10 ad static void
536 1.10 ad cac_l0_intr_enable(struct cac_softc *sc, int state)
537 1.10 ad {
538 1.10 ad
539 1.10 ad cac_outl(sc, CAC_REG_INTR_MASK,
540 1.10 ad state ? CAC_INTR_ENABLE : CAC_INTR_DISABLE);
541 1.1 ad }
542