cac.c revision 1.18 1 1.18 thorpej /* $NetBSD: cac.c,v 1.18 2001/07/19 16:25:24 thorpej Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.1 ad * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.6 ad * by Andrew Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad * 3. All advertising materials mentioning features or use of this software
19 1.1 ad * must display the following acknowledgement:
20 1.1 ad * This product includes software developed by the NetBSD
21 1.1 ad * Foundation, Inc. and its contributors.
22 1.1 ad * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 ad * contributors may be used to endorse or promote products derived
24 1.1 ad * from this software without specific prior written permission.
25 1.1 ad *
26 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
37 1.1 ad */
38 1.1 ad
39 1.1 ad /*
40 1.1 ad * Driver for Compaq array controllers.
41 1.1 ad */
42 1.1 ad
43 1.1 ad #include <sys/param.h>
44 1.1 ad #include <sys/systm.h>
45 1.1 ad #include <sys/kernel.h>
46 1.1 ad #include <sys/device.h>
47 1.1 ad #include <sys/queue.h>
48 1.1 ad #include <sys/proc.h>
49 1.1 ad #include <sys/buf.h>
50 1.1 ad #include <sys/endian.h>
51 1.1 ad #include <sys/malloc.h>
52 1.1 ad #include <sys/pool.h>
53 1.1 ad
54 1.15 thorpej #include <uvm/uvm_extern.h>
55 1.15 thorpej
56 1.1 ad #include <machine/bswap.h>
57 1.1 ad #include <machine/bus.h>
58 1.1 ad
59 1.1 ad #include <dev/ic/cacreg.h>
60 1.1 ad #include <dev/ic/cacvar.h>
61 1.1 ad
62 1.10 ad static struct cac_ccb *cac_ccb_alloc(struct cac_softc *, int);
63 1.10 ad static void cac_ccb_done(struct cac_softc *, struct cac_ccb *);
64 1.10 ad static void cac_ccb_free(struct cac_softc *, struct cac_ccb *);
65 1.13 ad static int cac_ccb_poll(struct cac_softc *, struct cac_ccb *, int);
66 1.10 ad static int cac_ccb_start(struct cac_softc *, struct cac_ccb *);
67 1.10 ad static int cac_print(void *, const char *);
68 1.10 ad static void cac_shutdown(void *);
69 1.10 ad static int cac_submatch(struct device *, struct cfdata *, void *);
70 1.10 ad
71 1.10 ad static struct cac_ccb *cac_l0_completed(struct cac_softc *);
72 1.10 ad static int cac_l0_fifo_full(struct cac_softc *);
73 1.10 ad static void cac_l0_intr_enable(struct cac_softc *, int);
74 1.10 ad static int cac_l0_intr_pending(struct cac_softc *);
75 1.10 ad static void cac_l0_submit(struct cac_softc *, struct cac_ccb *);
76 1.10 ad
77 1.10 ad static void *cac_sdh; /* shutdown hook */
78 1.10 ad
79 1.10 ad struct cac_linkage cac_l0 = {
80 1.10 ad cac_l0_completed,
81 1.10 ad cac_l0_fifo_full,
82 1.10 ad cac_l0_intr_enable,
83 1.10 ad cac_l0_intr_pending,
84 1.10 ad cac_l0_submit
85 1.10 ad };
86 1.1 ad
87 1.1 ad /*
88 1.1 ad * Initialise our interface to the controller.
89 1.1 ad */
90 1.1 ad int
91 1.10 ad cac_init(struct cac_softc *sc, const char *intrstr, int startfw)
92 1.1 ad {
93 1.1 ad struct cac_controller_info cinfo;
94 1.1 ad struct cac_attach_args caca;
95 1.1 ad int error, rseg, size, i;
96 1.1 ad bus_dma_segment_t seg;
97 1.1 ad struct cac_ccb *ccb;
98 1.1 ad
99 1.1 ad if (intrstr != NULL)
100 1.10 ad printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname,
101 1.10 ad intrstr);
102 1.1 ad
103 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_free);
104 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_queue);
105 1.1 ad
106 1.1 ad size = sizeof(struct cac_ccb) * CAC_MAX_CCBS;
107 1.1 ad
108 1.15 thorpej if ((error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1,
109 1.1 ad &rseg, BUS_DMA_NOWAIT)) != 0) {
110 1.1 ad printf("%s: unable to allocate CCBs, error = %d\n",
111 1.1 ad sc->sc_dv.dv_xname, error);
112 1.1 ad return (-1);
113 1.1 ad }
114 1.1 ad
115 1.1 ad if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
116 1.10 ad (caddr_t *)&sc->sc_ccbs,
117 1.10 ad BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
118 1.1 ad printf("%s: unable to map CCBs, error = %d\n",
119 1.1 ad sc->sc_dv.dv_xname, error);
120 1.1 ad return (-1);
121 1.1 ad }
122 1.1 ad
123 1.12 ad if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
124 1.1 ad BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
125 1.1 ad printf("%s: unable to create CCB DMA map, error = %d\n",
126 1.1 ad sc->sc_dv.dv_xname, error);
127 1.1 ad return (-1);
128 1.1 ad }
129 1.1 ad
130 1.1 ad if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ccbs,
131 1.1 ad size, NULL, BUS_DMA_NOWAIT)) != 0) {
132 1.1 ad printf("%s: unable to load CCB DMA map, error = %d\n",
133 1.1 ad sc->sc_dv.dv_xname, error);
134 1.1 ad return (-1);
135 1.1 ad }
136 1.1 ad
137 1.1 ad sc->sc_ccbs_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
138 1.1 ad memset(sc->sc_ccbs, 0, size);
139 1.1 ad ccb = (struct cac_ccb *)sc->sc_ccbs;
140 1.1 ad
141 1.1 ad for (i = 0; i < CAC_MAX_CCBS; i++, ccb++) {
142 1.1 ad /* Create the DMA map for this CCB's data */
143 1.12 ad error = bus_dmamap_create(sc->sc_dmat, CAC_MAX_XFER,
144 1.12 ad CAC_SG_SIZE, CAC_MAX_XFER, 0,
145 1.12 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
146 1.12 ad &ccb->ccb_dmamap_xfer);
147 1.10 ad
148 1.1 ad if (error) {
149 1.1 ad printf("%s: can't create ccb dmamap (%d)\n",
150 1.10 ad sc->sc_dv.dv_xname, error);
151 1.1 ad break;
152 1.1 ad }
153 1.1 ad
154 1.1 ad ccb->ccb_flags = 0;
155 1.1 ad ccb->ccb_paddr = sc->sc_ccbs_paddr + i * sizeof(struct cac_ccb);
156 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_chain);
157 1.1 ad }
158 1.1 ad
159 1.10 ad /* Start firmware background tasks, if needed. */
160 1.10 ad if (startfw) {
161 1.10 ad if (cac_cmd(sc, CAC_CMD_START_FIRMWARE, &cinfo, sizeof(cinfo),
162 1.10 ad 0, 0, CAC_CCB_DATA_IN, NULL)) {
163 1.10 ad printf("%s: CAC_CMD_START_FIRMWARE failed\n",
164 1.10 ad sc->sc_dv.dv_xname);
165 1.10 ad return (-1);
166 1.10 ad }
167 1.10 ad }
168 1.10 ad
169 1.1 ad if (cac_cmd(sc, CAC_CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 0, 0,
170 1.1 ad CAC_CCB_DATA_IN, NULL)) {
171 1.1 ad printf("%s: CAC_CMD_GET_CTRL_INFO failed\n",
172 1.1 ad sc->sc_dv.dv_xname);
173 1.1 ad return (-1);
174 1.1 ad }
175 1.1 ad
176 1.14 ad sc->sc_nunits = cinfo.num_drvs;
177 1.1 ad for (i = 0; i < cinfo.num_drvs; i++) {
178 1.1 ad caca.caca_unit = i;
179 1.1 ad config_found_sm(&sc->sc_dv, &caca, cac_print, cac_submatch);
180 1.1 ad }
181 1.1 ad
182 1.10 ad /* Set our `shutdownhook' before we start any device activity. */
183 1.4 ad if (cac_sdh == NULL)
184 1.1 ad cac_sdh = shutdownhook_establish(cac_shutdown, NULL);
185 1.10 ad
186 1.10 ad (*sc->sc_cl->cl_intr_enable)(sc, CAC_INTR_ENABLE);
187 1.1 ad return (0);
188 1.1 ad }
189 1.1 ad
190 1.1 ad /*
191 1.10 ad * Shut down all `cac' controllers.
192 1.1 ad */
193 1.1 ad static void
194 1.10 ad cac_shutdown(void *cookie)
195 1.1 ad {
196 1.4 ad extern struct cfdriver cac_cd;
197 1.1 ad struct cac_softc *sc;
198 1.11 ad u_int8_t buf[512];
199 1.4 ad int i;
200 1.1 ad
201 1.4 ad for (i = 0; i < cac_cd.cd_ndevs; i++) {
202 1.7 thorpej if ((sc = device_lookup(&cac_cd, i)) == NULL)
203 1.4 ad continue;
204 1.11 ad memset(buf, 0, sizeof(buf));
205 1.1 ad buf[0] = 1;
206 1.1 ad cac_cmd(sc, CAC_CMD_FLUSH_CACHE, buf, sizeof(buf), 0, 0,
207 1.1 ad CAC_CCB_DATA_OUT, NULL);
208 1.1 ad }
209 1.1 ad }
210 1.1 ad
211 1.1 ad /*
212 1.10 ad * Print autoconfiguration message for a sub-device.
213 1.1 ad */
214 1.1 ad static int
215 1.10 ad cac_print(void *aux, const char *pnp)
216 1.1 ad {
217 1.1 ad struct cac_attach_args *caca;
218 1.1 ad
219 1.1 ad caca = (struct cac_attach_args *)aux;
220 1.1 ad
221 1.10 ad if (pnp != NULL)
222 1.1 ad printf("block device at %s", pnp);
223 1.1 ad printf(" unit %d", caca->caca_unit);
224 1.1 ad return (UNCONF);
225 1.1 ad }
226 1.1 ad
227 1.1 ad /*
228 1.10 ad * Match a sub-device.
229 1.1 ad */
230 1.1 ad static int
231 1.10 ad cac_submatch(struct device *parent, struct cfdata *cf, void *aux)
232 1.1 ad {
233 1.1 ad struct cac_attach_args *caca;
234 1.1 ad
235 1.1 ad caca = (struct cac_attach_args *)aux;
236 1.1 ad
237 1.13 ad if (cf->cacacf_unit != CACCF_UNIT_DEFAULT &&
238 1.1 ad cf->cacacf_unit != caca->caca_unit)
239 1.1 ad return (0);
240 1.1 ad
241 1.1 ad return (cf->cf_attach->ca_match(parent, cf, aux));
242 1.1 ad }
243 1.1 ad
244 1.1 ad /*
245 1.1 ad * Handle an interrupt from the controller: process finished CCBs and
246 1.1 ad * dequeue any waiting CCBs.
247 1.1 ad */
248 1.1 ad int
249 1.10 ad cac_intr(void *cookie)
250 1.1 ad {
251 1.1 ad struct cac_softc *sc;
252 1.1 ad struct cac_ccb *ccb;
253 1.1 ad
254 1.10 ad sc = (struct cac_softc *)cookie;
255 1.1 ad
256 1.10 ad if (!(*sc->sc_cl->cl_intr_pending)(sc)) {
257 1.10 ad #ifdef DEBUG
258 1.10 ad printf("%s: spurious intr\n", sc->sc_dv.dv_xname);
259 1.10 ad #endif
260 1.1 ad return (0);
261 1.10 ad }
262 1.1 ad
263 1.10 ad while ((ccb = (*sc->sc_cl->cl_completed)(sc)) != NULL) {
264 1.1 ad cac_ccb_done(sc, ccb);
265 1.10 ad cac_ccb_start(sc, NULL);
266 1.1 ad }
267 1.1 ad
268 1.1 ad return (1);
269 1.1 ad }
270 1.1 ad
271 1.1 ad /*
272 1.1 ad * Execute a [polled] command.
273 1.1 ad */
274 1.1 ad int
275 1.10 ad cac_cmd(struct cac_softc *sc, int command, void *data, int datasize,
276 1.10 ad int drive, int blkno, int flags, struct cac_context *context)
277 1.1 ad {
278 1.1 ad struct cac_ccb *ccb;
279 1.1 ad struct cac_sgb *sgb;
280 1.2 ad int s, i, rv, size, nsegs;
281 1.2 ad
282 1.2 ad size = 0;
283 1.1 ad
284 1.1 ad if ((ccb = cac_ccb_alloc(sc, 0)) == NULL) {
285 1.1 ad printf("%s: unable to alloc CCB", sc->sc_dv.dv_xname);
286 1.13 ad return (ENOMEM);
287 1.1 ad }
288 1.1 ad
289 1.1 ad if ((flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
290 1.10 ad bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer,
291 1.17 thorpej (void *)data, datasize, NULL, BUS_DMA_NOWAIT |
292 1.18 thorpej BUS_DMA_STREAMING | ((flags & CAC_CCB_DATA_IN) ?
293 1.18 thorpej BUS_DMA_READ : BUS_DMA_WRITE));
294 1.10 ad
295 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, datasize,
296 1.1 ad (flags & CAC_CCB_DATA_IN) != 0 ? BUS_DMASYNC_PREREAD :
297 1.1 ad BUS_DMASYNC_PREWRITE);
298 1.1 ad
299 1.1 ad sgb = ccb->ccb_seg;
300 1.2 ad nsegs = min(ccb->ccb_dmamap_xfer->dm_nsegs, CAC_SG_SIZE);
301 1.1 ad
302 1.2 ad for (i = 0; i < nsegs; i++, sgb++) {
303 1.2 ad size += ccb->ccb_dmamap_xfer->dm_segs[i].ds_len;
304 1.1 ad sgb->length =
305 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
306 1.1 ad sgb->addr =
307 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
308 1.1 ad }
309 1.2 ad } else {
310 1.2 ad size = datasize;
311 1.2 ad nsegs = 0;
312 1.1 ad }
313 1.2 ad
314 1.1 ad ccb->ccb_hdr.drive = drive;
315 1.1 ad ccb->ccb_hdr.size = htole16((sizeof(struct cac_req) +
316 1.1 ad sizeof(struct cac_sgb) * CAC_SG_SIZE) >> 2);
317 1.1 ad
318 1.2 ad ccb->ccb_req.bcount = htole16(howmany(size, DEV_BSIZE));
319 1.1 ad ccb->ccb_req.command = command;
320 1.5 thorpej ccb->ccb_req.sgcount = nsegs;
321 1.1 ad ccb->ccb_req.blkno = htole32(blkno);
322 1.1 ad
323 1.1 ad ccb->ccb_flags = flags;
324 1.2 ad ccb->ccb_datasize = size;
325 1.1 ad
326 1.1 ad if (context == NULL) {
327 1.1 ad memset(&ccb->ccb_context, 0, sizeof(struct cac_context));
328 1.1 ad s = splbio();
329 1.10 ad
330 1.10 ad /* Synchronous commands musn't wait. */
331 1.10 ad if ((*sc->sc_cl->cl_fifo_full)(sc)) {
332 1.1 ad cac_ccb_free(sc, ccb);
333 1.1 ad rv = -1;
334 1.1 ad } else {
335 1.12 ad #ifdef DIAGNOSTIC
336 1.12 ad ccb->ccb_flags |= CAC_CCB_ACTIVE;
337 1.12 ad #endif
338 1.10 ad (*sc->sc_cl->cl_submit)(sc, ccb);
339 1.13 ad rv = cac_ccb_poll(sc, ccb, 2000);
340 1.1 ad cac_ccb_free(sc, ccb);
341 1.1 ad }
342 1.1 ad } else {
343 1.1 ad memcpy(&ccb->ccb_context, context, sizeof(struct cac_context));
344 1.4 ad s = splbio();
345 1.1 ad rv = cac_ccb_start(sc, ccb);
346 1.1 ad }
347 1.1 ad
348 1.4 ad splx(s);
349 1.1 ad return (rv);
350 1.1 ad }
351 1.1 ad
352 1.1 ad /*
353 1.10 ad * Wait for the specified CCB to complete. Must be called at splbio.
354 1.1 ad */
355 1.13 ad static int
356 1.10 ad cac_ccb_poll(struct cac_softc *sc, struct cac_ccb *wantccb, int timo)
357 1.10 ad {
358 1.1 ad struct cac_ccb *ccb;
359 1.13 ad
360 1.9 ad timo *= 10;
361 1.1 ad
362 1.10 ad do {
363 1.10 ad for (; timo != 0; timo--) {
364 1.10 ad if ((ccb = (*sc->sc_cl->cl_completed)(sc)) != NULL)
365 1.1 ad break;
366 1.1 ad DELAY(100);
367 1.1 ad }
368 1.1 ad
369 1.13 ad if (timo == 0) {
370 1.13 ad printf("%s: timeout", sc->sc_dv.dv_xname);
371 1.13 ad return (EBUSY);
372 1.13 ad }
373 1.10 ad cac_ccb_done(sc, ccb);
374 1.10 ad } while (ccb != wantccb);
375 1.13 ad
376 1.13 ad return (0);
377 1.1 ad }
378 1.1 ad
379 1.1 ad /*
380 1.1 ad * Enqueue the specifed command (if any) and attempt to start all enqueued
381 1.10 ad * commands. Must be called at splbio.
382 1.1 ad */
383 1.10 ad static int
384 1.10 ad cac_ccb_start(struct cac_softc *sc, struct cac_ccb *ccb)
385 1.1 ad {
386 1.10 ad
387 1.1 ad if (ccb != NULL)
388 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain);
389 1.1 ad
390 1.1 ad while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) {
391 1.10 ad if ((*sc->sc_cl->cl_fifo_full)(sc))
392 1.13 ad return (EBUSY);
393 1.1 ad SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb, ccb_chain);
394 1.10 ad #ifdef DIAGNOSTIC
395 1.10 ad ccb->ccb_flags |= CAC_CCB_ACTIVE;
396 1.10 ad #endif
397 1.10 ad (*sc->sc_cl->cl_submit)(sc, ccb);
398 1.1 ad }
399 1.1 ad
400 1.1 ad return (0);
401 1.1 ad }
402 1.1 ad
403 1.1 ad /*
404 1.1 ad * Process a finished CCB.
405 1.1 ad */
406 1.1 ad static void
407 1.10 ad cac_ccb_done(struct cac_softc *sc, struct cac_ccb *ccb)
408 1.1 ad {
409 1.14 ad struct device *dv;
410 1.14 ad void *context;
411 1.1 ad int error;
412 1.1 ad
413 1.1 ad error = 0;
414 1.1 ad
415 1.10 ad #ifdef DIAGNOSTIC
416 1.10 ad if ((ccb->ccb_flags & CAC_CCB_ACTIVE) == 0)
417 1.10 ad panic("cac_ccb_done: CCB not active");
418 1.10 ad ccb->ccb_flags &= ~CAC_CCB_ACTIVE;
419 1.10 ad #endif
420 1.10 ad
421 1.1 ad if ((ccb->ccb_flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
422 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
423 1.1 ad ccb->ccb_datasize, ccb->ccb_flags & CAC_CCB_DATA_IN ?
424 1.1 ad BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
425 1.1 ad bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
426 1.1 ad }
427 1.1 ad
428 1.16 ad error = ccb->ccb_req.error;
429 1.10 ad if (ccb->ccb_context.cc_handler != NULL) {
430 1.14 ad dv = ccb->ccb_context.cc_dv;
431 1.14 ad context = ccb->ccb_context.cc_context;
432 1.10 ad cac_ccb_free(sc, ccb);
433 1.14 ad (*ccb->ccb_context.cc_handler)(dv, context, error);
434 1.16 ad } else {
435 1.16 ad if ((error & CAC_RET_SOFT_ERROR) != 0)
436 1.16 ad printf("%s: soft error; array may be degraded\n",
437 1.16 ad sc->sc_dv.dv_xname);
438 1.16 ad if ((error & CAC_RET_HARD_ERROR) != 0)
439 1.16 ad printf("%s: hard error\n", sc->sc_dv.dv_xname);
440 1.16 ad if ((error & CAC_RET_CMD_REJECTED) != 0) {
441 1.16 ad error = 1;
442 1.16 ad printf("%s: invalid request\n", sc->sc_dv.dv_xname);
443 1.16 ad }
444 1.10 ad }
445 1.1 ad }
446 1.1 ad
447 1.1 ad /*
448 1.10 ad * Allocate a CCB.
449 1.1 ad */
450 1.1 ad struct cac_ccb *
451 1.10 ad cac_ccb_alloc(struct cac_softc *sc, int nosleep)
452 1.1 ad {
453 1.1 ad struct cac_ccb *ccb;
454 1.1 ad int s;
455 1.1 ad
456 1.1 ad s = splbio();
457 1.1 ad
458 1.1 ad for (;;) {
459 1.1 ad if ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)) != NULL) {
460 1.1 ad SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
461 1.1 ad break;
462 1.1 ad }
463 1.1 ad if (nosleep) {
464 1.1 ad ccb = NULL;
465 1.1 ad break;
466 1.1 ad }
467 1.1 ad tsleep(&sc->sc_ccb_free, PRIBIO, "cacccb", 0);
468 1.1 ad }
469 1.1 ad
470 1.1 ad splx(s);
471 1.1 ad return (ccb);
472 1.1 ad }
473 1.1 ad
474 1.1 ad /*
475 1.1 ad * Put a CCB onto the freelist.
476 1.1 ad */
477 1.1 ad void
478 1.10 ad cac_ccb_free(struct cac_softc *sc, struct cac_ccb *ccb)
479 1.1 ad {
480 1.1 ad int s;
481 1.1 ad
482 1.13 ad ccb->ccb_flags = 0;
483 1.1 ad s = splbio();
484 1.1 ad SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
485 1.1 ad if (SIMPLEQ_NEXT(ccb, ccb_chain) == NULL)
486 1.10 ad wakeup_one(&sc->sc_ccb_free);
487 1.1 ad splx(s);
488 1.10 ad }
489 1.10 ad
490 1.10 ad /*
491 1.10 ad * Board specific linkage shared between multiple bus types.
492 1.10 ad */
493 1.10 ad
494 1.10 ad static int
495 1.10 ad cac_l0_fifo_full(struct cac_softc *sc)
496 1.10 ad {
497 1.10 ad
498 1.10 ad return (cac_inl(sc, CAC_REG_CMD_FIFO) == 0);
499 1.10 ad }
500 1.10 ad
501 1.10 ad static void
502 1.10 ad cac_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
503 1.10 ad {
504 1.10 ad
505 1.10 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, (caddr_t)ccb - sc->sc_ccbs,
506 1.10 ad sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
507 1.10 ad cac_outl(sc, CAC_REG_CMD_FIFO, ccb->ccb_paddr);
508 1.10 ad }
509 1.10 ad
510 1.10 ad static struct cac_ccb *
511 1.10 ad cac_l0_completed(struct cac_softc *sc)
512 1.10 ad {
513 1.10 ad struct cac_ccb *ccb;
514 1.10 ad paddr_t off;
515 1.10 ad
516 1.10 ad off = (cac_inl(sc, CAC_REG_DONE_FIFO) & ~3) - sc->sc_ccbs_paddr;
517 1.10 ad ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
518 1.10 ad
519 1.10 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
520 1.10 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
521 1.10 ad
522 1.10 ad return (ccb);
523 1.10 ad }
524 1.10 ad
525 1.10 ad static int
526 1.10 ad cac_l0_intr_pending(struct cac_softc *sc)
527 1.10 ad {
528 1.10 ad
529 1.10 ad return (cac_inl(sc, CAC_REG_INTR_PENDING));
530 1.10 ad }
531 1.10 ad
532 1.10 ad static void
533 1.10 ad cac_l0_intr_enable(struct cac_softc *sc, int state)
534 1.10 ad {
535 1.10 ad
536 1.10 ad cac_outl(sc, CAC_REG_INTR_MASK,
537 1.10 ad state ? CAC_INTR_ENABLE : CAC_INTR_DISABLE);
538 1.1 ad }
539