cac.c revision 1.2 1 1.2 ad /* $NetBSD: cac.c,v 1.2 2000/03/20 18:48:34 ad Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.1 ad * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.1 ad * by Andy Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad * 3. All advertising materials mentioning features or use of this software
19 1.1 ad * must display the following acknowledgement:
20 1.1 ad * This product includes software developed by the NetBSD
21 1.1 ad * Foundation, Inc. and its contributors.
22 1.1 ad * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 ad * contributors may be used to endorse or promote products derived
24 1.1 ad * from this software without specific prior written permission.
25 1.1 ad *
26 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
37 1.1 ad */
38 1.1 ad
39 1.1 ad /*
40 1.1 ad * Driver for Compaq array controllers.
41 1.1 ad */
42 1.1 ad
43 1.1 ad #include <sys/cdefs.h>
44 1.2 ad __KERNEL_RCSID(0, "$NetBSD: cac.c,v 1.2 2000/03/20 18:48:34 ad Exp $");
45 1.1 ad
46 1.1 ad #include <sys/param.h>
47 1.1 ad #include <sys/systm.h>
48 1.1 ad #include <sys/kernel.h>
49 1.1 ad #include <sys/device.h>
50 1.1 ad #include <sys/queue.h>
51 1.1 ad #include <sys/proc.h>
52 1.1 ad #include <sys/buf.h>
53 1.1 ad #include <sys/endian.h>
54 1.1 ad #include <sys/malloc.h>
55 1.1 ad #include <sys/pool.h>
56 1.1 ad
57 1.1 ad #include <machine/bswap.h>
58 1.1 ad #include <machine/bus.h>
59 1.1 ad
60 1.1 ad #include <dev/ic/cacreg.h>
61 1.1 ad #include <dev/ic/cacvar.h>
62 1.1 ad
63 1.1 ad static void cac_ccb_done __P((struct cac_softc *, struct cac_ccb *));
64 1.1 ad static int cac_print __P((void *, const char *));
65 1.1 ad static int cac_submatch __P((struct device *, struct cfdata *, void *));
66 1.1 ad static void cac_ccb_poll __P((struct cac_softc *, struct cac_ccb *, int));
67 1.1 ad static void cac_shutdown __P((void *));
68 1.1 ad
69 1.2 ad static SIMPLEQ_HEAD(, cac_softc) cac_hba; /* list of HBA softc's */
70 1.1 ad static void *cac_sdh; /* shutdown hook */
71 1.1 ad
72 1.1 ad /*
73 1.1 ad * Initialise our interface to the controller.
74 1.1 ad */
75 1.1 ad int
76 1.1 ad cac_init(sc, intrstr)
77 1.1 ad struct cac_softc *sc;
78 1.1 ad const char *intrstr;
79 1.1 ad {
80 1.1 ad struct cac_controller_info cinfo;
81 1.1 ad struct cac_attach_args caca;
82 1.1 ad int error, rseg, size, i;
83 1.1 ad bus_dma_segment_t seg;
84 1.1 ad struct cac_ccb *ccb;
85 1.1 ad
86 1.1 ad printf("Compaq %s\n", sc->sc_typestr);
87 1.1 ad if (intrstr != NULL)
88 1.1 ad printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname, intrstr);
89 1.1 ad
90 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_free);
91 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_queue);
92 1.1 ad
93 1.1 ad size = sizeof(struct cac_ccb) * CAC_MAX_CCBS;
94 1.1 ad
95 1.1 ad if ((error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, 0, &seg, 1,
96 1.1 ad &rseg, BUS_DMA_NOWAIT)) != 0) {
97 1.1 ad printf("%s: unable to allocate CCBs, error = %d\n",
98 1.1 ad sc->sc_dv.dv_xname, error);
99 1.1 ad return (-1);
100 1.1 ad }
101 1.1 ad
102 1.1 ad if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
103 1.1 ad (caddr_t *)&sc->sc_ccbs, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
104 1.1 ad printf("%s: unable to map CCBs, error = %d\n",
105 1.1 ad sc->sc_dv.dv_xname, error);
106 1.1 ad return (-1);
107 1.1 ad }
108 1.1 ad
109 1.1 ad if ((error = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0,
110 1.1 ad BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
111 1.1 ad printf("%s: unable to create CCB DMA map, error = %d\n",
112 1.1 ad sc->sc_dv.dv_xname, error);
113 1.1 ad return (-1);
114 1.1 ad }
115 1.1 ad
116 1.1 ad if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ccbs,
117 1.1 ad size, NULL, BUS_DMA_NOWAIT)) != 0) {
118 1.1 ad printf("%s: unable to load CCB DMA map, error = %d\n",
119 1.1 ad sc->sc_dv.dv_xname, error);
120 1.1 ad return (-1);
121 1.1 ad }
122 1.1 ad
123 1.1 ad sc->sc_ccbs_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
124 1.1 ad memset(sc->sc_ccbs, 0, size);
125 1.1 ad ccb = (struct cac_ccb *)sc->sc_ccbs;
126 1.1 ad
127 1.1 ad for (i = 0; i < CAC_MAX_CCBS; i++, ccb++) {
128 1.1 ad /* Create the DMA map for this CCB's data */
129 1.1 ad error = bus_dmamap_create(sc->sc_dmat, CAC_MAX_XFER,
130 1.1 ad CAC_SG_SIZE, CAC_MAX_XFER, 0,
131 1.1 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap_xfer);
132 1.1 ad
133 1.1 ad if (error) {
134 1.1 ad printf("%s: can't create ccb dmamap (%d)\n",
135 1.1 ad sc->sc_dv.dv_xname, error);
136 1.1 ad break;
137 1.1 ad }
138 1.1 ad
139 1.1 ad ccb->ccb_flags = 0;
140 1.1 ad ccb->ccb_paddr = sc->sc_ccbs_paddr + i * sizeof(struct cac_ccb);
141 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_chain);
142 1.1 ad }
143 1.1 ad
144 1.1 ad if (cac_cmd(sc, CAC_CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 0, 0,
145 1.1 ad CAC_CCB_DATA_IN, NULL)) {
146 1.1 ad printf("%s: CAC_CMD_GET_CTRL_INFO failed\n",
147 1.1 ad sc->sc_dv.dv_xname);
148 1.1 ad return (-1);
149 1.1 ad }
150 1.1 ad
151 1.1 ad for (i = 0; i < cinfo.num_drvs; i++) {
152 1.1 ad caca.caca_unit = i;
153 1.1 ad config_found_sm(&sc->sc_dv, &caca, cac_print, cac_submatch);
154 1.1 ad }
155 1.1 ad
156 1.1 ad /* Set shutdownhook before we start any device activity. */
157 1.1 ad if (cac_sdh == NULL) {
158 1.1 ad SIMPLEQ_INIT(&cac_hba);
159 1.1 ad cac_sdh = shutdownhook_establish(cac_shutdown, NULL);
160 1.1 ad }
161 1.1 ad
162 1.1 ad sc->sc_cl->cl_intr_enable(sc, CAC_INT_ENABLE);
163 1.1 ad SIMPLEQ_INSERT_HEAD(&cac_hba, sc, sc_chain);
164 1.1 ad return (0);
165 1.1 ad }
166 1.1 ad
167 1.1 ad /*
168 1.1 ad * Shutdown the controller.
169 1.1 ad */
170 1.1 ad static void
171 1.1 ad cac_shutdown(cookie)
172 1.1 ad void *cookie;
173 1.1 ad {
174 1.1 ad struct cac_softc *sc;
175 1.1 ad char buf[512];
176 1.1 ad
177 1.1 ad printf("shutting down cac devices...");
178 1.1 ad
179 1.1 ad for (sc = SIMPLEQ_FIRST(&cac_hba); sc != NULL;
180 1.1 ad sc = SIMPLEQ_NEXT(sc, sc_chain)) {
181 1.1 ad /* XXX documentation on this is a bit fuzzy. */
182 1.1 ad memset(buf, 0, sizeof (buf));
183 1.1 ad buf[0] = 1;
184 1.1 ad cac_cmd(sc, CAC_CMD_FLUSH_CACHE, buf, sizeof(buf), 0, 0,
185 1.1 ad CAC_CCB_DATA_OUT, NULL);
186 1.1 ad }
187 1.1 ad
188 1.1 ad DELAY(5000*1000);
189 1.1 ad printf(" done\n");
190 1.1 ad }
191 1.1 ad
192 1.1 ad /*
193 1.1 ad * Print attach message for a subdevice.
194 1.1 ad */
195 1.1 ad static int
196 1.1 ad cac_print(aux, pnp)
197 1.1 ad void *aux;
198 1.1 ad const char *pnp;
199 1.1 ad {
200 1.1 ad struct cac_attach_args *caca;
201 1.1 ad
202 1.1 ad caca = (struct cac_attach_args *)aux;
203 1.1 ad
204 1.1 ad if (pnp)
205 1.1 ad printf("block device at %s", pnp);
206 1.1 ad printf(" unit %d", caca->caca_unit);
207 1.1 ad return (UNCONF);
208 1.1 ad }
209 1.1 ad
210 1.1 ad /*
211 1.1 ad * Match a subdevice.
212 1.1 ad */
213 1.1 ad static int
214 1.1 ad cac_submatch(parent, cf, aux)
215 1.1 ad struct device *parent;
216 1.1 ad struct cfdata *cf;
217 1.1 ad void *aux;
218 1.1 ad {
219 1.1 ad struct cac_attach_args *caca;
220 1.1 ad
221 1.1 ad caca = (struct cac_attach_args *)aux;
222 1.1 ad
223 1.1 ad if (cf->cacacf_unit != CACACF_UNIT_UNKNOWN &&
224 1.1 ad cf->cacacf_unit != caca->caca_unit)
225 1.1 ad return (0);
226 1.1 ad
227 1.1 ad return (cf->cf_attach->ca_match(parent, cf, aux));
228 1.1 ad }
229 1.1 ad
230 1.1 ad /*
231 1.1 ad * Handle an interrupt from the controller: process finished CCBs and
232 1.1 ad * dequeue any waiting CCBs.
233 1.1 ad */
234 1.1 ad int
235 1.1 ad cac_intr(xxx_sc)
236 1.1 ad void *xxx_sc;
237 1.1 ad {
238 1.1 ad struct cac_softc *sc;
239 1.1 ad struct cac_ccb *ccb;
240 1.1 ad paddr_t completed;
241 1.1 ad int off;
242 1.1 ad
243 1.1 ad sc = (struct cac_softc *)xxx_sc;
244 1.1 ad
245 1.1 ad if (!sc->sc_cl->cl_intr_pending(sc))
246 1.1 ad return (0);
247 1.1 ad
248 1.1 ad while ((completed = sc->sc_cl->cl_completed(sc)) != 0) {
249 1.1 ad off = (completed & ~3) - sc->sc_ccbs_paddr;
250 1.1 ad ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
251 1.1 ad
252 1.1 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off,
253 1.1 ad sizeof(struct cac_ccb),
254 1.1 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
255 1.1 ad
256 1.1 ad cac_ccb_done(sc, ccb);
257 1.1 ad }
258 1.1 ad
259 1.1 ad cac_ccb_start(sc, NULL);
260 1.1 ad return (1);
261 1.1 ad }
262 1.1 ad
263 1.1 ad /*
264 1.1 ad * Execute a [polled] command.
265 1.1 ad */
266 1.1 ad int
267 1.1 ad cac_cmd(sc, command, data, datasize, drive, blkno, flags, context)
268 1.1 ad struct cac_softc *sc;
269 1.1 ad int command;
270 1.1 ad void *data;
271 1.1 ad int datasize;
272 1.1 ad int drive;
273 1.1 ad int blkno;
274 1.1 ad int flags;
275 1.1 ad struct cac_context *context;
276 1.1 ad {
277 1.1 ad struct cac_ccb *ccb;
278 1.1 ad struct cac_sgb *sgb;
279 1.2 ad int s, i, rv, size, nsegs;
280 1.2 ad
281 1.2 ad size = 0;
282 1.1 ad
283 1.1 ad if ((ccb = cac_ccb_alloc(sc, 0)) == NULL) {
284 1.1 ad printf("%s: unable to alloc CCB", sc->sc_dv.dv_xname);
285 1.1 ad return (1);
286 1.1 ad }
287 1.1 ad
288 1.1 ad if ((flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
289 1.1 ad bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, (void *)data,
290 1.1 ad datasize, NULL, BUS_DMA_NOWAIT);
291 1.1 ad
292 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, datasize,
293 1.1 ad (flags & CAC_CCB_DATA_IN) != 0 ? BUS_DMASYNC_PREREAD :
294 1.1 ad BUS_DMASYNC_PREWRITE);
295 1.1 ad
296 1.1 ad sgb = ccb->ccb_seg;
297 1.2 ad nsegs = min(ccb->ccb_dmamap_xfer->dm_nsegs, CAC_SG_SIZE);
298 1.1 ad
299 1.2 ad for (i = 0; i < nsegs; i++, sgb++) {
300 1.2 ad size += ccb->ccb_dmamap_xfer->dm_segs[i].ds_len;
301 1.1 ad sgb->length =
302 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
303 1.1 ad sgb->addr =
304 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
305 1.1 ad }
306 1.2 ad } else {
307 1.2 ad size = datasize;
308 1.2 ad nsegs = 0;
309 1.1 ad }
310 1.1 ad
311 1.2 ad /* XXXDEBUG */
312 1.2 ad if (size != datasize)
313 1.2 ad printf("%s: datasize %d != %d", sc->sc_dv.dv_xname, datasize, size);
314 1.2 ad
315 1.1 ad ccb->ccb_hdr.drive = drive;
316 1.1 ad ccb->ccb_hdr.size = htole16((sizeof(struct cac_req) +
317 1.1 ad sizeof(struct cac_sgb) * CAC_SG_SIZE) >> 2);
318 1.1 ad
319 1.2 ad ccb->ccb_req.bcount = htole16(howmany(size, DEV_BSIZE));
320 1.1 ad ccb->ccb_req.command = command;
321 1.1 ad ccb->ccb_req.sgcount = i;
322 1.1 ad ccb->ccb_req.blkno = htole32(blkno);
323 1.1 ad
324 1.1 ad ccb->ccb_flags = flags;
325 1.2 ad ccb->ccb_datasize = size;
326 1.1 ad
327 1.1 ad if (context == NULL) {
328 1.1 ad memset(&ccb->ccb_context, 0, sizeof(struct cac_context));
329 1.1 ad s = splbio();
330 1.1 ad if (cac_ccb_start(sc, ccb)) {
331 1.1 ad cac_ccb_free(sc, ccb);
332 1.1 ad rv = -1;
333 1.1 ad } else {
334 1.1 ad cac_ccb_poll(sc, ccb, 2000);
335 1.1 ad cac_ccb_free(sc, ccb);
336 1.1 ad rv = 0;
337 1.1 ad }
338 1.1 ad splx(s);
339 1.1 ad } else {
340 1.1 ad memcpy(&ccb->ccb_context, context, sizeof(struct cac_context));
341 1.1 ad rv = cac_ccb_start(sc, ccb);
342 1.1 ad }
343 1.1 ad
344 1.1 ad return (rv);
345 1.1 ad }
346 1.1 ad
347 1.1 ad /*
348 1.1 ad * Wait for the specified CCB to complete. Must be called at splbio.
349 1.1 ad */
350 1.1 ad static void
351 1.1 ad cac_ccb_poll(sc, ccb, timo)
352 1.1 ad struct cac_softc *sc;
353 1.1 ad struct cac_ccb *ccb;
354 1.1 ad int timo;
355 1.1 ad {
356 1.2 ad struct cac_ccb *ccb_done;
357 1.1 ad paddr_t completed;
358 1.1 ad int off;
359 1.2 ad
360 1.2 ad ccb_done = NULL;
361 1.1 ad
362 1.1 ad for (;;) {
363 1.1 ad for (; timo != 0; timo--) {
364 1.1 ad if ((completed = sc->sc_cl->cl_completed(sc)) != 0)
365 1.1 ad break;
366 1.1 ad DELAY(100);
367 1.1 ad }
368 1.1 ad
369 1.1 ad if (timo == 0)
370 1.1 ad panic("%s: cac_ccb_poll: timeout", sc->sc_dv.dv_xname);
371 1.1 ad
372 1.1 ad off = (completed & ~3) - sc->sc_ccbs_paddr;
373 1.1 ad ccb_done = (struct cac_ccb *)(sc->sc_ccbs + off);
374 1.1 ad
375 1.1 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off,
376 1.1 ad sizeof(struct cac_ccb),
377 1.1 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
378 1.1 ad
379 1.1 ad cac_ccb_done(sc, ccb_done);
380 1.1 ad if (ccb_done == ccb)
381 1.1 ad break;
382 1.1 ad }
383 1.1 ad }
384 1.1 ad
385 1.1 ad /*
386 1.1 ad * Enqueue the specifed command (if any) and attempt to start all enqueued
387 1.1 ad * commands. Must be called at splbio.
388 1.1 ad */
389 1.1 ad int
390 1.1 ad cac_ccb_start(sc, ccb)
391 1.1 ad struct cac_softc *sc;
392 1.1 ad struct cac_ccb *ccb;
393 1.1 ad {
394 1.1 ad int s;
395 1.1 ad
396 1.1 ad s = splbio();
397 1.1 ad
398 1.1 ad if (ccb != NULL)
399 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain);
400 1.1 ad
401 1.1 ad while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) {
402 1.1 ad if (sc->sc_cl->cl_fifo_full(sc)) {
403 1.1 ad splx(s);
404 1.1 ad return (-1);
405 1.1 ad }
406 1.1 ad SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb, ccb_chain);
407 1.1 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
408 1.1 ad (caddr_t)ccb - sc->sc_ccbs, sizeof(struct cac_ccb),
409 1.1 ad BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
410 1.1 ad sc->sc_cl->cl_submit(sc, ccb->ccb_paddr);
411 1.1 ad }
412 1.1 ad
413 1.1 ad splx(s);
414 1.1 ad return (0);
415 1.1 ad }
416 1.1 ad
417 1.1 ad /*
418 1.1 ad * Process a finished CCB.
419 1.1 ad */
420 1.1 ad static void
421 1.1 ad cac_ccb_done(sc, ccb)
422 1.1 ad struct cac_softc *sc;
423 1.1 ad struct cac_ccb *ccb;
424 1.1 ad {
425 1.1 ad int error;
426 1.1 ad
427 1.1 ad error = 0;
428 1.1 ad
429 1.1 ad if ((ccb->ccb_flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
430 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
431 1.1 ad ccb->ccb_datasize, ccb->ccb_flags & CAC_CCB_DATA_IN ?
432 1.1 ad BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
433 1.1 ad bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
434 1.1 ad }
435 1.1 ad
436 1.1 ad if ((ccb->ccb_req.error & CAC_RET_SOFT_ERROR) != 0)
437 1.1 ad printf("%s: soft error\n", sc->sc_dv.dv_xname);
438 1.1 ad if ((ccb->ccb_req.error & CAC_RET_HARD_ERROR) != 0) {
439 1.1 ad error = 1;
440 1.1 ad printf("%s: hard error\n", sc->sc_dv.dv_xname);
441 1.1 ad }
442 1.1 ad if ((ccb->ccb_req.error & CAC_RET_CMD_REJECTED) != 0) {
443 1.1 ad error = 1;
444 1.1 ad printf("%s: invalid request\n", sc->sc_dv.dv_xname);
445 1.1 ad }
446 1.1 ad
447 1.1 ad if (ccb->ccb_context.cc_handler != NULL)
448 1.1 ad ccb->ccb_context.cc_handler(ccb, error);
449 1.1 ad }
450 1.1 ad
451 1.1 ad /*
452 1.1 ad * Get a free CCB.
453 1.1 ad */
454 1.1 ad struct cac_ccb *
455 1.1 ad cac_ccb_alloc(sc, nosleep)
456 1.1 ad struct cac_softc *sc;
457 1.1 ad int nosleep;
458 1.1 ad {
459 1.1 ad struct cac_ccb *ccb;
460 1.1 ad int s;
461 1.1 ad
462 1.1 ad s = splbio();
463 1.1 ad
464 1.1 ad for (;;) {
465 1.1 ad if ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)) != NULL) {
466 1.1 ad SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
467 1.1 ad break;
468 1.1 ad }
469 1.1 ad if (nosleep) {
470 1.1 ad ccb = NULL;
471 1.1 ad break;
472 1.1 ad }
473 1.1 ad tsleep(&sc->sc_ccb_free, PRIBIO, "cacccb", 0);
474 1.1 ad }
475 1.1 ad
476 1.1 ad splx(s);
477 1.1 ad return (ccb);
478 1.1 ad }
479 1.1 ad
480 1.1 ad /*
481 1.1 ad * Put a CCB onto the freelist.
482 1.1 ad */
483 1.1 ad void
484 1.1 ad cac_ccb_free(sc, ccb)
485 1.1 ad struct cac_softc *sc;
486 1.1 ad struct cac_ccb *ccb;
487 1.1 ad {
488 1.1 ad int s;
489 1.1 ad
490 1.1 ad s = splbio();
491 1.1 ad ccb->ccb_flags = 0;
492 1.1 ad SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
493 1.1 ad
494 1.1 ad /* Wake anybody waiting for a free ccb */
495 1.1 ad if (SIMPLEQ_NEXT(ccb, ccb_chain) == NULL)
496 1.1 ad wakeup(&sc->sc_ccb_free);
497 1.1 ad splx(s);
498 1.1 ad }
499 1.1 ad
500 1.1 ad /*
501 1.1 ad * Adjust the size of a transfer.
502 1.1 ad */
503 1.1 ad void
504 1.1 ad cac_minphys(bp)
505 1.1 ad struct buf *bp;
506 1.1 ad {
507 1.1 ad
508 1.2 ad if (bp->b_bcount > CAC_MAX_XFER)
509 1.2 ad bp->b_bcount = CAC_MAX_XFER;
510 1.2 ad minphys(bp);
511 1.1 ad }
512