cac.c revision 1.57 1 1.57 pgoyette /* $NetBSD: cac.c,v 1.57 2016/09/27 03:33:32 pgoyette Exp $ */
2 1.1 ad
3 1.1 ad /*-
4 1.39 ad * Copyright (c) 2000, 2006, 2007 The NetBSD Foundation, Inc.
5 1.1 ad * All rights reserved.
6 1.1 ad *
7 1.1 ad * This code is derived from software contributed to The NetBSD Foundation
8 1.6 ad * by Andrew Doran.
9 1.1 ad *
10 1.1 ad * Redistribution and use in source and binary forms, with or without
11 1.1 ad * modification, are permitted provided that the following conditions
12 1.1 ad * are met:
13 1.1 ad * 1. Redistributions of source code must retain the above copyright
14 1.1 ad * notice, this list of conditions and the following disclaimer.
15 1.1 ad * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 ad * notice, this list of conditions and the following disclaimer in the
17 1.1 ad * documentation and/or other materials provided with the distribution.
18 1.1 ad *
19 1.1 ad * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20 1.1 ad * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21 1.1 ad * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 1.1 ad * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23 1.1 ad * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 1.1 ad * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 1.1 ad * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 1.1 ad * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 1.1 ad * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 1.1 ad * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 1.1 ad * POSSIBILITY OF SUCH DAMAGE.
30 1.1 ad */
31 1.1 ad
32 1.1 ad /*
33 1.1 ad * Driver for Compaq array controllers.
34 1.1 ad */
35 1.19 lukem
36 1.19 lukem #include <sys/cdefs.h>
37 1.57 pgoyette __KERNEL_RCSID(0, "$NetBSD: cac.c,v 1.57 2016/09/27 03:33:32 pgoyette Exp $");
38 1.44 mhitch
39 1.57 pgoyette #if defined(_KERNEL_OPT)
40 1.44 mhitch #include "bio.h"
41 1.57 pgoyette #endif
42 1.1 ad
43 1.1 ad #include <sys/param.h>
44 1.1 ad #include <sys/systm.h>
45 1.1 ad #include <sys/kernel.h>
46 1.1 ad #include <sys/device.h>
47 1.1 ad #include <sys/queue.h>
48 1.1 ad #include <sys/proc.h>
49 1.1 ad #include <sys/buf.h>
50 1.1 ad #include <sys/endian.h>
51 1.1 ad #include <sys/malloc.h>
52 1.1 ad #include <sys/pool.h>
53 1.57 pgoyette #include <sys/module.h>
54 1.34 dsl #include <sys/bswap.h>
55 1.42 ad #include <sys/bus.h>
56 1.1 ad
57 1.1 ad #include <dev/ic/cacreg.h>
58 1.1 ad #include <dev/ic/cacvar.h>
59 1.1 ad
60 1.44 mhitch #if NBIO > 0
61 1.44 mhitch #include <dev/biovar.h>
62 1.44 mhitch #endif /* NBIO > 0 */
63 1.44 mhitch
64 1.28 drochner #include "locators.h"
65 1.28 drochner
66 1.27 thorpej static struct cac_ccb *cac_ccb_alloc(struct cac_softc *, int);
67 1.27 thorpej static void cac_ccb_done(struct cac_softc *, struct cac_ccb *);
68 1.27 thorpej static void cac_ccb_free(struct cac_softc *, struct cac_ccb *);
69 1.27 thorpej static int cac_ccb_poll(struct cac_softc *, struct cac_ccb *, int);
70 1.27 thorpej static int cac_ccb_start(struct cac_softc *, struct cac_ccb *);
71 1.27 thorpej static int cac_print(void *, const char *);
72 1.27 thorpej static void cac_shutdown(void *);
73 1.27 thorpej
74 1.27 thorpej static struct cac_ccb *cac_l0_completed(struct cac_softc *);
75 1.27 thorpej static int cac_l0_fifo_full(struct cac_softc *);
76 1.27 thorpej static void cac_l0_intr_enable(struct cac_softc *, int);
77 1.27 thorpej static int cac_l0_intr_pending(struct cac_softc *);
78 1.27 thorpej static void cac_l0_submit(struct cac_softc *, struct cac_ccb *);
79 1.10 ad
80 1.10 ad static void *cac_sdh; /* shutdown hook */
81 1.10 ad
82 1.44 mhitch #if NBIO > 0
83 1.49 cegger int cac_ioctl(device_t, u_long, void *);
84 1.44 mhitch int cac_ioctl_vol(struct cac_softc *, struct bioc_vol *);
85 1.44 mhitch int cac_create_sensors(struct cac_softc *);
86 1.44 mhitch void cac_sensor_refresh(struct sysmon_envsys *, envsys_data_t *);
87 1.44 mhitch #endif /* NBIO > 0 */
88 1.44 mhitch
89 1.20 ad const struct cac_linkage cac_l0 = {
90 1.10 ad cac_l0_completed,
91 1.10 ad cac_l0_fifo_full,
92 1.10 ad cac_l0_intr_enable,
93 1.10 ad cac_l0_intr_pending,
94 1.10 ad cac_l0_submit
95 1.10 ad };
96 1.1 ad
97 1.1 ad /*
98 1.1 ad * Initialise our interface to the controller.
99 1.1 ad */
100 1.1 ad int
101 1.10 ad cac_init(struct cac_softc *sc, const char *intrstr, int startfw)
102 1.1 ad {
103 1.1 ad struct cac_controller_info cinfo;
104 1.1 ad int error, rseg, size, i;
105 1.1 ad bus_dma_segment_t seg;
106 1.1 ad struct cac_ccb *ccb;
107 1.38 ad char firm[8];
108 1.29 perry
109 1.1 ad if (intrstr != NULL)
110 1.56 msaitoh aprint_normal_dev(sc->sc_dev, "interrupting at %s\n", intrstr);
111 1.1 ad
112 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_free);
113 1.1 ad SIMPLEQ_INIT(&sc->sc_ccb_queue);
114 1.43 ad mutex_init(&sc->sc_mutex, MUTEX_DEFAULT, IPL_VM);
115 1.39 ad cv_init(&sc->sc_ccb_cv, "cacccb");
116 1.1 ad
117 1.1 ad size = sizeof(struct cac_ccb) * CAC_MAX_CCBS;
118 1.1 ad
119 1.29 perry if ((error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1,
120 1.1 ad &rseg, BUS_DMA_NOWAIT)) != 0) {
121 1.54 chs aprint_error_dev(sc->sc_dev, "unable to allocate CCBs, error = %d\n",
122 1.45 cegger error);
123 1.1 ad return (-1);
124 1.1 ad }
125 1.1 ad
126 1.29 perry if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
127 1.40 christos (void **)&sc->sc_ccbs,
128 1.10 ad BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
129 1.54 chs aprint_error_dev(sc->sc_dev, "unable to map CCBs, error = %d\n",
130 1.45 cegger error);
131 1.1 ad return (-1);
132 1.1 ad }
133 1.1 ad
134 1.29 perry if ((error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
135 1.1 ad BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
136 1.54 chs aprint_error_dev(sc->sc_dev, "unable to create CCB DMA map, error = %d\n",
137 1.45 cegger error);
138 1.1 ad return (-1);
139 1.1 ad }
140 1.1 ad
141 1.29 perry if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ccbs,
142 1.1 ad size, NULL, BUS_DMA_NOWAIT)) != 0) {
143 1.54 chs aprint_error_dev(sc->sc_dev, "unable to load CCB DMA map, error = %d\n",
144 1.45 cegger error);
145 1.1 ad return (-1);
146 1.1 ad }
147 1.1 ad
148 1.1 ad sc->sc_ccbs_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
149 1.1 ad memset(sc->sc_ccbs, 0, size);
150 1.1 ad ccb = (struct cac_ccb *)sc->sc_ccbs;
151 1.1 ad
152 1.1 ad for (i = 0; i < CAC_MAX_CCBS; i++, ccb++) {
153 1.1 ad /* Create the DMA map for this CCB's data */
154 1.12 ad error = bus_dmamap_create(sc->sc_dmat, CAC_MAX_XFER,
155 1.12 ad CAC_SG_SIZE, CAC_MAX_XFER, 0,
156 1.12 ad BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW,
157 1.12 ad &ccb->ccb_dmamap_xfer);
158 1.10 ad
159 1.1 ad if (error) {
160 1.54 chs aprint_error_dev(sc->sc_dev, "can't create ccb dmamap (%d)\n",
161 1.45 cegger error);
162 1.1 ad break;
163 1.1 ad }
164 1.1 ad
165 1.1 ad ccb->ccb_flags = 0;
166 1.1 ad ccb->ccb_paddr = sc->sc_ccbs_paddr + i * sizeof(struct cac_ccb);
167 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_chain);
168 1.1 ad }
169 1.29 perry
170 1.10 ad /* Start firmware background tasks, if needed. */
171 1.10 ad if (startfw) {
172 1.10 ad if (cac_cmd(sc, CAC_CMD_START_FIRMWARE, &cinfo, sizeof(cinfo),
173 1.10 ad 0, 0, CAC_CCB_DATA_IN, NULL)) {
174 1.54 chs aprint_error_dev(sc->sc_dev, "CAC_CMD_START_FIRMWARE failed\n");
175 1.10 ad return (-1);
176 1.10 ad }
177 1.10 ad }
178 1.10 ad
179 1.29 perry if (cac_cmd(sc, CAC_CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 0, 0,
180 1.1 ad CAC_CCB_DATA_IN, NULL)) {
181 1.54 chs aprint_error_dev(sc->sc_dev, "CAC_CMD_GET_CTRL_INFO failed\n");
182 1.1 ad return (-1);
183 1.1 ad }
184 1.1 ad
185 1.38 ad strlcpy(firm, cinfo.firm_rev, 4+1);
186 1.54 chs printf("%s: %d channels, firmware <%s>\n", device_xname(sc->sc_dev),
187 1.38 ad cinfo.scsi_chips, firm);
188 1.38 ad
189 1.57 pgoyette /* Limit number of units to size of our sc_unitmask */
190 1.14 ad sc->sc_nunits = cinfo.num_drvs;
191 1.57 pgoyette if (sc->sc_nunits > sizeof(sc->sc_unitmask) * NBBY)
192 1.57 pgoyette sc->sc_nunits = sizeof(sc->sc_unitmask) * NBBY;
193 1.28 drochner
194 1.57 pgoyette /* Attach our units */
195 1.57 pgoyette sc->sc_unitmask = 0;
196 1.57 pgoyette cac_rescan(sc->sc_dev, "cac", 0);
197 1.1 ad
198 1.10 ad /* Set our `shutdownhook' before we start any device activity. */
199 1.4 ad if (cac_sdh == NULL)
200 1.1 ad cac_sdh = shutdownhook_establish(cac_shutdown, NULL);
201 1.29 perry
202 1.39 ad mutex_enter(&sc->sc_mutex);
203 1.20 ad (*sc->sc_cl.cl_intr_enable)(sc, CAC_INTR_ENABLE);
204 1.39 ad mutex_exit(&sc->sc_mutex);
205 1.39 ad
206 1.44 mhitch #if NBIO > 0
207 1.54 chs if (bio_register(sc->sc_dev, cac_ioctl) != 0)
208 1.54 chs aprint_error_dev(sc->sc_dev, "controller registration failed");
209 1.44 mhitch else
210 1.44 mhitch sc->sc_ioctl = cac_ioctl;
211 1.44 mhitch if (cac_create_sensors(sc) != 0)
212 1.54 chs aprint_error_dev(sc->sc_dev, "unable to create sensors\n");
213 1.44 mhitch #endif
214 1.44 mhitch
215 1.1 ad return (0);
216 1.1 ad }
217 1.1 ad
218 1.57 pgoyette int
219 1.57 pgoyette cac_rescan(device_t self, const char *attr, const int *flags)
220 1.57 pgoyette {
221 1.57 pgoyette struct cac_softc *sc;
222 1.57 pgoyette struct cac_attach_args caca;
223 1.57 pgoyette int locs[CACCF_NLOCS];
224 1.57 pgoyette int i;
225 1.57 pgoyette
226 1.57 pgoyette sc = device_private(self);
227 1.57 pgoyette for (i = 0; i < sc->sc_nunits; i++) {
228 1.57 pgoyette if (sc->sc_unitmask & (1 << i))
229 1.57 pgoyette continue;
230 1.57 pgoyette caca.caca_unit = i;
231 1.57 pgoyette
232 1.57 pgoyette locs[CACCF_UNIT] = i;
233 1.57 pgoyette
234 1.57 pgoyette if (config_found_sm_loc(self, attr, locs, &caca, cac_print,
235 1.57 pgoyette config_stdsubmatch))
236 1.57 pgoyette sc->sc_unitmask |= 1 << i;
237 1.57 pgoyette }
238 1.57 pgoyette return 0;
239 1.57 pgoyette }
240 1.57 pgoyette
241 1.1 ad /*
242 1.10 ad * Shut down all `cac' controllers.
243 1.1 ad */
244 1.27 thorpej static void
245 1.36 christos cac_shutdown(void *cookie)
246 1.1 ad {
247 1.4 ad extern struct cfdriver cac_cd;
248 1.1 ad struct cac_softc *sc;
249 1.30 christos u_int8_t tbuf[512];
250 1.4 ad int i;
251 1.1 ad
252 1.4 ad for (i = 0; i < cac_cd.cd_ndevs; i++) {
253 1.47 tsutsui if ((sc = device_lookup_private(&cac_cd, i)) == NULL)
254 1.29 perry continue;
255 1.30 christos memset(tbuf, 0, sizeof(tbuf));
256 1.30 christos tbuf[0] = 1;
257 1.30 christos cac_cmd(sc, CAC_CMD_FLUSH_CACHE, tbuf, sizeof(tbuf), 0, 0,
258 1.1 ad CAC_CCB_DATA_OUT, NULL);
259 1.1 ad }
260 1.29 perry }
261 1.1 ad
262 1.1 ad /*
263 1.10 ad * Print autoconfiguration message for a sub-device.
264 1.1 ad */
265 1.27 thorpej static int
266 1.10 ad cac_print(void *aux, const char *pnp)
267 1.1 ad {
268 1.1 ad struct cac_attach_args *caca;
269 1.1 ad
270 1.1 ad caca = (struct cac_attach_args *)aux;
271 1.1 ad
272 1.10 ad if (pnp != NULL)
273 1.23 thorpej aprint_normal("block device at %s", pnp);
274 1.23 thorpej aprint_normal(" unit %d", caca->caca_unit);
275 1.1 ad return (UNCONF);
276 1.1 ad }
277 1.1 ad
278 1.1 ad /*
279 1.1 ad * Handle an interrupt from the controller: process finished CCBs and
280 1.1 ad * dequeue any waiting CCBs.
281 1.1 ad */
282 1.1 ad int
283 1.10 ad cac_intr(void *cookie)
284 1.1 ad {
285 1.1 ad struct cac_softc *sc;
286 1.1 ad struct cac_ccb *ccb;
287 1.39 ad int rv;
288 1.1 ad
289 1.54 chs sc = cookie;
290 1.1 ad
291 1.39 ad mutex_enter(&sc->sc_mutex);
292 1.39 ad
293 1.39 ad if ((*sc->sc_cl.cl_intr_pending)(sc)) {
294 1.39 ad while ((ccb = (*sc->sc_cl.cl_completed)(sc)) != NULL) {
295 1.39 ad cac_ccb_done(sc, ccb);
296 1.39 ad cac_ccb_start(sc, NULL);
297 1.39 ad }
298 1.39 ad rv = 1;
299 1.39 ad } else
300 1.39 ad rv = 0;
301 1.1 ad
302 1.39 ad mutex_exit(&sc->sc_mutex);
303 1.1 ad
304 1.39 ad return (rv);
305 1.1 ad }
306 1.1 ad
307 1.1 ad /*
308 1.1 ad * Execute a [polled] command.
309 1.1 ad */
310 1.1 ad int
311 1.10 ad cac_cmd(struct cac_softc *sc, int command, void *data, int datasize,
312 1.10 ad int drive, int blkno, int flags, struct cac_context *context)
313 1.1 ad {
314 1.1 ad struct cac_ccb *ccb;
315 1.1 ad struct cac_sgb *sgb;
316 1.39 ad int i, rv, size, nsegs;
317 1.2 ad
318 1.2 ad size = 0;
319 1.1 ad
320 1.26 pk if ((ccb = cac_ccb_alloc(sc, 1)) == NULL) {
321 1.54 chs aprint_error_dev(sc->sc_dev, "unable to alloc CCB");
322 1.26 pk return (EAGAIN);
323 1.1 ad }
324 1.1 ad
325 1.1 ad if ((flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
326 1.10 ad bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer,
327 1.17 thorpej (void *)data, datasize, NULL, BUS_DMA_NOWAIT |
328 1.18 thorpej BUS_DMA_STREAMING | ((flags & CAC_CCB_DATA_IN) ?
329 1.18 thorpej BUS_DMA_READ : BUS_DMA_WRITE));
330 1.10 ad
331 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, datasize,
332 1.1 ad (flags & CAC_CCB_DATA_IN) != 0 ? BUS_DMASYNC_PREREAD :
333 1.1 ad BUS_DMASYNC_PREWRITE);
334 1.29 perry
335 1.1 ad sgb = ccb->ccb_seg;
336 1.2 ad nsegs = min(ccb->ccb_dmamap_xfer->dm_nsegs, CAC_SG_SIZE);
337 1.1 ad
338 1.2 ad for (i = 0; i < nsegs; i++, sgb++) {
339 1.2 ad size += ccb->ccb_dmamap_xfer->dm_segs[i].ds_len;
340 1.29 perry sgb->length =
341 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
342 1.29 perry sgb->addr =
343 1.1 ad htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
344 1.1 ad }
345 1.2 ad } else {
346 1.2 ad size = datasize;
347 1.2 ad nsegs = 0;
348 1.1 ad }
349 1.2 ad
350 1.1 ad ccb->ccb_hdr.drive = drive;
351 1.37 ad ccb->ccb_hdr.priority = 0;
352 1.29 perry ccb->ccb_hdr.size = htole16((sizeof(struct cac_req) +
353 1.1 ad sizeof(struct cac_sgb) * CAC_SG_SIZE) >> 2);
354 1.1 ad
355 1.37 ad ccb->ccb_req.next = 0;
356 1.37 ad ccb->ccb_req.error = 0;
357 1.37 ad ccb->ccb_req.reserved = 0;
358 1.2 ad ccb->ccb_req.bcount = htole16(howmany(size, DEV_BSIZE));
359 1.1 ad ccb->ccb_req.command = command;
360 1.5 thorpej ccb->ccb_req.sgcount = nsegs;
361 1.1 ad ccb->ccb_req.blkno = htole32(blkno);
362 1.29 perry
363 1.1 ad ccb->ccb_flags = flags;
364 1.2 ad ccb->ccb_datasize = size;
365 1.1 ad
366 1.39 ad mutex_enter(&sc->sc_mutex);
367 1.39 ad
368 1.1 ad if (context == NULL) {
369 1.1 ad memset(&ccb->ccb_context, 0, sizeof(struct cac_context));
370 1.10 ad
371 1.10 ad /* Synchronous commands musn't wait. */
372 1.20 ad if ((*sc->sc_cl.cl_fifo_full)(sc)) {
373 1.1 ad cac_ccb_free(sc, ccb);
374 1.26 pk rv = EAGAIN;
375 1.1 ad } else {
376 1.12 ad #ifdef DIAGNOSTIC
377 1.12 ad ccb->ccb_flags |= CAC_CCB_ACTIVE;
378 1.12 ad #endif
379 1.20 ad (*sc->sc_cl.cl_submit)(sc, ccb);
380 1.13 ad rv = cac_ccb_poll(sc, ccb, 2000);
381 1.1 ad cac_ccb_free(sc, ccb);
382 1.1 ad }
383 1.1 ad } else {
384 1.1 ad memcpy(&ccb->ccb_context, context, sizeof(struct cac_context));
385 1.26 pk (void)cac_ccb_start(sc, ccb);
386 1.26 pk rv = 0;
387 1.1 ad }
388 1.29 perry
389 1.39 ad mutex_exit(&sc->sc_mutex);
390 1.1 ad return (rv);
391 1.1 ad }
392 1.1 ad
393 1.1 ad /*
394 1.39 ad * Wait for the specified CCB to complete.
395 1.1 ad */
396 1.27 thorpej static int
397 1.10 ad cac_ccb_poll(struct cac_softc *sc, struct cac_ccb *wantccb, int timo)
398 1.10 ad {
399 1.1 ad struct cac_ccb *ccb;
400 1.13 ad
401 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
402 1.39 ad
403 1.38 ad timo *= 1000;
404 1.1 ad
405 1.10 ad do {
406 1.10 ad for (; timo != 0; timo--) {
407 1.20 ad ccb = (*sc->sc_cl.cl_completed)(sc);
408 1.20 ad if (ccb != NULL)
409 1.1 ad break;
410 1.38 ad DELAY(1);
411 1.1 ad }
412 1.1 ad
413 1.13 ad if (timo == 0) {
414 1.54 chs printf("%s: timeout\n", device_xname(sc->sc_dev));
415 1.13 ad return (EBUSY);
416 1.13 ad }
417 1.10 ad cac_ccb_done(sc, ccb);
418 1.10 ad } while (ccb != wantccb);
419 1.13 ad
420 1.13 ad return (0);
421 1.1 ad }
422 1.1 ad
423 1.1 ad /*
424 1.29 perry * Enqueue the specified command (if any) and attempt to start all enqueued
425 1.39 ad * commands.
426 1.1 ad */
427 1.27 thorpej static int
428 1.10 ad cac_ccb_start(struct cac_softc *sc, struct cac_ccb *ccb)
429 1.1 ad {
430 1.10 ad
431 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
432 1.39 ad
433 1.1 ad if (ccb != NULL)
434 1.1 ad SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain);
435 1.1 ad
436 1.1 ad while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) {
437 1.20 ad if ((*sc->sc_cl.cl_fifo_full)(sc))
438 1.26 pk return (EAGAIN);
439 1.21 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb_chain);
440 1.10 ad #ifdef DIAGNOSTIC
441 1.10 ad ccb->ccb_flags |= CAC_CCB_ACTIVE;
442 1.10 ad #endif
443 1.20 ad (*sc->sc_cl.cl_submit)(sc, ccb);
444 1.1 ad }
445 1.29 perry
446 1.1 ad return (0);
447 1.1 ad }
448 1.1 ad
449 1.1 ad /*
450 1.1 ad * Process a finished CCB.
451 1.1 ad */
452 1.27 thorpej static void
453 1.10 ad cac_ccb_done(struct cac_softc *sc, struct cac_ccb *ccb)
454 1.1 ad {
455 1.49 cegger device_t dv;
456 1.14 ad void *context;
457 1.1 ad int error;
458 1.1 ad
459 1.1 ad error = 0;
460 1.1 ad
461 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
462 1.39 ad
463 1.10 ad #ifdef DIAGNOSTIC
464 1.10 ad if ((ccb->ccb_flags & CAC_CCB_ACTIVE) == 0)
465 1.10 ad panic("cac_ccb_done: CCB not active");
466 1.10 ad ccb->ccb_flags &= ~CAC_CCB_ACTIVE;
467 1.10 ad #endif
468 1.10 ad
469 1.1 ad if ((ccb->ccb_flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
470 1.1 ad bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
471 1.1 ad ccb->ccb_datasize, ccb->ccb_flags & CAC_CCB_DATA_IN ?
472 1.1 ad BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
473 1.1 ad bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
474 1.1 ad }
475 1.1 ad
476 1.16 ad error = ccb->ccb_req.error;
477 1.10 ad if (ccb->ccb_context.cc_handler != NULL) {
478 1.14 ad dv = ccb->ccb_context.cc_dv;
479 1.14 ad context = ccb->ccb_context.cc_context;
480 1.10 ad cac_ccb_free(sc, ccb);
481 1.14 ad (*ccb->ccb_context.cc_handler)(dv, context, error);
482 1.16 ad } else {
483 1.16 ad if ((error & CAC_RET_SOFT_ERROR) != 0)
484 1.54 chs aprint_error_dev(sc->sc_dev, "soft error; array may be degraded\n");
485 1.16 ad if ((error & CAC_RET_HARD_ERROR) != 0)
486 1.54 chs aprint_error_dev(sc->sc_dev, "hard error\n");
487 1.16 ad if ((error & CAC_RET_CMD_REJECTED) != 0) {
488 1.16 ad error = 1;
489 1.54 chs aprint_error_dev(sc->sc_dev, "invalid request\n");
490 1.16 ad }
491 1.10 ad }
492 1.1 ad }
493 1.1 ad
494 1.1 ad /*
495 1.10 ad * Allocate a CCB.
496 1.1 ad */
497 1.27 thorpej static struct cac_ccb *
498 1.10 ad cac_ccb_alloc(struct cac_softc *sc, int nosleep)
499 1.1 ad {
500 1.1 ad struct cac_ccb *ccb;
501 1.1 ad
502 1.39 ad mutex_enter(&sc->sc_mutex);
503 1.1 ad
504 1.1 ad for (;;) {
505 1.1 ad if ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)) != NULL) {
506 1.21 lukem SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb_chain);
507 1.1 ad break;
508 1.1 ad }
509 1.1 ad if (nosleep) {
510 1.1 ad ccb = NULL;
511 1.1 ad break;
512 1.1 ad }
513 1.39 ad cv_wait(&sc->sc_ccb_cv, &sc->sc_mutex);
514 1.1 ad }
515 1.1 ad
516 1.39 ad mutex_exit(&sc->sc_mutex);
517 1.1 ad return (ccb);
518 1.1 ad }
519 1.1 ad
520 1.1 ad /*
521 1.1 ad * Put a CCB onto the freelist.
522 1.1 ad */
523 1.27 thorpej static void
524 1.10 ad cac_ccb_free(struct cac_softc *sc, struct cac_ccb *ccb)
525 1.1 ad {
526 1.39 ad
527 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
528 1.1 ad
529 1.13 ad ccb->ccb_flags = 0;
530 1.39 ad if (SIMPLEQ_EMPTY(&sc->sc_ccb_free))
531 1.39 ad cv_signal(&sc->sc_ccb_cv);
532 1.1 ad SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
533 1.10 ad }
534 1.10 ad
535 1.10 ad /*
536 1.10 ad * Board specific linkage shared between multiple bus types.
537 1.10 ad */
538 1.10 ad
539 1.27 thorpej static int
540 1.10 ad cac_l0_fifo_full(struct cac_softc *sc)
541 1.10 ad {
542 1.10 ad
543 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
544 1.39 ad
545 1.10 ad return (cac_inl(sc, CAC_REG_CMD_FIFO) == 0);
546 1.10 ad }
547 1.10 ad
548 1.27 thorpej static void
549 1.10 ad cac_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
550 1.10 ad {
551 1.10 ad
552 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
553 1.39 ad
554 1.40 christos bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
555 1.40 christos (char *)ccb - (char *)sc->sc_ccbs,
556 1.10 ad sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
557 1.10 ad cac_outl(sc, CAC_REG_CMD_FIFO, ccb->ccb_paddr);
558 1.10 ad }
559 1.10 ad
560 1.27 thorpej static struct cac_ccb *
561 1.10 ad cac_l0_completed(struct cac_softc *sc)
562 1.10 ad {
563 1.10 ad struct cac_ccb *ccb;
564 1.10 ad paddr_t off;
565 1.10 ad
566 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
567 1.39 ad
568 1.20 ad if ((off = cac_inl(sc, CAC_REG_DONE_FIFO)) == 0)
569 1.20 ad return (NULL);
570 1.20 ad
571 1.20 ad if ((off & 3) != 0)
572 1.54 chs aprint_error_dev(sc->sc_dev, "failed command list returned: %lx\n",
573 1.45 cegger (long)off);
574 1.20 ad
575 1.20 ad off = (off & ~3) - sc->sc_ccbs_paddr;
576 1.40 christos ccb = (struct cac_ccb *)((char *)sc->sc_ccbs + off);
577 1.10 ad
578 1.10 ad bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
579 1.10 ad BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
580 1.10 ad
581 1.37 ad if ((off & 3) != 0 && ccb->ccb_req.error == 0)
582 1.37 ad ccb->ccb_req.error = CAC_RET_CMD_REJECTED;
583 1.37 ad
584 1.10 ad return (ccb);
585 1.10 ad }
586 1.10 ad
587 1.27 thorpej static int
588 1.10 ad cac_l0_intr_pending(struct cac_softc *sc)
589 1.10 ad {
590 1.10 ad
591 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
592 1.39 ad
593 1.20 ad return (cac_inl(sc, CAC_REG_INTR_PENDING) & CAC_INTR_ENABLE);
594 1.10 ad }
595 1.10 ad
596 1.27 thorpej static void
597 1.10 ad cac_l0_intr_enable(struct cac_softc *sc, int state)
598 1.10 ad {
599 1.10 ad
600 1.41 ad KASSERT(mutex_owned(&sc->sc_mutex));
601 1.39 ad
602 1.10 ad cac_outl(sc, CAC_REG_INTR_MASK,
603 1.10 ad state ? CAC_INTR_ENABLE : CAC_INTR_DISABLE);
604 1.1 ad }
605 1.44 mhitch
606 1.44 mhitch #if NBIO > 0
607 1.44 mhitch const int cac_level[] = { 0, 4, 1, 5, 51, 7 };
608 1.44 mhitch const int cac_stat[] = { BIOC_SVONLINE, BIOC_SVOFFLINE, BIOC_SVOFFLINE,
609 1.44 mhitch BIOC_SVDEGRADED, BIOC_SVREBUILD, BIOC_SVREBUILD, BIOC_SVDEGRADED,
610 1.44 mhitch BIOC_SVDEGRADED, BIOC_SVINVALID, BIOC_SVINVALID, BIOC_SVBUILDING,
611 1.44 mhitch BIOC_SVOFFLINE, BIOC_SVBUILDING };
612 1.44 mhitch
613 1.44 mhitch int
614 1.49 cegger cac_ioctl(device_t dev, u_long cmd, void *addr)
615 1.44 mhitch {
616 1.54 chs struct cac_softc *sc = device_private(dev);
617 1.44 mhitch struct bioc_inq *bi;
618 1.44 mhitch struct bioc_disk *bd;
619 1.44 mhitch cac_lock_t lock;
620 1.44 mhitch int error = 0;
621 1.44 mhitch
622 1.44 mhitch lock = CAC_LOCK(sc);
623 1.44 mhitch switch (cmd) {
624 1.44 mhitch case BIOCINQ:
625 1.44 mhitch bi = (struct bioc_inq *)addr;
626 1.54 chs strlcpy(bi->bi_dev, device_xname(sc->sc_dev), sizeof(bi->bi_dev));
627 1.44 mhitch bi->bi_novol = sc->sc_nunits;
628 1.44 mhitch bi->bi_nodisk = 0;
629 1.44 mhitch break;
630 1.44 mhitch
631 1.44 mhitch case BIOCVOL:
632 1.44 mhitch error = cac_ioctl_vol(sc, (struct bioc_vol *)addr);
633 1.44 mhitch break;
634 1.44 mhitch
635 1.44 mhitch case BIOCDISK:
636 1.44 mhitch case BIOCDISK_NOVOL:
637 1.44 mhitch bd = (struct bioc_disk *)addr;
638 1.44 mhitch if (bd->bd_volid > sc->sc_nunits) {
639 1.44 mhitch error = EINVAL;
640 1.44 mhitch break;
641 1.44 mhitch }
642 1.44 mhitch /* No disk information yet */
643 1.44 mhitch break;
644 1.44 mhitch
645 1.44 mhitch case BIOCBLINK:
646 1.44 mhitch case BIOCALARM:
647 1.44 mhitch case BIOCSETSTATE:
648 1.44 mhitch default:
649 1.44 mhitch error = EINVAL;
650 1.44 mhitch }
651 1.44 mhitch CAC_UNLOCK(sc, lock);
652 1.44 mhitch
653 1.44 mhitch return (error);
654 1.44 mhitch }
655 1.44 mhitch
656 1.44 mhitch int
657 1.44 mhitch cac_ioctl_vol(struct cac_softc *sc, struct bioc_vol *bv)
658 1.44 mhitch {
659 1.44 mhitch struct cac_drive_info dinfo;
660 1.44 mhitch struct cac_drive_status dstatus;
661 1.44 mhitch u_int32_t blks;
662 1.44 mhitch
663 1.44 mhitch if (bv->bv_volid > sc->sc_nunits) {
664 1.44 mhitch return EINVAL;
665 1.44 mhitch }
666 1.44 mhitch if (cac_cmd(sc, CAC_CMD_GET_LOG_DRV_INFO, &dinfo, sizeof(dinfo),
667 1.44 mhitch bv->bv_volid, 0, CAC_CCB_DATA_IN, NULL)) {
668 1.44 mhitch return EIO;
669 1.44 mhitch }
670 1.44 mhitch if (cac_cmd(sc, CAC_CMD_SENSE_DRV_STATUS, &dstatus, sizeof(dstatus),
671 1.44 mhitch bv->bv_volid, 0, CAC_CCB_DATA_IN, NULL)) {
672 1.44 mhitch return EIO;
673 1.44 mhitch }
674 1.44 mhitch blks = CAC_GET2(dinfo.ncylinders) * CAC_GET1(dinfo.nheads) *
675 1.44 mhitch CAC_GET1(dinfo.nsectors);
676 1.44 mhitch bv->bv_size = (off_t)blks * CAC_GET2(dinfo.secsize);
677 1.44 mhitch bv->bv_level = cac_level[CAC_GET1(dinfo.mirror)]; /*XXX limit check */
678 1.44 mhitch bv->bv_nodisk = 0; /* XXX */
679 1.44 mhitch bv->bv_status = 0; /* XXX */
680 1.44 mhitch bv->bv_percent = -1;
681 1.44 mhitch bv->bv_seconds = 0;
682 1.44 mhitch if (dstatus.stat < sizeof(cac_stat)/sizeof(cac_stat[0]))
683 1.44 mhitch bv->bv_status = cac_stat[dstatus.stat];
684 1.44 mhitch if (bv->bv_status == BIOC_SVREBUILD ||
685 1.44 mhitch bv->bv_status == BIOC_SVBUILDING)
686 1.44 mhitch bv->bv_percent = ((blks - CAC_GET4(dstatus.prog)) * 1000ULL) /
687 1.44 mhitch blks;
688 1.44 mhitch return 0;
689 1.44 mhitch }
690 1.44 mhitch
691 1.44 mhitch int
692 1.44 mhitch cac_create_sensors(struct cac_softc *sc)
693 1.44 mhitch {
694 1.44 mhitch int i;
695 1.44 mhitch int nsensors = sc->sc_nunits;
696 1.44 mhitch
697 1.44 mhitch sc->sc_sme = sysmon_envsys_create();
698 1.44 mhitch sc->sc_sensor = malloc(sizeof(envsys_data_t) * nsensors,
699 1.44 mhitch M_DEVBUF, M_NOWAIT | M_ZERO);
700 1.44 mhitch if (sc->sc_sensor == NULL) {
701 1.54 chs aprint_error_dev(sc->sc_dev, "can't allocate envsys_data_t\n");
702 1.44 mhitch return(ENOMEM);
703 1.44 mhitch }
704 1.44 mhitch
705 1.44 mhitch for (i = 0; i < nsensors; i++) {
706 1.44 mhitch sc->sc_sensor[i].units = ENVSYS_DRIVE;
707 1.52 pgoyette sc->sc_sensor[i].state = ENVSYS_SINVALID;
708 1.53 pgoyette sc->sc_sensor[i].value_cur = ENVSYS_DRIVE_EMPTY;
709 1.44 mhitch /* Enable monitoring for drive state changes */
710 1.44 mhitch sc->sc_sensor[i].flags |= ENVSYS_FMONSTCHANGED;
711 1.44 mhitch /* logical drives */
712 1.44 mhitch snprintf(sc->sc_sensor[i].desc,
713 1.44 mhitch sizeof(sc->sc_sensor[i].desc), "%s:%d",
714 1.54 chs device_xname(sc->sc_dev), i);
715 1.44 mhitch if (sysmon_envsys_sensor_attach(sc->sc_sme,
716 1.44 mhitch &sc->sc_sensor[i]))
717 1.44 mhitch goto out;
718 1.44 mhitch }
719 1.54 chs sc->sc_sme->sme_name = device_xname(sc->sc_dev);
720 1.44 mhitch sc->sc_sme->sme_cookie = sc;
721 1.44 mhitch sc->sc_sme->sme_refresh = cac_sensor_refresh;
722 1.44 mhitch if (sysmon_envsys_register(sc->sc_sme)) {
723 1.54 chs aprint_error_dev(sc->sc_dev, "unable to register with sysmon\n");
724 1.44 mhitch return(1);
725 1.44 mhitch }
726 1.44 mhitch return (0);
727 1.44 mhitch
728 1.44 mhitch out:
729 1.44 mhitch free(sc->sc_sensor, M_DEVBUF);
730 1.44 mhitch sysmon_envsys_destroy(sc->sc_sme);
731 1.44 mhitch return EINVAL;
732 1.44 mhitch }
733 1.44 mhitch
734 1.44 mhitch void
735 1.44 mhitch cac_sensor_refresh(struct sysmon_envsys *sme, envsys_data_t *edata)
736 1.44 mhitch {
737 1.44 mhitch struct cac_softc *sc = sme->sme_cookie;
738 1.44 mhitch struct bioc_vol bv;
739 1.44 mhitch int s;
740 1.44 mhitch
741 1.44 mhitch if (edata->sensor >= sc->sc_nunits)
742 1.44 mhitch return;
743 1.44 mhitch
744 1.48 cegger memset(&bv, 0, sizeof(bv));
745 1.44 mhitch bv.bv_volid = edata->sensor;
746 1.44 mhitch s = splbio();
747 1.55 christos if (cac_ioctl_vol(sc, &bv))
748 1.55 christos bv.bv_status = BIOC_SVINVALID;
749 1.44 mhitch splx(s);
750 1.44 mhitch
751 1.55 christos bio_vol_to_envsys(edata, &bv);
752 1.44 mhitch }
753 1.44 mhitch #endif /* NBIO > 0 */
754 1.57 pgoyette
755 1.57 pgoyette MODULE(MODULE_CLASS_DRIVER, cac, NULL);
756 1.57 pgoyette
757 1.57 pgoyette #ifdef _MODULE
758 1.57 pgoyette CFDRIVER_DECL(cac, DV_DISK, NULL);
759 1.57 pgoyette #endif
760 1.57 pgoyette
761 1.57 pgoyette static int
762 1.57 pgoyette cac_modcmd(modcmd_t cmd, void *opaque)
763 1.57 pgoyette {
764 1.57 pgoyette int error = 0;
765 1.57 pgoyette
766 1.57 pgoyette #ifdef _MODULE
767 1.57 pgoyette switch (cmd) {
768 1.57 pgoyette case MODULE_CMD_INIT:
769 1.57 pgoyette error = config_cfdriver_attach(&cac_cd);
770 1.57 pgoyette break;
771 1.57 pgoyette case MODULE_CMD_FINI:
772 1.57 pgoyette error = config_cfdriver_detach(&cac_cd);
773 1.57 pgoyette break;
774 1.57 pgoyette default:
775 1.57 pgoyette error = ENOTTY;
776 1.57 pgoyette break;
777 1.57 pgoyette }
778 1.57 pgoyette #endif
779 1.57 pgoyette return error;
780 1.57 pgoyette }
781