cac.c revision 1.1 1 /* $NetBSD: cac.c,v 1.1 2000/03/16 14:52:24 ad Exp $ */
2
3 /*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andy Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Driver for Compaq array controllers.
41 */
42
43 #include <sys/cdefs.h>
44 __KERNEL_RCSID(0, "$NetBSD: cac.c,v 1.1 2000/03/16 14:52:24 ad Exp $");
45
46 #include <sys/param.h>
47 #include <sys/systm.h>
48 #include <sys/kernel.h>
49 #include <sys/device.h>
50 #include <sys/queue.h>
51 #include <sys/proc.h>
52 #include <sys/buf.h>
53 #include <sys/endian.h>
54 #include <sys/malloc.h>
55 #include <sys/pool.h>
56
57 #include <machine/bswap.h>
58 #include <machine/bus.h>
59
60 #include <dev/ic/cacreg.h>
61 #include <dev/ic/cacvar.h>
62
63 static void cac_ccb_done __P((struct cac_softc *, struct cac_ccb *));
64 static int cac_print __P((void *, const char *));
65 static int cac_submatch __P((struct device *, struct cfdata *, void *));
66 static void cac_ccb_poll __P((struct cac_softc *, struct cac_ccb *, int));
67 static void cac_shutdown __P((void *));
68
69 static SIMPLEQ_HEAD(, cac_softc) cac_hba; /* tailq of HBA softc's */
70 static void *cac_sdh; /* shutdown hook */
71
72 /*
73 * Initialise our interface to the controller.
74 */
75 int
76 cac_init(sc, intrstr)
77 struct cac_softc *sc;
78 const char *intrstr;
79 {
80 struct cac_controller_info cinfo;
81 struct cac_attach_args caca;
82 int error, rseg, size, i;
83 bus_dma_segment_t seg;
84 struct cac_ccb *ccb;
85
86 printf("Compaq %s\n", sc->sc_typestr);
87 if (intrstr != NULL)
88 printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname, intrstr);
89
90 SIMPLEQ_INIT(&sc->sc_ccb_free);
91 SIMPLEQ_INIT(&sc->sc_ccb_queue);
92
93 size = sizeof(struct cac_ccb) * CAC_MAX_CCBS;
94
95 if ((error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, 0, &seg, 1,
96 &rseg, BUS_DMA_NOWAIT)) != 0) {
97 printf("%s: unable to allocate CCBs, error = %d\n",
98 sc->sc_dv.dv_xname, error);
99 return (-1);
100 }
101
102 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
103 (caddr_t *)&sc->sc_ccbs, BUS_DMA_NOWAIT|BUS_DMA_COHERENT)) != 0) {
104 printf("%s: unable to map CCBs, error = %d\n",
105 sc->sc_dv.dv_xname, error);
106 return (-1);
107 }
108
109 if ((error = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0,
110 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
111 printf("%s: unable to create CCB DMA map, error = %d\n",
112 sc->sc_dv.dv_xname, error);
113 return (-1);
114 }
115
116 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ccbs,
117 size, NULL, BUS_DMA_NOWAIT)) != 0) {
118 printf("%s: unable to load CCB DMA map, error = %d\n",
119 sc->sc_dv.dv_xname, error);
120 return (-1);
121 }
122
123 sc->sc_ccbs_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
124 memset(sc->sc_ccbs, 0, size);
125 ccb = (struct cac_ccb *)sc->sc_ccbs;
126
127 for (i = 0; i < CAC_MAX_CCBS; i++, ccb++) {
128 /* Create the DMA map for this CCB's data */
129 error = bus_dmamap_create(sc->sc_dmat, CAC_MAX_XFER,
130 CAC_SG_SIZE, CAC_MAX_XFER, 0,
131 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap_xfer);
132
133 if (error) {
134 printf("%s: can't create ccb dmamap (%d)\n",
135 sc->sc_dv.dv_xname, error);
136 break;
137 }
138
139 ccb->ccb_flags = 0;
140 ccb->ccb_paddr = sc->sc_ccbs_paddr + i * sizeof(struct cac_ccb);
141 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_chain);
142 }
143
144 if (cac_cmd(sc, CAC_CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 0, 0,
145 CAC_CCB_DATA_IN, NULL)) {
146 printf("%s: CAC_CMD_GET_CTRL_INFO failed\n",
147 sc->sc_dv.dv_xname);
148 return (-1);
149 }
150
151 for (i = 0; i < cinfo.num_drvs; i++) {
152 caca.caca_unit = i;
153 config_found_sm(&sc->sc_dv, &caca, cac_print, cac_submatch);
154 }
155
156 /* Set shutdownhook before we start any device activity. */
157 if (cac_sdh == NULL) {
158 SIMPLEQ_INIT(&cac_hba);
159 cac_sdh = shutdownhook_establish(cac_shutdown, NULL);
160 }
161
162 sc->sc_cl->cl_intr_enable(sc, CAC_INT_ENABLE);
163 SIMPLEQ_INSERT_HEAD(&cac_hba, sc, sc_chain);
164 return (0);
165 }
166
167 /*
168 * Shutdown the controller.
169 */
170 static void
171 cac_shutdown(cookie)
172 void *cookie;
173 {
174 struct cac_softc *sc;
175 char buf[512];
176
177 printf("shutting down cac devices...");
178
179 for (sc = SIMPLEQ_FIRST(&cac_hba); sc != NULL;
180 sc = SIMPLEQ_NEXT(sc, sc_chain)) {
181 /* XXX documentation on this is a bit fuzzy. */
182 memset(buf, 0, sizeof (buf));
183 buf[0] = 1;
184 cac_cmd(sc, CAC_CMD_FLUSH_CACHE, buf, sizeof(buf), 0, 0,
185 CAC_CCB_DATA_OUT, NULL);
186 }
187
188 DELAY(5000*1000);
189 printf(" done\n");
190 }
191
192 /*
193 * Print attach message for a subdevice.
194 */
195 static int
196 cac_print(aux, pnp)
197 void *aux;
198 const char *pnp;
199 {
200 struct cac_attach_args *caca;
201
202 caca = (struct cac_attach_args *)aux;
203
204 if (pnp)
205 printf("block device at %s", pnp);
206 printf(" unit %d", caca->caca_unit);
207 return (UNCONF);
208 }
209
210 /*
211 * Match a subdevice.
212 */
213 static int
214 cac_submatch(parent, cf, aux)
215 struct device *parent;
216 struct cfdata *cf;
217 void *aux;
218 {
219 struct cac_attach_args *caca;
220
221 caca = (struct cac_attach_args *)aux;
222
223 if (cf->cacacf_unit != CACACF_UNIT_UNKNOWN &&
224 cf->cacacf_unit != caca->caca_unit)
225 return (0);
226
227 return (cf->cf_attach->ca_match(parent, cf, aux));
228 }
229
230 /*
231 * Handle an interrupt from the controller: process finished CCBs and
232 * dequeue any waiting CCBs.
233 */
234 int
235 cac_intr(xxx_sc)
236 void *xxx_sc;
237 {
238 struct cac_softc *sc;
239 struct cac_ccb *ccb;
240 paddr_t completed;
241 int off;
242
243 sc = (struct cac_softc *)xxx_sc;
244
245 if (!sc->sc_cl->cl_intr_pending(sc))
246 return (0);
247
248 while ((completed = sc->sc_cl->cl_completed(sc)) != 0) {
249 off = (completed & ~3) - sc->sc_ccbs_paddr;
250 ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
251
252 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off,
253 sizeof(struct cac_ccb),
254 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
255
256 cac_ccb_done(sc, ccb);
257 }
258
259 cac_ccb_start(sc, NULL);
260 return (1);
261 }
262
263 /*
264 * Execute a [polled] command.
265 */
266 int
267 cac_cmd(sc, command, data, datasize, drive, blkno, flags, context)
268 struct cac_softc *sc;
269 int command;
270 void *data;
271 int datasize;
272 int drive;
273 int blkno;
274 int flags;
275 struct cac_context *context;
276 {
277 struct cac_ccb *ccb;
278 struct cac_sgb *sgb;
279 int s, i, rv;
280
281 if ((ccb = cac_ccb_alloc(sc, 0)) == NULL) {
282 printf("%s: unable to alloc CCB", sc->sc_dv.dv_xname);
283 return (1);
284 }
285
286 if ((flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
287 bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer, (void *)data,
288 datasize, NULL, BUS_DMA_NOWAIT);
289
290 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, datasize,
291 (flags & CAC_CCB_DATA_IN) != 0 ? BUS_DMASYNC_PREREAD :
292 BUS_DMASYNC_PREWRITE);
293
294 sgb = ccb->ccb_seg;
295
296 for (i = 0; i < ccb->ccb_dmamap_xfer->dm_nsegs; i++, sgb++) {
297 sgb->length =
298 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
299 sgb->addr =
300 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
301 }
302 }
303
304 ccb->ccb_hdr.drive = drive;
305 ccb->ccb_hdr.size = htole16((sizeof(struct cac_req) +
306 sizeof(struct cac_sgb) * CAC_SG_SIZE) >> 2);
307
308 ccb->ccb_req.bcount = htole16(howmany(datasize, DEV_BSIZE));
309 ccb->ccb_req.command = command;
310 ccb->ccb_req.sgcount = i;
311 ccb->ccb_req.blkno = htole32(blkno);
312
313 ccb->ccb_flags = flags;
314 ccb->ccb_datasize = datasize;
315
316 if (context == NULL) {
317 memset(&ccb->ccb_context, 0, sizeof(struct cac_context));
318 s = splbio();
319 if (cac_ccb_start(sc, ccb)) {
320 cac_ccb_free(sc, ccb);
321 rv = -1;
322 } else {
323 cac_ccb_poll(sc, ccb, 2000);
324 cac_ccb_free(sc, ccb);
325 rv = 0;
326 }
327 splx(s);
328 } else {
329 memcpy(&ccb->ccb_context, context, sizeof(struct cac_context));
330 rv = cac_ccb_start(sc, ccb);
331 }
332
333 return (rv);
334 }
335
336 /*
337 * Wait for the specified CCB to complete. Must be called at splbio.
338 */
339 static void
340 cac_ccb_poll(sc, ccb, timo)
341 struct cac_softc *sc;
342 struct cac_ccb *ccb;
343 int timo;
344 {
345 struct cac_ccb *ccb_done = NULL;
346 paddr_t completed;
347 int off;
348
349 for (;;) {
350 for (; timo != 0; timo--) {
351 if ((completed = sc->sc_cl->cl_completed(sc)) != 0)
352 break;
353 DELAY(100);
354 }
355
356 if (timo == 0)
357 panic("%s: cac_ccb_poll: timeout", sc->sc_dv.dv_xname);
358
359 off = (completed & ~3) - sc->sc_ccbs_paddr;
360 ccb_done = (struct cac_ccb *)(sc->sc_ccbs + off);
361
362 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off,
363 sizeof(struct cac_ccb),
364 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
365
366 cac_ccb_done(sc, ccb_done);
367 if (ccb_done == ccb)
368 break;
369 }
370 }
371
372 /*
373 * Enqueue the specifed command (if any) and attempt to start all enqueued
374 * commands. Must be called at splbio.
375 */
376 int
377 cac_ccb_start(sc, ccb)
378 struct cac_softc *sc;
379 struct cac_ccb *ccb;
380 {
381 int s;
382
383 s = splbio();
384
385 if (ccb != NULL)
386 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain);
387
388 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) {
389 if (sc->sc_cl->cl_fifo_full(sc)) {
390 splx(s);
391 return (-1);
392 }
393 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb, ccb_chain);
394 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap,
395 (caddr_t)ccb - sc->sc_ccbs, sizeof(struct cac_ccb),
396 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
397 sc->sc_cl->cl_submit(sc, ccb->ccb_paddr);
398 }
399
400 splx(s);
401 return (0);
402 }
403
404 /*
405 * Process a finished CCB.
406 */
407 static void
408 cac_ccb_done(sc, ccb)
409 struct cac_softc *sc;
410 struct cac_ccb *ccb;
411 {
412 int error;
413
414 error = 0;
415
416 if ((ccb->ccb_flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
417 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
418 ccb->ccb_datasize, ccb->ccb_flags & CAC_CCB_DATA_IN ?
419 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
420 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
421 }
422
423 if ((ccb->ccb_req.error & CAC_RET_SOFT_ERROR) != 0)
424 printf("%s: soft error\n", sc->sc_dv.dv_xname);
425 if ((ccb->ccb_req.error & CAC_RET_HARD_ERROR) != 0) {
426 error = 1;
427 printf("%s: hard error\n", sc->sc_dv.dv_xname);
428 }
429 if ((ccb->ccb_req.error & CAC_RET_CMD_REJECTED) != 0) {
430 error = 1;
431 printf("%s: invalid request\n", sc->sc_dv.dv_xname);
432 }
433
434 if (ccb->ccb_context.cc_handler != NULL)
435 ccb->ccb_context.cc_handler(ccb, error);
436 }
437
438 /*
439 * Get a free CCB.
440 */
441 struct cac_ccb *
442 cac_ccb_alloc(sc, nosleep)
443 struct cac_softc *sc;
444 int nosleep;
445 {
446 struct cac_ccb *ccb;
447 int s;
448
449 s = splbio();
450
451 for (;;) {
452 if ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)) != NULL) {
453 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
454 break;
455 }
456 if (nosleep) {
457 ccb = NULL;
458 break;
459 }
460 tsleep(&sc->sc_ccb_free, PRIBIO, "cacccb", 0);
461 }
462
463 splx(s);
464 if (ccb != NULL)
465 memset(ccb, 0, 276); /* XXX */
466 return (ccb);
467 }
468
469 /*
470 * Put a CCB onto the freelist.
471 */
472 void
473 cac_ccb_free(sc, ccb)
474 struct cac_softc *sc;
475 struct cac_ccb *ccb;
476 {
477 int s;
478
479 s = splbio();
480 ccb->ccb_flags = 0;
481 SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
482
483 /* Wake anybody waiting for a free ccb */
484 if (SIMPLEQ_NEXT(ccb, ccb_chain) == NULL)
485 wakeup(&sc->sc_ccb_free);
486 splx(s);
487 }
488
489 /*
490 * Adjust the size of a transfer.
491 */
492 void
493 cac_minphys(bp)
494 struct buf *bp;
495 {
496
497 if (bp->b_bcount > CAC_MAX_XFER / DEV_BSIZE) /* XXX */
498 bp->b_bcount = CAC_MAX_XFER / DEV_BSIZE; /* XXX */
499 }
500