cac.c revision 1.10 1 /* $NetBSD: cac.c,v 1.10 2000/09/01 12:11:37 ad Exp $ */
2
3 /*-
4 * Copyright (c) 2000 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Andrew Doran.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 /*
40 * Driver for Compaq array controllers.
41 */
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/device.h>
47 #include <sys/queue.h>
48 #include <sys/proc.h>
49 #include <sys/buf.h>
50 #include <sys/endian.h>
51 #include <sys/malloc.h>
52 #include <sys/pool.h>
53
54 #include <machine/bswap.h>
55 #include <machine/bus.h>
56
57 #include <dev/ic/cacreg.h>
58 #include <dev/ic/cacvar.h>
59
60 static struct cac_ccb *cac_ccb_alloc(struct cac_softc *, int);
61 static void cac_ccb_done(struct cac_softc *, struct cac_ccb *);
62 static void cac_ccb_free(struct cac_softc *, struct cac_ccb *);
63 static void cac_ccb_poll(struct cac_softc *, struct cac_ccb *, int);
64 static int cac_ccb_start(struct cac_softc *, struct cac_ccb *);
65 static int cac_print(void *, const char *);
66 static void cac_shutdown(void *);
67 static int cac_submatch(struct device *, struct cfdata *, void *);
68
69 static struct cac_ccb *cac_l0_completed(struct cac_softc *);
70 static int cac_l0_fifo_full(struct cac_softc *);
71 static void cac_l0_intr_enable(struct cac_softc *, int);
72 static int cac_l0_intr_pending(struct cac_softc *);
73 static void cac_l0_submit(struct cac_softc *, struct cac_ccb *);
74
75 static void *cac_sdh; /* shutdown hook */
76
77 struct cac_linkage cac_l0 = {
78 cac_l0_completed,
79 cac_l0_fifo_full,
80 cac_l0_intr_enable,
81 cac_l0_intr_pending,
82 cac_l0_submit
83 };
84
85 /*
86 * Initialise our interface to the controller.
87 */
88 int
89 cac_init(struct cac_softc *sc, const char *intrstr, int startfw)
90 {
91 struct cac_controller_info cinfo;
92 struct cac_attach_args caca;
93 int error, rseg, size, i;
94 bus_dma_segment_t seg;
95 struct cac_ccb *ccb;
96
97 if (intrstr != NULL)
98 printf("%s: interrupting at %s\n", sc->sc_dv.dv_xname,
99 intrstr);
100
101 SIMPLEQ_INIT(&sc->sc_ccb_free);
102 SIMPLEQ_INIT(&sc->sc_ccb_queue);
103
104 size = sizeof(struct cac_ccb) * CAC_MAX_CCBS;
105
106 if ((error = bus_dmamem_alloc(sc->sc_dmat, size, NBPG, 0, &seg, 1,
107 &rseg, BUS_DMA_NOWAIT)) != 0) {
108 printf("%s: unable to allocate CCBs, error = %d\n",
109 sc->sc_dv.dv_xname, error);
110 return (-1);
111 }
112
113 if ((error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, size,
114 (caddr_t *)&sc->sc_ccbs,
115 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
116 printf("%s: unable to map CCBs, error = %d\n",
117 sc->sc_dv.dv_xname, error);
118 return (-1);
119 }
120
121 if ((error = bus_dmamap_create(sc->sc_dmat, size, size, 1, 0,
122 BUS_DMA_NOWAIT, &sc->sc_dmamap)) != 0) {
123 printf("%s: unable to create CCB DMA map, error = %d\n",
124 sc->sc_dv.dv_xname, error);
125 return (-1);
126 }
127
128 if ((error = bus_dmamap_load(sc->sc_dmat, sc->sc_dmamap, sc->sc_ccbs,
129 size, NULL, BUS_DMA_NOWAIT)) != 0) {
130 printf("%s: unable to load CCB DMA map, error = %d\n",
131 sc->sc_dv.dv_xname, error);
132 return (-1);
133 }
134
135 sc->sc_ccbs_paddr = sc->sc_dmamap->dm_segs[0].ds_addr;
136 memset(sc->sc_ccbs, 0, size);
137 ccb = (struct cac_ccb *)sc->sc_ccbs;
138
139 for (i = 0; i < CAC_MAX_CCBS; i++, ccb++) {
140 /* Create the DMA map for this CCB's data */
141 error = bus_dmamap_create(sc->sc_dmat, CAC_MAX_XFER,
142 CAC_SG_SIZE, CAC_MAX_XFER, 0,
143 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, &ccb->ccb_dmamap_xfer);
144
145 if (error) {
146 printf("%s: can't create ccb dmamap (%d)\n",
147 sc->sc_dv.dv_xname, error);
148 break;
149 }
150
151 ccb->ccb_flags = 0;
152 ccb->ccb_paddr = sc->sc_ccbs_paddr + i * sizeof(struct cac_ccb);
153 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_free, ccb, ccb_chain);
154 }
155
156 /* Start firmware background tasks, if needed. */
157 if (startfw) {
158 if (cac_cmd(sc, CAC_CMD_START_FIRMWARE, &cinfo, sizeof(cinfo),
159 0, 0, CAC_CCB_DATA_IN, NULL)) {
160 printf("%s: CAC_CMD_START_FIRMWARE failed\n",
161 sc->sc_dv.dv_xname);
162 return (-1);
163 }
164 }
165
166 if (cac_cmd(sc, CAC_CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo), 0, 0,
167 CAC_CCB_DATA_IN, NULL)) {
168 printf("%s: CAC_CMD_GET_CTRL_INFO failed\n",
169 sc->sc_dv.dv_xname);
170 return (-1);
171 }
172
173 for (i = 0; i < cinfo.num_drvs; i++) {
174 caca.caca_unit = i;
175 config_found_sm(&sc->sc_dv, &caca, cac_print, cac_submatch);
176 }
177
178 /* Set our `shutdownhook' before we start any device activity. */
179 if (cac_sdh == NULL)
180 cac_sdh = shutdownhook_establish(cac_shutdown, NULL);
181
182 (*sc->sc_cl->cl_intr_enable)(sc, CAC_INTR_ENABLE);
183 return (0);
184 }
185
186 /*
187 * Shut down all `cac' controllers.
188 */
189 static void
190 cac_shutdown(void *cookie)
191 {
192 extern struct cfdriver cac_cd;
193 struct cac_softc *sc;
194 char buf[512];
195 int i;
196
197 printf("shutting down cac devices...");
198
199 for (i = 0; i < cac_cd.cd_ndevs; i++) {
200 if ((sc = device_lookup(&cac_cd, i)) == NULL)
201 continue;
202 /* XXX Documentation on this is a bit fuzzy. */
203 memset(buf, 0, sizeof (buf));
204 buf[0] = 1;
205 cac_cmd(sc, CAC_CMD_FLUSH_CACHE, buf, sizeof(buf), 0, 0,
206 CAC_CCB_DATA_OUT, NULL);
207 }
208
209 DELAY(5000*1000);
210 printf(" done\n");
211 }
212
213 /*
214 * Print autoconfiguration message for a sub-device.
215 */
216 static int
217 cac_print(void *aux, const char *pnp)
218 {
219 struct cac_attach_args *caca;
220
221 caca = (struct cac_attach_args *)aux;
222
223 if (pnp != NULL)
224 printf("block device at %s", pnp);
225 printf(" unit %d", caca->caca_unit);
226 return (UNCONF);
227 }
228
229 /*
230 * Match a sub-device.
231 */
232 static int
233 cac_submatch(struct device *parent, struct cfdata *cf, void *aux)
234 {
235 struct cac_attach_args *caca;
236
237 caca = (struct cac_attach_args *)aux;
238
239 if (cf->cacacf_unit != CACACF_UNIT_UNKNOWN &&
240 cf->cacacf_unit != caca->caca_unit)
241 return (0);
242
243 return (cf->cf_attach->ca_match(parent, cf, aux));
244 }
245
246 /*
247 * Handle an interrupt from the controller: process finished CCBs and
248 * dequeue any waiting CCBs.
249 */
250 int
251 cac_intr(void *cookie)
252 {
253 struct cac_softc *sc;
254 struct cac_ccb *ccb;
255
256 sc = (struct cac_softc *)cookie;
257
258 if (!(*sc->sc_cl->cl_intr_pending)(sc)) {
259 #ifdef DEBUG
260 printf("%s: spurious intr\n", sc->sc_dv.dv_xname);
261 #endif
262 return (0);
263 }
264
265 while ((ccb = (*sc->sc_cl->cl_completed)(sc)) != NULL) {
266 cac_ccb_done(sc, ccb);
267 cac_ccb_start(sc, NULL);
268 }
269
270 return (1);
271 }
272
273 /*
274 * Execute a [polled] command.
275 */
276 int
277 cac_cmd(struct cac_softc *sc, int command, void *data, int datasize,
278 int drive, int blkno, int flags, struct cac_context *context)
279 {
280 struct cac_ccb *ccb;
281 struct cac_sgb *sgb;
282 int s, i, rv, size, nsegs;
283
284 size = 0;
285
286 if ((ccb = cac_ccb_alloc(sc, 0)) == NULL) {
287 printf("%s: unable to alloc CCB", sc->sc_dv.dv_xname);
288 return (1);
289 }
290
291 if ((flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
292 bus_dmamap_load(sc->sc_dmat, ccb->ccb_dmamap_xfer,
293 (void *)data, datasize, NULL, BUS_DMA_NOWAIT);
294
295 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0, datasize,
296 (flags & CAC_CCB_DATA_IN) != 0 ? BUS_DMASYNC_PREREAD :
297 BUS_DMASYNC_PREWRITE);
298
299 sgb = ccb->ccb_seg;
300 nsegs = min(ccb->ccb_dmamap_xfer->dm_nsegs, CAC_SG_SIZE);
301
302 for (i = 0; i < nsegs; i++, sgb++) {
303 size += ccb->ccb_dmamap_xfer->dm_segs[i].ds_len;
304 sgb->length =
305 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_len);
306 sgb->addr =
307 htole32(ccb->ccb_dmamap_xfer->dm_segs[i].ds_addr);
308 }
309 } else {
310 size = datasize;
311 nsegs = 0;
312 }
313
314 ccb->ccb_hdr.drive = drive;
315 ccb->ccb_hdr.size = htole16((sizeof(struct cac_req) +
316 sizeof(struct cac_sgb) * CAC_SG_SIZE) >> 2);
317
318 ccb->ccb_req.bcount = htole16(howmany(size, DEV_BSIZE));
319 ccb->ccb_req.command = command;
320 ccb->ccb_req.sgcount = nsegs;
321 ccb->ccb_req.blkno = htole32(blkno);
322
323 ccb->ccb_flags = flags;
324 ccb->ccb_datasize = size;
325
326 if (context == NULL) {
327 memset(&ccb->ccb_context, 0, sizeof(struct cac_context));
328 s = splbio();
329
330 /* Synchronous commands musn't wait. */
331 if ((*sc->sc_cl->cl_fifo_full)(sc)) {
332 cac_ccb_free(sc, ccb);
333 rv = -1;
334 } else {
335 (*sc->sc_cl->cl_submit)(sc, ccb);
336 cac_ccb_poll(sc, ccb, 2000);
337 cac_ccb_free(sc, ccb);
338 rv = 0;
339 }
340 } else {
341 memcpy(&ccb->ccb_context, context, sizeof(struct cac_context));
342 s = splbio();
343 rv = cac_ccb_start(sc, ccb);
344 }
345
346 splx(s);
347 return (rv);
348 }
349
350 /*
351 * Wait for the specified CCB to complete. Must be called at splbio.
352 */
353 static void
354 cac_ccb_poll(struct cac_softc *sc, struct cac_ccb *wantccb, int timo)
355 {
356 struct cac_ccb *ccb;
357
358 timo *= 10;
359
360 do {
361 for (; timo != 0; timo--) {
362 if ((ccb = (*sc->sc_cl->cl_completed)(sc)) != NULL)
363 break;
364 DELAY(100);
365 }
366
367 if (timo == 0)
368 panic("%s: cac_ccb_poll: timeout", sc->sc_dv.dv_xname);
369
370 cac_ccb_done(sc, ccb);
371 } while (ccb != wantccb);
372 }
373
374 /*
375 * Enqueue the specifed command (if any) and attempt to start all enqueued
376 * commands. Must be called at splbio.
377 */
378 static int
379 cac_ccb_start(struct cac_softc *sc, struct cac_ccb *ccb)
380 {
381
382 if (ccb != NULL)
383 SIMPLEQ_INSERT_TAIL(&sc->sc_ccb_queue, ccb, ccb_chain);
384
385 while ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_queue)) != NULL) {
386 if ((*sc->sc_cl->cl_fifo_full)(sc))
387 return (-1);
388 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_queue, ccb, ccb_chain);
389 #ifdef DIAGNOSTIC
390 ccb->ccb_flags |= CAC_CCB_ACTIVE;
391 #endif
392 (*sc->sc_cl->cl_submit)(sc, ccb);
393 }
394
395 return (0);
396 }
397
398 /*
399 * Process a finished CCB.
400 */
401 static void
402 cac_ccb_done(struct cac_softc *sc, struct cac_ccb *ccb)
403 {
404 const char *errdvn;
405 int error;
406
407 error = 0;
408
409 #ifdef DIAGNOSTIC
410 if ((ccb->ccb_flags & CAC_CCB_ACTIVE) == 0)
411 panic("cac_ccb_done: CCB not active");
412 ccb->ccb_flags &= ~CAC_CCB_ACTIVE;
413 #endif
414
415 if ((ccb->ccb_flags & (CAC_CCB_DATA_IN | CAC_CCB_DATA_OUT)) != 0) {
416 bus_dmamap_sync(sc->sc_dmat, ccb->ccb_dmamap_xfer, 0,
417 ccb->ccb_datasize, ccb->ccb_flags & CAC_CCB_DATA_IN ?
418 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
419 bus_dmamap_unload(sc->sc_dmat, ccb->ccb_dmamap_xfer);
420 }
421
422 if (ccb->ccb_context.cc_dv != NULL)
423 errdvn = ccb->ccb_context.cc_dv->dv_xname;
424 else
425 errdvn = sc->sc_dv.dv_xname;
426
427 if ((ccb->ccb_req.error & CAC_RET_SOFT_ERROR) != 0)
428 printf("%s: soft error; corrected\n", errdvn);
429 if ((ccb->ccb_req.error & CAC_RET_HARD_ERROR) != 0) {
430 error = 1;
431 printf("%s: hard error\n", errdvn);
432 }
433 if ((ccb->ccb_req.error & CAC_RET_CMD_REJECTED) != 0) {
434 error = 1;
435 printf("%s: invalid request\n", errdvn);
436 }
437
438 if (ccb->ccb_context.cc_handler != NULL) {
439 (*ccb->ccb_context.cc_handler)(ccb, error);
440 cac_ccb_free(sc, ccb);
441 }
442 }
443
444 /*
445 * Allocate a CCB.
446 */
447 struct cac_ccb *
448 cac_ccb_alloc(struct cac_softc *sc, int nosleep)
449 {
450 struct cac_ccb *ccb;
451 int s;
452
453 s = splbio();
454
455 for (;;) {
456 if ((ccb = SIMPLEQ_FIRST(&sc->sc_ccb_free)) != NULL) {
457 SIMPLEQ_REMOVE_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
458 break;
459 }
460 if (nosleep) {
461 ccb = NULL;
462 break;
463 }
464 tsleep(&sc->sc_ccb_free, PRIBIO, "cacccb", 0);
465 }
466
467 splx(s);
468 return (ccb);
469 }
470
471 /*
472 * Put a CCB onto the freelist.
473 */
474 void
475 cac_ccb_free(struct cac_softc *sc, struct cac_ccb *ccb)
476 {
477 int s;
478
479 s = splbio();
480 ccb->ccb_flags = 0;
481 SIMPLEQ_INSERT_HEAD(&sc->sc_ccb_free, ccb, ccb_chain);
482 if (SIMPLEQ_NEXT(ccb, ccb_chain) == NULL)
483 wakeup_one(&sc->sc_ccb_free);
484 splx(s);
485 }
486
487 /*
488 * Adjust the size of a transfer.
489 */
490 void
491 cac_minphys(struct buf *bp)
492 {
493
494 if (bp->b_bcount > CAC_MAX_XFER)
495 bp->b_bcount = CAC_MAX_XFER;
496 minphys(bp);
497 }
498
499 /*
500 * Board specific linkage shared between multiple bus types.
501 */
502
503 static int
504 cac_l0_fifo_full(struct cac_softc *sc)
505 {
506
507 return (cac_inl(sc, CAC_REG_CMD_FIFO) == 0);
508 }
509
510 static void
511 cac_l0_submit(struct cac_softc *sc, struct cac_ccb *ccb)
512 {
513
514 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, (caddr_t)ccb - sc->sc_ccbs,
515 sizeof(struct cac_ccb), BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
516 cac_outl(sc, CAC_REG_CMD_FIFO, ccb->ccb_paddr);
517 }
518
519 static struct cac_ccb *
520 cac_l0_completed(struct cac_softc *sc)
521 {
522 struct cac_ccb *ccb;
523 paddr_t off;
524
525 off = (cac_inl(sc, CAC_REG_DONE_FIFO) & ~3) - sc->sc_ccbs_paddr;
526 ccb = (struct cac_ccb *)(sc->sc_ccbs + off);
527
528 bus_dmamap_sync(sc->sc_dmat, sc->sc_dmamap, off, sizeof(struct cac_ccb),
529 BUS_DMASYNC_POSTWRITE | BUS_DMASYNC_POSTREAD);
530
531 return (ccb);
532 }
533
534 static int
535 cac_l0_intr_pending(struct cac_softc *sc)
536 {
537
538 return (cac_inl(sc, CAC_REG_INTR_PENDING));
539 }
540
541 static void
542 cac_l0_intr_enable(struct cac_softc *sc, int state)
543 {
544
545 cac_outl(sc, CAC_REG_INTR_MASK,
546 state ? CAC_INTR_ENABLE : CAC_INTR_DISABLE);
547 }
548