Home | History | Annotate | Line # | Download | only in ic 
      1 /*	$NetBSD: cyreg.h,v 1.5 2005/12/11 12:21:26 christos Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 1995 Bruce Evans.
      5  * All rights reserved.
      6  *
      7  * Modified by Timo Rossi, 1996
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. Neither the name of the author nor the names of contributors
     18  *    may be used to endorse or promote products derived from this software
     19  *    without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31  * SUCH DAMAGE.
     32  *
     33  *	Id: cyreg.h,v 1.1 1995/07/05 12:15:51 bde Exp
     34  */
     35 
     36 /*
     37  * Definitions for Cyclades Cyclom-Y serial boards.
     38  */
     39 
     40 #define	CY8_SVCACKR		0x100
     41 #define	CY8_SVCACKT		0x200
     42 #define	CY8_SVCACKM		0x300
     43 
     44 /* twice this in PCI mode (shifed BUSTYPE bits left) */
     45 #define	CY_CD1400_MEMSPACING	0x400
     46 
     47 /* adjustment value for accessing the last 4 cd1400s on Cyclom-32 */
     48 #define CY32_ADDR_FIX           0xe00
     49 
     50 #define	CY16_RESET		0x1400
     51 #define	CY_CLEAR_INTR		0x1800	/* intr ack address */
     52 
     53 #define	CY_MAX_CD1400s		8	/* for Cyclom-32 */
     54 
     55 /* I/O location for enabling interrupts on PCI Cyclom cards */
     56 #define CY_PCI_INTENA           0x68
     57 #define CY_PCI_INTENA_9050      0x4c
     58 
     59 /* Cyclom-Y Custom Register for PLX ID (PCI only) */
     60 #define CY_PLX_VER		0x3400		/* PLX version */
     61 #define CY_PLX_9050		0x0b
     62 #define CY_PLX_9060		0x0c
     63 #define CY_PLX_9080		0x0d
     64 
     65 #define	CY_CLOCK		25000000	/* baud rate clock */
     66 #define	CY_CLOCK_60		60000000	/* new CD14000 */
     67 
     68 #define CY_MEMSIZE		0x2000
     69 
     70 /*
     71  * bustype is actually the shift count for the offset
     72  * ISA card addresses are multiplied by 2 (shifted 1 bit)
     73  * and PCI addresses multiplied by 4 (shifted 2 bits)
     74  */
     75 #define CY_BUSTYPE_ISA 0
     76 #define CY_BUSTYPE_PCI 1
     77