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      1 /*      $NetBSD: lemacvar.h,v 1.13 2015/04/13 16:33:24 riastradh Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1997 Matt Thomas <matt (at) 3am-software.com>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. The name of the author may not be used to endorse or promote products
     13  *    derived from this software without specific prior written permission
     14  *
     15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     25  */
     26 
     27 #ifndef _LEMAC_VAR_H
     28 #define	_LEMAC_VAR_H
     29 
     30 #include <sys/rndsource.h>
     31 
     32 /*
     33  * Ethernet status, per interface.
     34  */
     35 typedef struct {
     36     device_t sc_dev;
     37     void *sc_ih;
     38     void *sc_ats;
     39     struct ethercom sc_ec;
     40     struct ifmedia sc_ifmedia;
     41     bus_space_tag_t sc_iot;
     42     bus_space_tag_t sc_memt;
     43     bus_space_handle_t sc_ioh;
     44     bus_space_handle_t sc_memh;
     45     unsigned sc_flags;			/* */
     46 #define	LEMAC_PIO_MODE		0x0000U
     47 #define	LEMAC_2K_MODE		0x0001U
     48 #define	LEMAC_WAS_32K_MODE	0x0002U
     49 #define	LEMAC_WAS_64K_MODE	0x0003U
     50 #define	LEMAC_MODE_MASK		0x0003U
     51 #define	LEMAC_ALLMULTI		0x0010U
     52 #define	LEMAC_ALIVE		0x0020U
     53 #define	LEMAC_LINKUP		0x0040U
     54     unsigned sc_lastpage;		/* last 2K page */
     55     unsigned sc_txctl;			/* Transmit Control Byte */
     56     unsigned sc_ctlmode;		/* media ctl bits */
     57     struct {
     58 	u_int8_t csr_cs;
     59 	u_int8_t csr_tqc;
     60 	u_int8_t csr_fmq;
     61     } sc_csr;
     62     unsigned sc_laststatus;		/* last read of LEMAC_REG_CS */
     63     u_int16_t sc_mctbl[LEMAC_MCTBL_SIZE/sizeof(u_int16_t)];
     64 					/* local copy of multicast table */
     65     struct {
     66 	unsigned cntr_txnospc;		/* total # of no transmit memory */
     67 	unsigned cntr_txfull;		/* total # of transmitter full */
     68 	unsigned cntr_tne_intrs;	/* total # of transmit done intrs */
     69 	unsigned cntr_rne_intrs;	/* total # of receive done intrs */
     70 	unsigned cntr_txd_intrs;	/* total # of transmit error intrs */
     71 	unsigned cntr_rxd_intrs;	/* total # of receive error intrs */
     72     } sc_cntrs;
     73     /*
     74      * We rely on sc_enaddr being aligned on (at least) a 16 bit boundary
     75      */
     76     unsigned char sc_enaddr[ETHER_ADDR_LEN];	/* current Ethernet address */
     77     char sc_prodname[LEMAC_EEP_PRDNMSZ+1]; /* product name DE20x-xx */
     78     u_int8_t sc_eeprom[LEMAC_EEP_SIZE];	/* local copy eeprom */
     79     krndsource_t rnd_source;
     80 } lemac_softc_t;
     81 
     82 #define	sc_if	sc_ec.ec_if
     83 
     84 #define	LEMAC_IFP_TO_SOFTC(ifp)	((lemac_softc_t *)((ifp)->if_softc))
     85 #define	LEMAC_USE_PIO_MODE(sc)	(((sc->sc_flags & LEMAC_MODE_MASK) == LEMAC_PIO_MODE) || (sc->sc_if.if_flags & IFF_LINK0))
     86 
     87 #define	LEMAC_OUTB(sc, o, v)	bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (o), (v))
     88 #define	LEMAC_OUTSB(sc, o, l, p)	bus_space_write_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
     89 #define	LEMAC_INB(sc, o)	bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (o))
     90 #define	LEMAC_INSB(sc, o, l, p)	bus_space_read_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
     91 
     92 #define	LEMAC_PUTBUF8(sc, o, l, p)	bus_space_write_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
     93 #define	LEMAC_PUTBUF16(sc, o, l, p)	bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
     94 #define	LEMAC_PUTBUF32(sc, o, l, p)	bus_space_write_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
     95 
     96 #define	LEMAC_PUT8(sc, o, v)	bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (o), (v))
     97 #define	LEMAC_PUT16(sc, o, v)	bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (o), (v))
     98 #define	LEMAC_PUT32(sc, o, v)	bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (o), (v))
     99 
    100 #define	LEMAC_GETBUF8(sc, o, l, p)	bus_space_read_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
    101 #define	LEMAC_GETBUF16(sc, o, l, p)	bus_space_read_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
    102 #define	LEMAC_GETBUF32(sc, o, l, p)	bus_space_read_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
    103 
    104 #define	LEMAC_GET8(sc, o)	bus_space_read_1((sc)->sc_memt, (sc)->sc_memh, (o))
    105 #define	LEMAC_GET16(sc, o)	bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (o))
    106 #define	LEMAC_GET32(sc, o)	bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (o))
    107 
    108 
    109 #define	LEMAC_INTR_ENABLE(sc) \
    110 	LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_ALL)
    111 
    112 #define	LEMAC_INTR_DISABLE(sc) \
    113 	LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) & ~LEMAC_IC_ALL)
    114 
    115 #define LEMAC_IS_64K_MODE(mbase) (((mbase) >= 0x0A) && ((mbase) <= 0x0F))
    116 #define LEMAC_IS_32K_MODE(mbase) (((mbase) >= 0x14) && ((mbase) <= 0x1F))
    117 #define LEMAC_IS_2K_MODE(mbase)	( (mbase) >= 0x40)
    118 
    119 #define	LEMAC_DECODEIRQ(i)	((0xFBA5 >> ((i) >> 3)) & 0x0F)
    120 
    121 #define	LEMAC_ADDREQUAL(a1, a2) \
    122 	(((u_int16_t *)a1)[0] == ((u_int16_t *)a2)[0] \
    123 	 && ((u_int16_t *)a1)[1] == ((u_int16_t *)a2)[1] \
    124 	 && ((u_int16_t *)a1)[2] == ((u_int16_t *)a2)[2])
    125 
    126 #define	LEMAC_ADDRBRDCST(a1) \
    127 	(((u_int16_t *)a1)[0] == 0xFFFFU \
    128 	 && ((u_int16_t *)a1)[1] == 0xFFFFU \
    129 	 && ((u_int16_t *)a1)[2] == 0xFFFFU)
    130 
    131 extern void lemac_ifattach(lemac_softc_t *);
    132 extern void lemac_info_get(const bus_space_tag_t, const bus_space_handle_t,
    133     bus_addr_t *, bus_size_t *, int *);
    134 extern int lemac_port_check(const bus_space_tag_t, const bus_space_handle_t);
    135 extern int lemac_intr(void *);
    136 extern void lemac_shutdown(void *);
    137 
    138 #endif /* _LEMACVAR_H */
    139