lemacvar.h revision 1.13 1 1.13 riastrad /* $NetBSD: lemacvar.h,v 1.13 2015/04/13 16:33:24 riastradh Exp $ */
2 1.1 matt
3 1.1 matt /*
4 1.1 matt * Copyright (c) 1997 Matt Thomas <matt (at) 3am-software.com>
5 1.1 matt * All rights reserved.
6 1.1 matt *
7 1.1 matt * Redistribution and use in source and binary forms, with or without
8 1.1 matt * modification, are permitted provided that the following conditions
9 1.1 matt * are met:
10 1.1 matt * 1. Redistributions of source code must retain the above copyright
11 1.1 matt * notice, this list of conditions and the following disclaimer.
12 1.1 matt * 2. The name of the author may not be used to endorse or promote products
13 1.6 wiz * derived from this software without specific prior written permission
14 1.1 matt *
15 1.1 matt * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 1.1 matt * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 1.1 matt * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 1.1 matt * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 1.1 matt * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 1.1 matt * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 1.1 matt * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 1.1 matt * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 1.1 matt * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 1.1 matt * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 1.1 matt */
26 1.1 matt
27 1.1 matt #ifndef _LEMAC_VAR_H
28 1.1 matt #define _LEMAC_VAR_H
29 1.1 matt
30 1.13 riastrad #include <sys/rndsource.h>
31 1.2 explorer
32 1.1 matt /*
33 1.1 matt * Ethernet status, per interface.
34 1.1 matt */
35 1.1 matt typedef struct {
36 1.12 chs device_t sc_dev;
37 1.1 matt void *sc_ih;
38 1.1 matt void *sc_ats;
39 1.1 matt struct ethercom sc_ec;
40 1.1 matt struct ifmedia sc_ifmedia;
41 1.1 matt bus_space_tag_t sc_iot;
42 1.1 matt bus_space_tag_t sc_memt;
43 1.1 matt bus_space_handle_t sc_ioh;
44 1.1 matt bus_space_handle_t sc_memh;
45 1.1 matt unsigned sc_flags; /* */
46 1.1 matt #define LEMAC_PIO_MODE 0x0000U
47 1.1 matt #define LEMAC_2K_MODE 0x0001U
48 1.1 matt #define LEMAC_WAS_32K_MODE 0x0002U
49 1.1 matt #define LEMAC_WAS_64K_MODE 0x0003U
50 1.1 matt #define LEMAC_MODE_MASK 0x0003U
51 1.1 matt #define LEMAC_ALLMULTI 0x0010U
52 1.1 matt #define LEMAC_ALIVE 0x0020U
53 1.1 matt #define LEMAC_LINKUP 0x0040U
54 1.1 matt unsigned sc_lastpage; /* last 2K page */
55 1.1 matt unsigned sc_txctl; /* Transmit Control Byte */
56 1.1 matt unsigned sc_ctlmode; /* media ctl bits */
57 1.1 matt struct {
58 1.1 matt u_int8_t csr_cs;
59 1.1 matt u_int8_t csr_tqc;
60 1.1 matt u_int8_t csr_fmq;
61 1.1 matt } sc_csr;
62 1.1 matt unsigned sc_laststatus; /* last read of LEMAC_REG_CS */
63 1.1 matt u_int16_t sc_mctbl[LEMAC_MCTBL_SIZE/sizeof(u_int16_t)];
64 1.1 matt /* local copy of multicast table */
65 1.1 matt struct {
66 1.8 wiz unsigned cntr_txnospc; /* total # of no transmit memory */
67 1.8 wiz unsigned cntr_txfull; /* total # of transmitter full */
68 1.8 wiz unsigned cntr_tne_intrs; /* total # of transmit done intrs */
69 1.1 matt unsigned cntr_rne_intrs; /* total # of receive done intrs */
70 1.8 wiz unsigned cntr_txd_intrs; /* total # of transmit error intrs */
71 1.1 matt unsigned cntr_rxd_intrs; /* total # of receive error intrs */
72 1.1 matt } sc_cntrs;
73 1.3 matt /*
74 1.3 matt * We rely on sc_enaddr being aligned on (at least) a 16 bit boundary
75 1.3 matt */
76 1.4 tsutsui unsigned char sc_enaddr[ETHER_ADDR_LEN]; /* current Ethernet address */
77 1.1 matt char sc_prodname[LEMAC_EEP_PRDNMSZ+1]; /* product name DE20x-xx */
78 1.1 matt u_int8_t sc_eeprom[LEMAC_EEP_SIZE]; /* local copy eeprom */
79 1.10 tls krndsource_t rnd_source;
80 1.1 matt } lemac_softc_t;
81 1.1 matt
82 1.1 matt #define sc_if sc_ec.ec_if
83 1.1 matt
84 1.1 matt #define LEMAC_IFP_TO_SOFTC(ifp) ((lemac_softc_t *)((ifp)->if_softc))
85 1.1 matt #define LEMAC_USE_PIO_MODE(sc) (((sc->sc_flags & LEMAC_MODE_MASK) == LEMAC_PIO_MODE) || (sc->sc_if.if_flags & IFF_LINK0))
86 1.1 matt
87 1.5 lukem #define LEMAC_OUTB(sc, o, v) bus_space_write_1((sc)->sc_iot, (sc)->sc_ioh, (o), (v))
88 1.5 lukem #define LEMAC_OUTSB(sc, o, l, p) bus_space_write_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
89 1.5 lukem #define LEMAC_INB(sc, o) bus_space_read_1((sc)->sc_iot, (sc)->sc_ioh, (o))
90 1.5 lukem #define LEMAC_INSB(sc, o, l, p) bus_space_read_multi_1((sc)->sc_iot, (sc)->sc_ioh, (o), (p), (l))
91 1.5 lukem
92 1.5 lukem #define LEMAC_PUTBUF8(sc, o, l, p) bus_space_write_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
93 1.5 lukem #define LEMAC_PUTBUF16(sc, o, l, p) bus_space_write_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
94 1.5 lukem #define LEMAC_PUTBUF32(sc, o, l, p) bus_space_write_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
95 1.5 lukem
96 1.5 lukem #define LEMAC_PUT8(sc, o, v) bus_space_write_1((sc)->sc_memt, (sc)->sc_memh, (o), (v))
97 1.5 lukem #define LEMAC_PUT16(sc, o, v) bus_space_write_2((sc)->sc_memt, (sc)->sc_memh, (o), (v))
98 1.5 lukem #define LEMAC_PUT32(sc, o, v) bus_space_write_4((sc)->sc_memt, (sc)->sc_memh, (o), (v))
99 1.5 lukem
100 1.5 lukem #define LEMAC_GETBUF8(sc, o, l, p) bus_space_read_region_1((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
101 1.5 lukem #define LEMAC_GETBUF16(sc, o, l, p) bus_space_read_region_2((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
102 1.5 lukem #define LEMAC_GETBUF32(sc, o, l, p) bus_space_read_region_4((sc)->sc_memt, (sc)->sc_memh, (o), (p), (l))
103 1.5 lukem
104 1.5 lukem #define LEMAC_GET8(sc, o) bus_space_read_1((sc)->sc_memt, (sc)->sc_memh, (o))
105 1.5 lukem #define LEMAC_GET16(sc, o) bus_space_read_2((sc)->sc_memt, (sc)->sc_memh, (o))
106 1.5 lukem #define LEMAC_GET32(sc, o) bus_space_read_4((sc)->sc_memt, (sc)->sc_memh, (o))
107 1.1 matt
108 1.1 matt
109 1.1 matt #define LEMAC_INTR_ENABLE(sc) \
110 1.1 matt LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) | LEMAC_IC_ALL)
111 1.1 matt
112 1.1 matt #define LEMAC_INTR_DISABLE(sc) \
113 1.1 matt LEMAC_OUTB(sc, LEMAC_REG_IC, LEMAC_INB(sc, LEMAC_REG_IC) & ~LEMAC_IC_ALL)
114 1.1 matt
115 1.1 matt #define LEMAC_IS_64K_MODE(mbase) (((mbase) >= 0x0A) && ((mbase) <= 0x0F))
116 1.1 matt #define LEMAC_IS_32K_MODE(mbase) (((mbase) >= 0x14) && ((mbase) <= 0x1F))
117 1.1 matt #define LEMAC_IS_2K_MODE(mbase) ( (mbase) >= 0x40)
118 1.1 matt
119 1.1 matt #define LEMAC_DECODEIRQ(i) ((0xFBA5 >> ((i) >> 3)) & 0x0F)
120 1.1 matt
121 1.1 matt #define LEMAC_ADDREQUAL(a1, a2) \
122 1.1 matt (((u_int16_t *)a1)[0] == ((u_int16_t *)a2)[0] \
123 1.1 matt && ((u_int16_t *)a1)[1] == ((u_int16_t *)a2)[1] \
124 1.1 matt && ((u_int16_t *)a1)[2] == ((u_int16_t *)a2)[2])
125 1.3 matt
126 1.1 matt #define LEMAC_ADDRBRDCST(a1) \
127 1.1 matt (((u_int16_t *)a1)[0] == 0xFFFFU \
128 1.1 matt && ((u_int16_t *)a1)[1] == 0xFFFFU \
129 1.1 matt && ((u_int16_t *)a1)[2] == 0xFFFFU)
130 1.1 matt
131 1.7 itojun extern void lemac_ifattach(lemac_softc_t *);
132 1.7 itojun extern void lemac_info_get(const bus_space_tag_t, const bus_space_handle_t,
133 1.7 itojun bus_addr_t *, bus_size_t *, int *);
134 1.7 itojun extern int lemac_port_check(const bus_space_tag_t, const bus_space_handle_t);
135 1.7 itojun extern int lemac_intr(void *);
136 1.7 itojun extern void lemac_shutdown(void *);
137 1.1 matt
138 1.1 matt #endif /* _LEMACVAR_H */
139